Hi everybody ,
customer would like to do boundary scan etc .
now on TRM spruim2 the DEBUG chapter 13 is totally empty
coudl you kindly share whihc link /info they can use for boundary and jtag dabug capabilities ?
thank you
BR
Carlo
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Hi everybody ,
customer would like to do boundary scan etc .
now on TRM spruim2 the DEBUG chapter 13 is totally empty
coudl you kindly share whihc link /info they can use for boundary and jtag dabug capabilities ?
thank you
BR
Carlo
Hey Carlo,
I am including some links below to provide additional information. We are actively working on content for the TRM chapter.
Emulation and Trace Headers Technical Reference Manual (https://www.ti.com/lit/pdf/spru655)
Designing for JTAG Emulation Reference Guide (https://www.ti.com/lit/ug/spru641/spru641.pdf)
XDS Target Connection Guide (https://dev.ti.com/tirex/explore/node?node=AEnDVmEAFjxrbZ8Vfn.lBg__FUz-xrs__LATEST)
Note that the AM64x debug subsystem will adhere to the JTAG IEEE 1149.1 Industry Standard.
Best Regards,
Zackary Fleenor
Hi All,
Please refer to the latest TRM for the updates. Refer below.
AM64x /AM243x Processors Silicon Revision 2.0
Texas Instruments Families of Products
SPRUIM2H – MAY 2020 – REVISED OCTOBER 2023
SPRUIM2H – MAY 2020 – REVISED OCTOBER 2023
AM64x /AM243x Processors Silicon Revision 2.0
Chapter 13
On-Chip Debug
This chapter describes the on-chip debug support including details on the various capabilities and features
available through the SoC debug framework.
13.1 On-Chip Debug Overview.................................................................................................................................. 10406
13.2 On-Chip Debug Features................................................................................................................................... 10406
13.3 On-Chip Debug Functional Description........................................................................................................... 10407
Regards,
Sreenivasa