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DRA821U: Firewall 257 config

Part Number: DRA821U
Other Parts Discussed in Thread: DRA821

There're several questions regarding to the security functionalities and secure configuration on TDA4/DRA821U.

 

  1. We read from document that currently there're 3 master firewalls in TDA4/DRA821U, 

     which arbitrates memory access transactions from A72SS0, C71SS0, DRU.

     Is C71SS0 available on DRA821U? If yes, which hardware component does C71SS0 refer to?

 

  1. How could we configure the system to prevent DMA to/from a given range of physical memory?

    From the document, we read that DRU manages DMA request. 

    Hence, could we configure DRU on DRA821U to block DMA from/to given memory range? If not, how could we do that?

  • Hi Xinwei,

    C71SS0 is the next-generation DSP from TI. There is no C71SS0 on DRA821.

    regards

    Suman

  • Regarding restricting DMA,

    While I have not tested it, my understanding is that the DMA transaction will inherit from the originator of the request.  For example, an A72 initiated DMA transfer would show as a A72 access to source address programmed in the DMA descriptor.  Firewalls can be programmed accordingly to prevent DMA access to a particular memory range.

    Please note that the PVU can also be used to restrict DMA transactions.  See TRM 8.3 Peripheral Virtualization Unit.

    Regards,

    kb