Because of the Thanksgiving holiday in the U.S., TI E2E design support forum responses may be delayed the week of Nov. 21. Thank you for your patience.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4VM-Q1: How to change TDA4VM LPDDR4 period training interval time.

Part Number: TDA4VM-Q1

Hi Experts:

Now we know that disable LPDDR4 DQ training setting.

But our customer want to know whether have method to increase the DQ training interval to 1-2 second level. They think that our DQ training strategy interval is ms level the windows is too short.

Because IC temperate change is not very fast, DQ training interval windows to second level meet their request. They will more better LPDDR4 access performance because they found that DQ training will affect Main domain R5F access LPDDR4 latency stability.

Best Regards!

Han Tao