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66AK2E05: How to Configure gbe interfaces as switch.

Part Number: 66AK2E05

Hello,

I have a working example of using 4 netcp-interfaces independently by assigning a local mac address to each one.

I am trying to change this and configure the same 4 netcp-interfaces as SWITCH. 

I tried to remove "local-mac-address" and assign efuse-mac = <0x0>;  to those interfaces in device tree but it did not work. 

  1. Can this configuration be done only using Device Tree, or i need to do more steps?
  2. Is there any example device tree i could use? 
  3. How could i fix this device tree in order to do it.

I attach the device tree i am currently using.  

/dts-v1/;

/ {
	compatible = "ti,k2e", "ti,keystone";
	model = "Example board";
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	interrupt-parent = <0x1>;

	aliases {
		serial0 = "/soc@0/serial@2530c00";
		spi0 = "/soc@0/spi@21000400";
		spi1 = "/soc@0/spi@21000600";
		spi2 = "/soc@0/spi@21000800";
		rproc0 = "/soc@0/dsp@10800000";
	};

	chosen {
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x40000000>;
	};

	interrupt-controller@2561000 {
		compatible = "arm,gic-400", "arm,cortex-a15-gic";
		#interrupt-cells = <0x3>;
		interrupt-controller;
		reg = <0x0 0x2561000 0x0 0x1000 0x0 0x2562000 0x0 0x2000 0x0 0x2564000 0x0 0x2000 0x0 0x2566000 0x0 0x2000>;
		interrupts = <0x1 0x9 0xf04>;
		phandle = <0x1>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
	};

	pmu {
		compatible = "arm,cortex-a15-pmu";
		interrupts = <0x0 0x14 0x1 0x0 0x15 0x1 0x0 0x16 0x1 0x0 0x17 0x1>;
	};

	psci {
		compatible = "arm,psci";
		method = "smc";
		cpu_suspend = <0x84000001>;
		cpu_off = <0x84000002>;
		cpu_on = <0x84000003>;
	};

	soc@0 {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		compatible = "ti,keystone", "simple-bus";
		interrupt-parent = <0x1>;
		ranges = <0x0 0x0 0x0 0xc0000000>;
		dma-ranges = <0x80000000 0x8 0x0 0x80000000>;

		pll-controller@2310000 {
			compatible = "ti,keystone-pllctrl", "syscon";
			reg = <0x2310000 0x200>;
			phandle = <0x3>;
		};

		power-sleep-controller@2350000 {
			compatible = "syscon", "simple-mfd";
			reg = <0x2350000 0x1000>;

			reset-controller {
				compatible = "ti,k2e-pscrst", "ti,syscon-reset";
				#reset-cells = <0x1>;
				ti,reset-bits = <0xa3c 0x8 0xa3c 0x8 0x83c 0x8 0x10>;
				phandle = <0x27>;
			};
		};

		device-state-control@2620000 {
			compatible = "ti,keystone-devctrl", "syscon", "simple-mfd";
			reg = <0x2620000 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x2620000 0x1000>;
			phandle = <0x2>;

			keystone_irq@2a0 {
				compatible = "ti,keystone-irq";
				reg = <0x2a0 0x4>;
				interrupts = <0x0 0x4 0x1>;
				interrupt-controller;
				#interrupt-cells = <0x1>;
				ti,syscon-dev = <0x2 0x2a0>;
				phandle = <0x28>;
			};

			pcie-devid@128 {
				compatible = "syscon";
				reg = <0x128 0x4>;
				phandle = <0x22>;
			};

			pcie-mode@14c {
				compatible = "syscon";
				reg = <0x14c 0x4>;
				phandle = <0x23>;
			};

			reset-controller@328 {
				compatible = "ti,keystone-reset";
				reg = <0x328 0x10>;
				ti,syscon-pll = <0x3 0xe4>;
				ti,syscon-dev = <0x2 0x328>;
				ti,wdt-list = <0x0>;
			};

			keystone_dsp_gpio@240 {
				compatible = "ti,keystone-dsp-gpio";
				reg = <0x240 0x4>;
				gpio-controller;
				#gpio-cells = <0x2>;
				gpio,syscon-dev = <0x2 0x240>;
				phandle = <0x29>;
			};
		};

		clocks {
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;

			mainmuxclk@2310108 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-mux-clock";
				clocks = <0x4 0x5>;
				reg = <0x2310108 0x4>;
				bit-shift = <0x17>;
				bit-mask = <0x1>;
				clock-output-names = "mainmuxclk";
				phandle = <0x6>;
			};

			chipclk1 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x6>;
				clock-div = <0x1>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1";
				phandle = <0x7>;
			};

			chipclk1rstiso {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x6>;
				clock-div = <0x1>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso";
				phandle = <0x9>;
			};

			gemtraceclk@2310120 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-divider-clock";
				clocks = <0x6>;
				reg = <0x2310120 0x4>;
				bit-shift = <0x0>;
				bit-mask = <0x8>;
				clock-output-names = "gemtraceclk";
			};

			chipstmxptclk@2310164 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-divider-clock";
				clocks = <0x6>;
				reg = <0x2310164 0x4>;
				bit-shift = <0x0>;
				bit-mask = <0x8>;
				clock-output-names = "chipstmxptclk";
			};

			chipclk12 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x2>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk12";
				phandle = <0xe>;
			};

			chipclk13 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x3>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk13";
				phandle = <0xb>;
			};

			paclk13 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x8>;
				clock-div = <0x3>;
				clock-mult = <0x1>;
				clock-output-names = "paclk13";
				phandle = <0xc>;
			};

			chipclk14 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x4>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk14";
			};

			chipclk16 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x6>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk16";
				phandle = <0xa>;
			};

			chipclk112 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0xc>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk112";
			};

			chipclk124 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x7>;
				clock-div = <0x18>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk114";
			};

			chipclk1rstiso13 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x9>;
				clock-div = <0x3>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso13";
			};

			chipclk1rstiso14 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x9>;
				clock-div = <0x4>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso14";
			};

			chipclk1rstiso16 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x9>;
				clock-div = <0x6>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso16";
			};

			chipclk1rstiso112 {
				#clock-cells = <0x0>;
				compatible = "fixed-factor-clock";
				clocks = <0x9>;
				clock-div = <0xc>;
				clock-mult = <0x1>;
				clock-output-names = "chipclk1rstiso112";
				phandle = <0xf>;
			};

			clkmodrst0@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xa>;
				clock-output-names = "modrst0";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x10>;
			};

			clkusb@2350008 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xa>;
				clock-output-names = "usb";
				reg = <0x2350008 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x19>;
			};

			clkaemifspi@235000c {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xa>;
				clock-output-names = "aemif-spi";
				reg = <0x235000c 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x11>;
			};

			clkdebugsstrc@2350014 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "debugss-trc";
				reg = <0x2350014 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x1>;
			};

			clktetbtrc@2350018 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "tetb-trc";
				reg = <0x2350018 0xb00 0x2350004 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x1>;
			};

			clkpa@235001c {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xc>;
				clock-output-names = "pa";
				reg = <0x235001c 0xb00 0x2350008 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x2>;
				phandle = <0xd>;
			};

			clkcpgmac@2350020 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xd>;
				clock-output-names = "cpgmac";
				reg = <0x2350020 0xb00 0x2350008 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x2>;
				phandle = <0x2e>;
			};

			clksa@2350024 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xd>;
				clock-output-names = "sa";
				reg = <0x2350024 0xb00 0x2350008 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x2>;
				phandle = <0x3e>;
			};

			clkpcie@2350028 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xe>;
				clock-output-names = "pcie";
				reg = <0x2350028 0xb00 0x235000c 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x3>;
				phandle = <0x1f>;
			};

			clksr@2350034 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xf>;
				clock-output-names = "sr";
				reg = <0x2350034 0xb00 0x2350018 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x6>;
				phandle = <0x43>;
			};

			clkgem0@235003c {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x7>;
				clock-output-names = "gem0";
				reg = <0x235003c 0xb00 0x2350020 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x8>;
				phandle = <0x26>;
			};

			clkddr30@235005c {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xe>;
				clock-output-names = "ddr3-0";
				reg = <0x235005c 0xb00 0x2350040 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x10>;
			};

			clkwdtimer0@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer0";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x1b>;
			};

			clkwdtimer1@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer1";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			clkwdtimer2@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer2";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			clkwdtimer3@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer3";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			clktimer15@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "timer15";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x1c>;
			};

			clkuart0@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "uart0";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x14>;
			};

			clkuart1@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "uart1";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x15>;
			};

			clkaemif@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x11>;
				clock-output-names = "aemif";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x1e>;
			};

			clkusim@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "usim";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			clki2c@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "i2c";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x16>;
			};

			clkspi@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x11>;
				clock-output-names = "spi";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x17>;
			};

			clkgpio@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "gpio";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x1d>;
			};

			clkkeymgr@2350000 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0x10>;
				clock-output-names = "keymgr";
				reg = <0x2350000 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
			};

			mainpllclk@2310110 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,main-pll-clock";
				clocks = <0x5>;
				reg = <0x2620350 0x4 0x2310110 0x4 0x2310108 0x4>;
				reg-names = "control", "multiplier", "post-divider";
				phandle = <0x4>;
			};

			papllclk@2620358 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-clock";
				clocks = <0x12>;
				clock-output-names = "papllclk";
				reg = <0x2620358 0x4>;
				reg-names = "control";
				phandle = <0x8>;
			};

			ddr3apllclk@2620360 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,pll-clock";
				clocks = <0x13>;
				clock-output-names = "ddr-3a-pll-clk";
				reg = <0x2620360 0x4>;
				reg-names = "control";
			};

			clkusb1@2350004 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xa>;
				clock-output-names = "usb1";
				reg = <0x2350004 0xb00 0x2350000 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x0>;
				phandle = <0x24>;
			};

			clkhyperlink0@2350030 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xe>;
				clock-output-names = "hyperlink-0";
				reg = <0x2350030 0xb00 0x2350014 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x5>;
				phandle = <0x42>;
			};

			clkpcie1@235006c {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xe>;
				clock-output-names = "pcie1";
				reg = <0x235006c 0xb00 0x2350048 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x12>;
				phandle = <0x2b>;
			};

			clkxge@23500c8 {
				#clock-cells = <0x0>;
				compatible = "ti,keystone,psc-clock";
				clocks = <0xb>;
				clock-output-names = "xge";
				reg = <0x23500c8 0xb00 0x2350074 0x400>;
				reg-names = "control", "domain";
				domain-id = <0x1d>;
			};

			refclksys {
				#clock-cells = <0x0>;
				compatible = "fixed-clock";
				clock-frequency = <0x5f5e100>;
				clock-output-names = "refclk-sys";
				phandle = <0x5>;
			};

			refclkpass {
				#clock-cells = <0x0>;
				compatible = "fixed-clock";
				clock-frequency = <0x5f5e100>;
				clock-output-names = "refclk-pass";
				phandle = <0x12>;
			};

			refclkddr3a {
				#clock-cells = <0x0>;
				compatible = "fixed-clock";
				clock-frequency = <0x5f5e100>;
				clock-output-names = "refclk-ddr3a";
				phandle = <0x13>;
			};

			canclk {
				compatible = "fixed-clock";
				#clock-cells = <0x0>;
				clock-frequency = <0x1312d00>;
				clock-output-names = "can-clk";
				phandle = <0x18>;
			};
		};

		serial@2530c00 {
			compatible = "ti,da830-uart", "ns16550a";
			current-speed = <0x1c200>;
			reg-shift = <0x2>;
			reg-io-width = <0x4>;
			reg = <0x2530c00 0x100>;
			clocks = <0x14>;
			interrupts = <0x0 0x115 0x1>;
		};

		serial@2531000 {
			compatible = "ti,da830-uart", "ns16550a";
			current-speed = <0x1c200>;
			reg-shift = <0x2>;
			reg-io-width = <0x4>;
			reg = <0x2531000 0x100>;
			clocks = <0x15>;
			interrupts = <0x0 0x118 0x1>;
		};

		i2c@2530000 {
			compatible = "ti,davinci-i2c";
			reg = <0x2530000 0x400>;
			clock-frequency = <0x186a0>;
			clocks = <0x16>;
			interrupts = <0x0 0x11b 0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			24aa1025-block0@51 {
				compatible = "atmel,24c512";
				pagesize = <0x100>;
				reg = <0x51>;
			};

			24aa1025-block2@55 {
				compatible = "atmel,24c512";
				pagesize = <0x100>;
				reg = <0x55>;
			};
		};

		i2c@2530400 {
			compatible = "ti,davinci-i2c";
			reg = <0x2530400 0x400>;
			clock-frequency = <0x186a0>;
			clocks = <0x16>;
			interrupts = <0x0 0x11e 0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			rtc@52 {
				compatible = "microcrystal,rv3028";
				reg = <0x52>;
				status = "okay";
			};
		};

		i2c@2530800 {
			compatible = "ti,davinci-i2c";
			reg = <0x2530800 0x400>;
			clock-frequency = <0x186a0>;
			clocks = <0x16>;
			interrupts = <0x0 0x121 0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		spi@21000400 {
			compatible = "ti,keystone-spi", "ti,dm6441-spi";
			reg = <0x21000400 0x200>;
			num-cs = <0x4>;
			ti,davinci-spi-intr-line = <0x0>;
			interrupts = <0x0 0x124 0x1>;
			clocks = <0x17>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			n25q128a11@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				compatible = "Micron,n25q128a11";
				spi-max-frequency = <0x337f980>;
				m25p,fast-read;
				reg = <0x0>;

				partition@0 {
					label = "u-boot-spl";
					reg = <0x0 0x100000>;
					read-only;
				};

				partition@1 {
					label = "params";
					reg = <0x100000 0x40000>;
				};

				partition@2 {
					label = "skern-k2e";
					reg = <0x140000 0x10000>;
				};

				partition@3 {
					label = "fw-initrd";
					reg = <0x150000 0x20000>;
				};

				partition@4 {
					label = "fpga-bin";
					reg = <0x170000 0x300000>;
				};

				partition@5 {
					label = "kernel";
					reg = <0x470000 0xb00000>;
				};

				partition@6 {
					label = "dtb";
					reg = <0xf70000 0x10000>;
				};
			};
		};

		spi@21000600 {
			compatible = "ti,keystone-spi", "ti,dm6441-spi";
			reg = <0x21000600 0x200>;
			num-cs = <0x4>;
			ti,davinci-spi-intr-line = <0x0>;
			interrupts = <0x0 0x128 0x1>;
			clocks = <0x17>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			mcp2518fd@0 {
				compatible = "microchip,mcp2518fd", "microchip,mcp2515";
				reg = <0x0>;
				spi-max-frequency = <0xf4240>;
				clocks = <0x18>;
				status = "okay";
			};
		};

		spi@21000800 {
			compatible = "ti,keystone-spi", "ti,dm6441-spi";
			reg = <0x21000800 0x200>;
			num-cs = <0x4>;
			ti,davinci-spi-intr-line = <0x0>;
			interrupts = <0x0 0x12c 0x1>;
			clocks = <0x17>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			is62wvs5128@0 {
				compatible = "issi,is62wvs5128";
				spi-max-frequency = <0x2dc6c0>;
				reg = <0x0>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;

				die@0 {
					label = "crypto-keys1";
					reg = <0x0 0x40000>;
				};

				die@1 {
					label = "crypto-keys2";
					reg = <0x40000 0x40000>;
				};
			};
		};

		usb_phy@2620738 {
			compatible = "ti,keystone-usbphy";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0x2620738 0x18>;
			status = "okay";
			phandle = <0x1a>;
		};

		usb@2680000 {
			compatible = "ti,keystone-dwc3";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0x2680000 0x10000>;
			clocks = <0x19>;
			clock-names = "usb";
			interrupts = <0x0 0x98 0x1>;
			ranges;
			dma-coherent;
			dma-ranges;
			status = "okay";

			dwc3@2690000 {
				compatible = "synopsys,dwc3";
				reg = <0x2690000 0x70000>;
				interrupts = <0x0 0x98 0x1>;
				usb-phy = <0x1a 0x1a>;
				dr_mode = "host";
			};
		};

		wdt@22f0080 {
			compatible = "ti,keystone-wdt", "ti,davinci-wdt";
			reg = <0x22f0080 0x80>;
			clocks = <0x1b>;
		};

		timer@22f0000 {
			compatible = "ti,keystone-timer";
			reg = <0x22f0000 0x80>;
			interrupts = <0x0 0x6e 0x1>;
			clocks = <0x1c>;
		};

		gpio@260bf00 {
			compatible = "ti,keystone-gpio";
			reg = <0x260bf00 0x100>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupts = <0x0 0x78 0x1 0x0 0x79 0x1 0x0 0x7a 0x1 0x0 0x7b 0x1 0x0 0x7c 0x1 0x0 0x7d 0x1 0x0 0x7e 0x1 0x0 0x7f 0x1 0x0 0x80 0x1 0x0 0x81 0x1 0x0 0x82 0x1 0x0 0x83 0x1 0x0 0x84 0x1 0x0 0x85 0x1 0x0 0x86 0x1 0x0 0x87 0x1 0x0 0x88 0x1 0x0 0x89 0x1 0x0 0x8a 0x1 0x0 0x8b 0x1 0x0 0x8c 0x1 0x0 0x8d 0x1 0x0 0x8e 0x1 0x0 0x8f 0x1 0x0 0x90 0x1 0x0 0x91 0x1 0x0 0x92 0x1 0x0 0x93 0x1 0x0 0x94 0x1 0x0 0x95 0x1 0x0 0x96 0x1 0x0 0x97 0x1>;
			clocks = <0x1d>;
			clock-names = "gpio";
			ti,ngpio = <0x20>;
			ti,davinci-gpio-unbanked = <0x20>;
			phandle = <0x3f>;

			usb0_vbus_en {
				gpio-hog;
				gpios = <0x7 0x0>;
				output-high;
				line-name = "USB0_VBUS_EN";
			};

			usb1_vbus_en {
				gpio-hog;
				gpios = <0x4 0x0>;
				output-high;
				line-name = "USB1_VBUS_EN";
			};
		};

		aemif@21000A00 {
			compatible = "ti,keystone-aemif", "ti,davinci-aemif";
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			clocks = <0x1e>;
			clock-names = "aemif";
			clock-ranges;
			reg = <0x21000a00 0x100>;
			ranges = <0x0 0x0 0x30000000 0x10000000 0x1 0x0 0x21000a00 0x100>;

			cs0 {
				#address-cells = <0x2>;
				#size-cells = <0x1>;
				clock-ranges;
				ranges;
				ti,cs-chipselect = <0x0>;
				ti,cs-min-turnaround-ns = <0xc>;
				ti,cs-read-hold-ns = <0x6>;
				ti,cs-read-strobe-ns = <0x17>;
				ti,cs-read-setup-ns = <0x9>;
				ti,cs-write-hold-ns = <0x8>;
				ti,cs-write-strobe-ns = <0x17>;
				ti,cs-write-setup-ns = <0x8>;

				nand@0,0 {
					compatible = "ti,keystone-nand", "ti,davinci-nand";
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					reg = <0x0 0x0 0x4000000 0x1 0x0 0x100>;
					ti,davinci-chipselect = <0x0>;
					ti,davinci-mask-ale = <0x2000>;
					ti,davinci-mask-cle = <0x4000>;
					ti,davinci-mask-chipsel = <0x0>;
					nand-ecc-mode = "on-die";
					nand-on-flash-bbt;

					partition@0 {
						label = "rootfs";
						reg = <0x0 0x32000000>;
					};

					partition@32040000 {
						label = "storage";
						reg = <0x32040000 0xdfc0000>;
					};
				};
			};

			cs1@34000000 {
				#address-cells = <0x2>;
				#size-cells = <0x1>;
				clock-ranges;
				ranges;
				ti,cs-chipselect = <0x1>;
				ti,cs-bus-width = <0x10>;
				ti,cs-select-strobe-mode;
				ti,cs-write-setup-ns = <0x8>;
				ti,cs-write-strobe-ns = <0x33>;
				ti,cs-write-hold-ns = <0x8>;
				ti,cs-read-setup-ns = <0x8>;
				ti,cs-read-strobe-ns = <0x7c>;
				ti,cs-read-hold-ns = <0x15>;
			};
		};

		phy@2320000 {
			#phy-cells = <0x0>;
			compatible = "ti,keystone-serdes-pcie";
			reg = <0x2320000 0x4000>;
			link-rate-kbps = <0x4c4b40>;
			num-lanes = <0x2>;
			status = "okay";
			phandle = <0x20>;
		};

		pcie@21800000 {
			compatible = "ti,keystone-pcie", "snps,dw-pcie";
			reg = <0x21800000 0x1000 0x21801000 0x1000 0x21802000 0x1000>;
			reg-names = "app", "dbics", "config";
			clocks = <0x1f>;
			clock-names = "fck";
			#address-cells = <0x3>;
			#size-cells = <0x2>;
			ranges = <0x81000000 0x0 0x0 0x50000000 0x0 0x100000 0x82000000 0x0 0x50100000 0x50100000 0x0 0xff00000>;
			status = "okay";
			device_type = "pci";
			num-lanes = <0x2>;
			num-viewport = <0x20>;
			bus-range = <0x0 0xff>;
			phys = <0x20>;
			interrupts = <0x0 0x26 0x1>;
			#interrupt-cells = <0x1>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x21 0x0 0x1 0x0 0x0 0x0 0x2 0x21 0x1 0x1 0x0 0x0 0x0 0x3 0x21 0x2 0x1 0x0 0x0 0x0 0x4 0x21 0x3 0x1>;
			ti,syscon-pcie-id = <0x22>;
			ti,syscon-pcie-mode = <0x23>;

			msi-interrupt-controller {
				interrupt-controller;
				#interrupt-cells = <0x1>;
				interrupt-parent = <0x1>;
				interrupts = <0x0 0x1e 0x1 0x0 0x1f 0x1 0x0 0x20 0x1 0x0 0x21 0x1 0x0 0x22 0x1 0x0 0x23 0x1 0x0 0x24 0x1 0x0 0x25 0x1>;
			};

			legacy-interrupt-controller {
				interrupt-controller;
				#interrupt-cells = <0x2>;
				interrupt-parent = <0x1>;
				interrupts = <0x0 0x1a 0x1 0x0 0x1b 0x1 0x0 0x1c 0x1 0x0 0x1d 0x1>;
				phandle = <0x21>;
			};
		};

		emif@21010000 {
			compatible = "ti,emif-keystone";
			reg = <0x21010000 0x200>;
			interrupts = <0x0 0x1c0 0x1>;
			interrupt-parent = <0x1>;
		};

		usb_phy@2620750 {
			compatible = "ti,keystone-usbphy";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0x2620750 0x18>;
			status = "okay";
			phandle = <0x25>;
		};

		usb@25000000 {
			compatible = "ti,keystone-dwc3";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			reg = <0x25000000 0x10000>;
			clocks = <0x24>;
			clock-names = "usb";
			interrupts = <0x0 0x19e 0x1>;
			ranges;
			dma-coherent;
			dma-ranges;
			status = "okay";

			dwc3@25010000 {
				compatible = "synopsys,dwc3";
				reg = <0x25010000 0x70000>;
				interrupts = <0x0 0x19e 0x1>;
				usb-phy = <0x25 0x25>;
				dr_mode = "host";
			};
		};

		msmram@c000000 {
			compatible = "mmio-sram";
			reg = <0xc000000 0x200000>;
			ranges = <0x0 0xc000000 0x200000>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;

			sram-mpm@0 {
				compatible = "ti,keystone-dsp-msm-ram";
				reg = <0x0 0x1e8000>;
			};

			sram-bm@1f0000 {
				reg = <0x1f0000 0x8000>;
			};

			sram-cmem@1e8000 {
				reg = <0x1e8000 0x8000>;
				phandle = <0x41>;
			};
		};

		dsp@10800000 {
			compatible = "ti,k2e-dsp";
			reg = <0x10800000 0x80000 0x10e00000 0x8000 0x10f00000 0x8000>;
			reg-names = "l2sram", "l1pram", "l1dram";
			clocks = <0x26>;
			ti,syscon-dev = <0x2 0x844>;
			resets = <0x27 0x0>;
			interrupt-parent = <0x28>;
			interrupts = <0x0 0x8>;
			interrupt-names = "vring", "exception";
			kick-gpios = <0x29 0x1b 0x0>;
			status = "okay";
			memory-region = <0x2a>;
		};

		phy@2326000 {
			#phy-cells = <0x0>;
			compatible = "ti,keystone-serdes-pcie";
			reg = <0x2326000 0x4000>;
			link-rate-kbps = <0x4c4b40>;
			num-lanes = <0x2>;
			status = "okay";
			phandle = <0x2c>;
		};

		pcie@21020000 {
			compatible = "ti,keystone-pcie", "snps,dw-pcie";
			reg = <0x21020000 0x1000 0x21021000 0x1000 0x21022000 0x1000>;
			reg-names = "app", "dbics", "config";
			clocks = <0x2b>;
			clock-names = "fck";
			#address-cells = <0x3>;
			#size-cells = <0x2>;
			ranges = <0x81000000 0x0 0x0 0x60000000 0x0 0x100000 0x82000000 0x0 0x60100000 0x60100000 0x0 0xff00000>;
			ti,syscon-pcie-id = <0x22>;
			ti,syscon-pcie-mode = <0x23>;
			status = "okay";
			device_type = "pci";
			num-lanes = <0x2>;
			num-viewport = <0x20>;
			bus-range = <0x0 0xff>;
			phys = <0x2c>;
			interrupts = <0x0 0x181 0x1>;
			#interrupt-cells = <0x1>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x2d 0x0 0x1 0x0 0x0 0x0 0x2 0x2d 0x1 0x1 0x0 0x0 0x0 0x3 0x2d 0x2 0x1 0x0 0x0 0x0 0x4 0x2d 0x3 0x1>;

			msi-interrupt-controller {
				interrupt-controller;
				#interrupt-cells = <0x1>;
				interrupt-parent = <0x1>;
				interrupts = <0x0 0x179 0x1 0x0 0x17a 0x1 0x0 0x17b 0x1 0x0 0x17c 0x1 0x0 0x17d 0x1 0x0 0x17e 0x1 0x0 0x17f 0x1 0x0 0x180 0x1>;
			};

			legacy-interrupt-controller {
				interrupt-controller;
				#interrupt-cells = <0x2>;
				interrupt-parent = <0x1>;
				interrupts = <0x0 0x175 0x1 0x0 0x176 0x1 0x0 0x177 0x1 0x0 0x178 0x1>;
				phandle = <0x2d>;
			};
		};

		mdio@24200f00 {
			compatible = "ti,keystone_mdio", "ti,davinci_mdio";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg = <0x24200f00 0x100>;
			status = "ok";
			clocks = <0x2e>;
			clock-names = "fck";
			bus_freq = <0x2625a0>;

			ethernet-phy@0 {
				compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
				reg = <0x0>;
				phandle = <0x32>;
			};

			ethernet-phy@1 {
				compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
				reg = <0x1>;
				phandle = <0x34>;
			};

			ethernet-phy@2 {
				compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
				reg = <0x2>;
				phandle = <0x36>;
			};

			ethernet-phy@3 {
				compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
				reg = <0x3>;
				phandle = <0x38>;
			};
		};

		qmss@2a40000 {
			compatible = "ti,keystone-navigator-qmss";
			dma-coherent;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			clocks = <0xb>;
			ranges;
			queue-range = <0x0 0x2000>;
			linkram0 = <0x100000 0x4000>;
			linkram1 = <0x0 0x10000>;

			qmgrs {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				qmgr0 {
					managed-queues = <0x0 0x2000>;
					reg = <0x2a40000 0x20000 0x2a06000 0x400 0x2a02000 0x1000 0x2a03000 0x1000 0x23a80000 0x20000 0x2a80000 0x20000>;
					reg-names = "peek", "status", "config", "region", "push", "pop";
				};
			};

			queue-pools {

				qpend {

					qpend-0 {
						qrange = <0x292 0x8>;
						interrupts = <0x0 0x28 0xf04 0x0 0x29 0xf04 0x0 0x2a 0xf04 0x0 0x2b 0xf04 0x0 0x2c 0xf04 0x0 0x2d 0xf04 0x0 0x2e 0xf04 0x0 0x2f 0xf04>;
					};

					qpend-1 {
						qrange = <0x210 0x10>;
						interrupts = <0x0 0x30 0xf04 0x0 0x31 0xf04 0x0 0x32 0xf04 0x0 0x33 0xf04 0x0 0x34 0xf04 0x0 0x35 0xf04 0x0 0x36 0xf04 0x0 0x37 0xf04 0x0 0x38 0xf04 0x0 0x39 0xf04 0x0 0x3a 0xf04 0x0 0x3b 0xf04 0x0 0x3c 0xf04 0x0 0x3d 0xf04 0x0 0x3e 0xf04 0x0 0x3f 0xf04>;
						qalloc-by-id;
					};

					qpend-2 {
						qrange = <0x220 0x10>;
						interrupts = <0x0 0x40 0xf04 0x0 0x41 0xf04 0x0 0x42 0xf04 0x0 0x3b 0xf04 0x0 0x44 0xf04 0x0 0x45 0xf04 0x0 0x46 0xf04 0x0 0x47 0xf04 0x0 0x48 0xf04 0x0 0x49 0xf04 0x0 0x4a 0xf04 0x0 0x4b 0xf04 0x0 0x4c 0xf04 0x0 0x4d 0xf04 0x0 0x4e 0xf04 0x0 0x4f 0xf04>;
					};
				};

				general-purpose {

					gp-0 {
						qrange = <0xfa0 0x40>;
					};

					netcp-tx {
						qrange = <0x380 0x80>;
						qalloc-by-id;
					};
				};

				accumulator {

					acc-low-0 {
						qrange = <0x1e0 0x20>;
						accumulator = <0x0 0x2f 0x10 0x2 0x32>;
						interrupts = <0x0 0xe2 0xf01>;
						multi-queue;
						qalloc-by-id;
					};
				};
			};

			descriptor-regions {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				region-12 {
					id = <0xc>;
					region-spec = <0x2000 0x80>;
					link-index = <0x4000>;
				};
			};

			pdsps {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				pdsp0@2a10000 {
					reg = <0x2a10000 0x1000 0x2a0f000 0x100 0x2a0c000 0x3c8 0x2a20000 0x4000>;
					id = <0x0>;
				};
			};
		};

		knav_dmas@0 {
			compatible = "ti,keystone-navigator-dma";
			clocks = <0x8>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			ti,navigator-cloud-address = <0x23a80000 0x23a90000 0x23a80000 0x23a90000>;

			dma_gbe@0 {
				reg = <0x24186000 0x100 0x24187000 0x2a0 0x24188000 0xb60 0x24186100 0x80 0x24189000 0x1000>;
				reg-names = "global", "txchan", "rxchan", "txsched", "rxflow";
				ti,enable-all;
				phandle = <0x2f>;
			};
		};

		subsys@24200000 {
			compatible = "syscon";
			reg = <0x24200000 0x100>;
			phandle = <0x30>;
		};

		phy@232a000 {
			compatible = "ti,keystone-serdes-gbe";
			reg = <0x232a000 0x2000>;
			status = "okay";
			link-rate-kbps = <0x1312d0>;
			num-lanes = <0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			lane@0 {
				#phy-cells = <0x0>;
				reg = <0x0>;
				status = "ok";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
			};

			lane@1 {
				#phy-cells = <0x0>;
				reg = <0x1>;
				status = "ok";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
				phandle = <0x31>;
			};

			lane@2 {
				#phy-cells = <0x0>;
				reg = <0x2>;
				status = "ok";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
				phandle = <0x33>;
			};

			lane@3 {
				#phy-cells = <0x0>;
				reg = <0x3>;
				status = "ok";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
				phandle = <0x35>;
			};
		};

		phy@2324000 {
			compatible = "ti,keystone-serdes-gbe";
			reg = <0x2324000 0x2000>;
			status = "okay";
			link-rate-kbps = <0x1312d0>;
			num-lanes = <0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			lane@0 {
				#phy-cells = <0x0>;
				reg = <0x0>;
				status = "ok";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
				phandle = <0x37>;
			};

			lane@1 {
				#phy-cells = <0x0>;
				reg = <0x1>;
				status = "disabled";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
			};

			lane@2 {
				#phy-cells = <0x0>;
				reg = <0x2>;
				status = "disabled";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
			};

			lane@3 {
				#phy-cells = <0x0>;
				reg = <0x3>;
				status = "disabled";
				control-rate = <0x2>;
				rx-start = <0x7 0x5>;
				rx-force = <0x1 0x1>;
				tx-coeff = <0x0 0x0 0x0 0xc 0x4>;
			};
		};

		netcp@24000000 {
			reg = <0x2620110 0x8>;
			reg-names = "efuse";
			compatible = "ti,netcp-1.0";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x24000000 0x1000000>;
			clocks = <0xd 0x2e 0xe>;
			clock-names = "pa_clk", "ethss_clk", "cpts";
			dma-coherent;
			ti,navigator-dmas = <0x2f 0x8 0x2f 0x10 0x2f 0x18 0x2f 0x20 0x2f 0x0>;
			ti,navigator-dma-names = "netrx0", "netrx1", "netrx2", "netrx3", "nettx";

			netcp-devices {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges;

				gbe@200000 {
					label = "netcp-gbe";
					compatible = "ti,netcp-gbe-9";
					syscon-subsys = <0x30>;
					reg = <0x200100 0x800 0x220000 0x20000>;
					tx-queue = <0x380>;
					tx-channel = "nettx";

					interfaces {

						interface-0 {
							phys = <0x31>;
							slave-port = <0x1>;
							link-interface = <0x1>;
							phy-handle = <0x32>;
							phandle = <0x39>;
						};

						interface-1 {
							phys = <0x33>;
							slave-port = <0x2>;
							link-interface = <0x1>;
							phy-handle = <0x34>;
							phandle = <0x3a>;
						};

						interface-2 {
							phys = <0x35>;
							slave-port = <0x3>;
							link-interface = <0x1>;
							phy-handle = <0x36>;
							phandle = <0x3b>;
						};

						interface-3 {
							phys = <0x37>;
							slave-port = <0x4>;
							link-interface = <0x1>;
							phy-handle = <0x38>;
							phandle = <0x3c>;
						};
					};
				};
			};

			netcp-interfaces {

				interface-0 {
					rx-channel = "netrx0";
					rx-pool = <0x400 0xc>;
					tx-pool = <0x400 0xc>;
					rx-queue-depth = <0x80 0x80 0x0 0x0>;
					rx-buffer-size = <0x5ee 0x1000 0x0 0x0>;
					rx-queue = <0x210>;
					tx-completion-queue = <0x214>;
					efuse-mac = <0x1>;
					netcp-gbe = <0x39>;
				};

				interface-1 {
					rx-channel = "netrx1";
					rx-pool = <0x400 0xc>;
					tx-pool = <0x400 0xc>;
					rx-queue-depth = <0x80 0x80 0x0 0x0>;
					rx-buffer-size = <0x5ee 0x1000 0x0 0x0>;
					rx-queue = <0x211>;
					tx-completion-queue = <0x215>;
					efuse-mac = <0x0>;
					local-mac-address = [00 05 59 00 00 01];
					netcp-gbe = <0x3a>;
				};

				interface-2 {
					rx-channel = "netrx2";
					rx-pool = <0x400 0xc>;
					tx-pool = <0x400 0xc>;
					rx-queue-depth = <0x80 0x80 0x0 0x0>;
					rx-buffer-size = <0x5ee 0x1000 0x0 0x0>;
					rx-queue = <0x212>;
					tx-completion-queue = <0x216>;
					efuse-mac = <0x0>;
					local-mac-address = [00 05 59 00 00 02];
					netcp-gbe = <0x3b>;
				};

				interface-3 {
					rx-channel = "netrx3";
					rx-pool = <0x400 0xc>;
					tx-pool = <0x400 0xc>;
					rx-queue-depth = <0x80 0x80 0x0 0x0>;
					rx-buffer-size = <0x5ee 0x1000 0x0 0x0>;
					rx-queue = <0x213>;
					tx-completion-queue = <0x217>;
					efuse-mac = <0x0>;
					local-mac-address = [00 05 59 00 00 03];
					netcp-gbe = <0x3c>;
				};
			};
		};

		subsys@24080000 {
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			compatible = "simple-bus";
			ranges = <0x0 0x24080000 0x40000>;

			subsys@0 {
				compatible = "syscon";
				reg = <0x0 0x100>;
				phandle = <0x3d>;
			};

			rng@24000 {
				compatible = "ti,keystone-rng";
				reg = <0x24000 0x1000>;
				ti,syscon-sa-cfg = <0x3d>;
				clocks = <0x3e>;
				clock-names = "fck";
			};
		};

		leds {
			compatible = "gpio-leds";

			led_b_cpu {
				label = "led_b_cpu";
				gpios = <0x3f 0x1 0x0>;
				linux,default-trigger = "heartbeat";
			};

			led_g_cpu {
				label = "led_g_cpu";
				gpios = <0x3f 0x9 0x0>;
				linux,default-trigger = "timer";
			};

			led_r_cpu {
				label = "led_r_cpu";
				gpios = <0x3f 0xa 0x0>;
				linux,default-trigger = "mtd";
			};

			led_lan1 {
				label = "led_lan1";
				gpios = <0x3f 0xe 0x0>;
				trigger-sources = "netdev";
				default-state = "off";
			};

			led_lan2 {
				label = "led_lan2";
				gpios = <0x3f 0xf 0x0>;
				trigger-sources = "netdev";
				default-state = "off";
			};

			led_net1 {
				label = "led_net1";
				gpios = <0x3f 0x1e 0x0>;
				trigger-sources = "netdev";
				default-state = "off";
			};

			led_net2 {
				label = "led_net2";
				gpios = <0x3f 0x1f 0x0>;
				trigger-sources = "netdev";
				default-state = "off";
			};
		};
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		interrupt-parent = <0x1>;

		cpu@0 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0x0>;
		};

		cpu@1 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0x1>;
		};

		cpu@2 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0x2>;
		};

		cpu@3 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0x3>;
		};
	};

	reserved-memory {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		cmem_block_mem@830000000 {
			reg = <0x8 0x30000000 0x0 0x18000000>;
			no-map;
			status = "okay";
			phandle = <0x40>;
		};

		dsp-common-memory@81f800000 {
			compatible = "shared-dma-pool";
			reg = <0x8 0x1f800000 0x0 0x800000>;
			reusable;
			status = "okay";
			phandle = <0x2a>;
		};

		dsp-common-mpm-memory@820000000 {
			compatible = "ti,keystone-dsp-mem-pool";
			reg = <0x8 0x20000000 0x0 0x10000000>;
			no-map;
			status = "okay";
		};
	};

	cmem {
		compatible = "ti,cmem";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		#pool-size-cells = <0x2>;
		status = "okay";

		cmem_block@0 {
			reg = <0x0>;
			memory-region = <0x40>;
			cmem-buf-pools = <0x1 0x0 0x18000000>;
		};

		cmem_block@1 {
			reg = <0x1>;
			sram = <0x41>;
		};
	};

	soc {

		mpax {
			compatible = "ti,uio-module-drv";
			mem = <0xbc00000 0xa00>;
		};

		edma3 {
			compatible = "ti,uio-module-drv";
			mem = <0x2700000 0xc0000>;
		};

		secmgr {
			compatible = "ti,uio-module-drv";
			mem = <0x2500100 0x4>;
		};

		qmss {
			compatible = "ti,uio-module-drv";
			mem = <0x2a00000 0x100000 0x23a00000 0x200000>;
		};

		qpend0 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x2c 0xf04>;
			interrupt-mode = <0x1>;

			cfg-params {
				ti,qm-queue = <0x296>;
			};
		};

		qpend1 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x2d 0xf04>;
			interrupt-mode = <0x1>;

			cfg-params {
				ti,qm-queue = <0x297>;
			};
		};

		qpend2 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x2e 0xf04>;
			interrupt-mode = <0x1>;

			cfg-params {
				ti,qm-queue = <0x298>;
			};
		};

		qpend3 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x2f 0xf04>;
			interrupt-mode = <0x1>;

			cfg-params {
				ti,qm-queue = <0x299>;
			};
		};

		cic2_out32 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c3 0xf01>;
		};

		cic2_out33 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c4 0xf01>;
		};

		cic2_out34 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c5 0xf01>;
		};

		cic2_out35 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c6 0xf01>;
		};

		cic2_out36 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c7 0xf01>;
		};

		cic2_out37 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c8 0xf01>;
		};

		cic2_out38 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1c9 0xf01>;
		};

		cic2_out39 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1ca 0xf01>;
		};

		cic2_out40 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1cb 0xf01>;
		};

		cic2_out41 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1cc 0xf01>;
		};

		cic2_out42 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1cd 0xf01>;
		};

		cic2_out43 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1ce 0xf01>;
		};

		cic2_out44 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1cf 0xf01>;
		};

		cic2_out45 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d0 0xf01>;
		};

		cic2_out46 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d1 0xf01>;
		};

		cic2_out47 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d2 0xf01>;
		};

		cic2_out18 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d3 0xf01>;
		};

		cic2_out19 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d4 0xf01>;
		};

		cic2_out22 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d5 0xf01>;
		};

		cic2_out23 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d6 0xf01>;
		};

		cic2_out50 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d7 0xf01>;
		};

		cic2_out51 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d8 0xf01>;
		};

		cic2_out66 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1d9 0xf01>;
		};

		cic2_out67 {
			compatible = "ti,uio-module-drv";
			interrupts = <0x0 0x1da 0xf01>;
		};

		hyperlink0 {
			compatible = "ti,uio-module-drv";
			mem = <0x21400000 0x1000 0x40000000 0x10000000 0x231a000 0x2000>;
			clocks = <0x42>;
			interrupts = <0x0 0x183 0x101>;

			cfg-params {
				ti,serdes_refclk_khz = <0x4c4b4>;
				ti,serdes_maxserrate_khz = <0x5f5e10>;
				ti,serdes_lanerate = "half";
				ti,serdes_numlanes = <0x4>;
				ti,serdes_c1 = <0x4 0x4 0x4 0x4>;
				ti,serdes_c2 = <0x0 0x0 0x0 0x0>;
				ti,serdes_cm = <0x0 0x0 0x0 0x0>;
				ti,serdes_tx_att = <0xc 0xc 0xc 0xc>;
				ti,serdes_tx_vreg = <0x4 0x4 0x4 0x4>;
				ti,serdes_rx_att = <0xb 0xb 0xb 0xb>;
				ti,serdes_rx_boost = <0x3 0x3 0x3 0x3>;
			};
		};

		srss {
			compatible = "ti,uio-module-drv";
			mem = <0x2330000 0x400>;
			clocks = <0x43>;
			interrupts = <0x0 0x173 0xf01>;
		};
	};
};

Yours sincerely,

Konstantinos.