AM6546: Does the AM6546 ICSSG support TTS (Time-Triggered Send) function?

Hello Jun, 

Let me check internally and update you.

Regards,

Sreenivasa

Hello Jun, 

Please refer below thread.

(26) PROCESSOR-SDK-AM65X: TTS support - Processors forum - Processors - TI E2E support forums

Regards,

Sreenivasa,

Hello Jun, 

Please refer below thread.

(27) AM6442: AM6442: ICSS-EMAC TTS support - Processors - INTERNAL forum - Processors - INTERNAL - TI E2E support forums

Can you please share your use case.

Regards,

Sreenivasa,

Hello Sreenivasa

Thank you for replying to my questions.

Please refer below thread.

"(27) AM6442: AM6442: ICSS-EMAC TTS support - Processors - INTERNAL forum - Processors - INTERNAL - TI E2E support forums"

  => This URL is not accessible.

Can you please share your use case.

  => The cyclic communications is needed for I/O control or motion on EtherCAT.

Hello Jun, 

I copied the content that could be of use given you are looking at Ethercat application. 

I assume these answers your question on the TTS.

Gary,

Time Triggered Send (TTS) is not a standard IEEE feature. It is something promoted by Intel and supported in network interface cards (NIC's) like i210. In the past (before IEEE TSN features), we also had ICSS 100M implementations of this for EtherCAT master. Is the background using this for an EtherCAT master?

Standard IEEE Ethernet introduced the feature enhancements to scheduled traffic (EST), that can be viewed as a superset of TTS. The feature is also called time aware shaper. One can achieve the EtherCAT master use case (or many other TTS use cases) of TTS with EST by scheduling a periodic timeslot where only the EtherCAT master has the gate open, gates for all other traffic are closed. The EST feature is supported in the MCU+ SDK on ICSSG, software-dl.ti.com/.../EXAMPLES_ENET_ICSSG_TAS.html . The CPSW3G IP on AM64x also supports this feature, Linux SDK already ahs support and MCU+ SDK has it scheduled for 8.6.

Or is the query about matching the TTS feature of Intel i210?

Pekka

Hi Pekka,

Yes, it's the background using this for an EtherCAT master.

According to reference design of Ethercat master on AM57, it said that the jitter will be smaller than 10us with ICSS-EMAC TTS fucntion.

So customer want to do it on AM64 at the same way.

Gary,

With IEEE802.1Q TSN feature EST, it should be possible to meet sub 1us jitter on scheduling the periodic EtherCAT master frame on the wire. This is regardless of using ICSSG or CPSW3G based Ethernet. This will not need custom ICSS firmware, just the usage of the EST feature.

Pekka

Regards,

Sreenivasa