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TDA4VM-Q1: How to configure UFS devices(TDA4VH)

Part Number: TDA4VM-Q1
Other Parts Discussed in Thread: TDA4VH

Hi,

I have a EVM board of TDA4VH, I want to use the UFS device on the board, but the dts of j784s4 has no related configuration, how to configure dts?
By the way, how to test UFS devices?

BRs,

Allen

  • Hi expert,

    I use the ufs node of the j721 platform dts, and made some modifications, as follows,

    ufs_wrapper: ufs-wrapper@4e80000 {
    		compatible = "ti,j721e-ufs";
    		reg = <0x0 0x4e80000 0x0 0x100>;
    		power-domains = <&k3_pds 387 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 387 1>;
    		assigned-clocks = <&k3_clks 387 1>;
    		assigned-clock-parents = <&k3_clks 387 4>;
    		ranges;
    		#address-cells = <2>;
    		#size-cells = <2>;
    
    		ufs@4e84000 {
    			compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
    			reg = <0x0 0x4e84000 0x0 0x10000>;
    			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
    			freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>;
    			clocks = <&k3_clks 387 0>, <&k3_clks 387 1>, <&k3_clks 387 1>;
    			clock-names = "core_clk", "phy_clk", "ref_clk";
    			dma-coherent;
    		};
    	}

    After startup, the log is as follows:
    root@j784s4-evm:~# dmesg | grep ufs
    [    3.504353] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vdd-hba-supply regulator, assuming enabled
    [    3.514882] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vcc-supply regulator, assuming enabled
    [    3.525048] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vccq-supply regulator, assuming enabled
    [    3.535295] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vccq2-supply regulator, assuming enabled
    [    3.545907] cdns-ufshcd 4e84000.ufs: invalid ref_clk setting = 250000000
    [    3.552778] cdns-ufshcd 4e84000.ufs: ufshcd_setup_clocks: core_clk prepare enable failed, -19
    [    3.561302] cdns-ufshcd 4e84000.ufs: Initialization failed
    [    3.566925] cdns-ufshcd 4e84000.ufs: ufshcd_pltfrm_init() failed -19
    

    Allen

  • Allen,

    Looking at the errors:

    [ 3.545907] cdns-ufshcd 4e84000.ufs: invalid ref_clk setting = 250000000
    [ 3.552778] cdns-ufshcd 4e84000.ufs: ufshcd_setup_clocks: core_clk prepare enable failed, -19
    [ 3.561302] cdns-ufshcd 4e84000.ufs: Initialization failed
    [ 3.566925] cdns-ufshcd 4e84000.ufs: ufshcd_pltfrm_init() failed -19

    The J784S4 UFS Clock IDs are as below:

    The j721e UFS clock IDs are as below:

    There are differences w.r.t clock IDs. This is not enabled as part of the present SDK offering on J784s4.

    I will check & get back to you on when this will be enabled.

    Best Regards,
    Keerthy

  • Hi Allen,

    The plan is to enable this in 9.x SDK. Mid-next year.

    Best Regards,
    Keerthy

  • Hi Keerthy,

    Thanks for your reply!

    I changed dts file and now log:

    [    3.499136] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vdd-hba-supply regulator, assuming enabled
    [    3.509663] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vcc-supply regulator, assuming enabled
    [    3.519830] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vccq-supply regulator, assuming enabled
    [    3.530078] cdns-ufshcd 4e84000.ufs: ufshcd_populate_vreg: Unable to find vccq2-supply regulator, assuming enabled
    [    3.541294] scsi host0: ufshcd
    [    3.563309] cdns-ufshcd 4e84000.ufs: ufshcd_print_pwr_info:[RX, TX]: gear=[1, 1], lane[1, 1], pwr[SLOWAUTO_MODE, SLOWAUTO_MODE], rate = 0
    [    3.585950] davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
    [    3.595053] davinci_mdio 46000f00.mdio: phy[0]: device 46000f00.mdio:00, driver TI DP83867
    [    3.599505] cdns-ufshcd 4e84000.ufs: ufshcd_print_pwr_info:[RX, TX]: gear=[3, 3], lane[2, 2], pwr[FAST MODE, FAST MODE], rate = 2
    [    3.603414] am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA02102, cpsw version 0x6BA82102 Ports: 2 quirks:00000000
    [    3.615010] cdns-ufshcd 4e84000.ufs: ufshcd_find_max_sup_active_icc_level: Regulator capability was not set, actvIccLevel=0
    [    3.639091] scsi 0:0:0:49488: Well-known LUN    TOSHIBA  THGAF8G8T23BAILB 0300 PQ: 0 ANSI: 6
    [    3.648318] scsi 0:0:0:49476: Well-known LUN    TOSHIBA  THGAF8G8T23BAILB 0300 PQ: 0 ANSI: 6
    [    3.657438] cdns-ufshcd 4e84000.ufs: ufshcd_scsi_add_wlus: BOOT WLUN not found

    Is the UFS device working properly? How to test UFS devices?

    Allen

  • Allen,

    Thanks for the feedback. Request you to share the changed DT node that got this working. It will be of help for me.

    Thanks,
    Keerthy

  • Hi Keerthy,

    dts:

    ufs_wrapper: ufs-wrapper@4e80000 {
    	compatible = "ti,j721e-ufs";
    	reg = <0x0 0x4e80000 0x0 0x100>;
    	power-domains = <&k3_pds 387 TI_SCI_PD_EXCLUSIVE>;
    	clocks = <&k3_clks 387 3>;
    	assigned-clocks = <&k3_clks 387 3>;
    	assigned-clock-parents = <&k3_clks 387 6>;
    	ranges;
    	#address-cells = <2>;
    	#size-cells = <2>;
    
    	ufs@4e84000 {
    		compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
    		reg = <0x0 0x4e84000 0x0 0x10000>;
    		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
    		freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>;
    		clocks = <&k3_clks 387 1>, <&k3_clks 387 3>, <&k3_clks 387 3>;
    		clock-names = "core_clk", "phy_clk", "ref_clk";
    		dma-coherent;
    	};
    };

  • Really appreciate that! Thanks.

    - Keerthy