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TDA4VM: TDA4 evm: iic0 communication fail.

Part Number: TDA4VM


Hi TI engineer,

When i use iic0, it return fail log. The below is the log.

src/devices/common/common.c:326] I2C_transfer : ret = -1

[/home/xiejiancheng/tda4_linux/tda4-n50n51/debug/rtos_linux_8.4/psdkra/vision_apps/utils/hdmi/src/hdmi.c:308] i2c Write error : status = -1

I use your iic function to communication. i am sure iic stalve address and iic number is right. i also check iic0 pinmux, it looks fine.

So i donot known what is the problem. Is there anything cause this thing?

i checked all things i thought. Now i have no idea.

// this is the iic function i used

Board_STATUS Board_i2c8BitRegWr()

{

...

ret = I2C_transfer(i2cHandle, &transaction);
if(ret != I2C_STS_SUCCESS)
{
BOARD_DEVICES_ERR_LOG("Failing while writing data by returning - %d\n\r", ret);
printf("\n[%s:%d] I2C_transfer : ret = %d\n", __FILE__, __LINE__, ret);

ret = -1;
return ret;

}

...

}

static int8_t  HdmiWrite(uint8_t reg, uint8_t data)
{
int32_t status;
uint8_t writeData = data;
uint8_t regAddr = reg;
status = Board_i2c8BitRegWr(hdmiI2cHandle, HDMI_I2C_ADDR, regAddr, &writeData, 1, BOARD_I2C_TRANSACTION_TIMEOUT);
if (0 != status) {

printf("\n[%s:%d] i2c Write error : status = %d\n", __FILE__, __LINE__, status);
return -1;
}
appLogWaitMsecs(1u);

return 0;

}

  • Hi,

    This seems to be configuring some on-board mux for the HDMI output. Are you using HDMI output from TDA4x device?

    Regards,

    Brijesh

  • Hi Brijesh Jadav,

    yes, i use hdmi ouput in my board. But the pin hdmi used is different from iic0 pins.

    iic0_SCL and iic0_SDA use AC5 and AA5 pins.

    hdmi D2~D9 use V28,V29,V27,U28,U29,U25,U24,U27 pins.

    i use linux8.4 SDK on my board. on the same board the hdmi output is fine in qnx7.1 SDK.

    please help to check what is the matter.

    Thank you very much!

  • Hi ,

    Is it the same problem that you have posted on below link?

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1182979/tda4vm-hdmi-output-is-fine-in-my-board-with-qnx7-1-sdk-now-we-want-to-run-on-linux8-4-sdk-but-i-find-the-modify-of-dss-code-cannot-run-fine-in-new-sdk/4458154

    According to your last post, I2C communication is fine. please confirm. 

    Have you enabled HDMI output (ie ENABLE_DSS_HDMI) in vision apps file ti-processor-sdk-rtos-j721e-evm-08_04_00_02\vision_apps\platform\j721e\rtos\common\app_cfg_mcu2_0.h? Is usecase running fine? Can you please share the output of pressing 'p' from the usecase menu? 

    Please note that vision apps supports only fixed 1080p resolution output for all output interfaces. so please check if your display device supports this resolution.

    Regards,

    Brijesh 

  • Hi Brijesh Jadav,

    According to your last post, I2C communication is fine. please confirm.

    ==>Now, I2C0 communication is fail, and I2C1 communication is fine. i modify hardware of my board to continue debugging hdmi output problems. But I2C0 communication fail problem is also need to resolve

    Have you enabled HDMI output (ie ENABLE_DSS_HDMI) in vision apps file ti-processor-sdk-rtos-j721e-evm-08_04_00_02\vision_apps\platform\j721e\rtos\common\app_cfg_mcu2_0.h? Is usecase running fine? Can you please share the output of pressing 'p' from the usecase menu? 

    ==>Now, in my board, i use 2 vp to generate bt601 signals. so i donot run the code  of  ENABLE_DSS_HDMI. Do you want to known which usecase test report? i can not see usecase menu. How can i get it?

    This is the data flow in my boatd. i debug it in qnx7.1 SDK. in this link. But now i want to hdmi output is fine on my board with linux8.4 SDK.

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1076063/tda4vm-tda4vm-dpi1--adv7511--hdmi-monitor/3993009#3993009

  • Hi xie jc,

    Now, I2C0 communication is fail, and I2C1 communication is fine. i modify hardware of my board to continue debugging hdmi output problems. But I2C0 communication fail problem is also need to resolve

    I2C0 is typically used by Linux. If you want to use it from R5F, can you please make sure to remove it from the Linux first? 

    Now, in my board, i use 2 vp to generate bt601 signals. so i donot run the code  of  ENABLE_DSS_HDMI. Do you want to known which usecase test report? i can not see usecase menu. How can i get it?

    Which VP and which vout are you are using to get BT601 output format? Which clock is used for both of these VPs? 

    Yes, in this case, please dont enable ENABLE_DSS_HDMI flag. But if not this flag, which DSS output flag are you enabling? In the standard SDK release, there is no support for BT601 output format. Have you added it separately? 

    Regards,

    Brijesh

  • 1. I2C0 is typically used by Linux. If you want to use it from R5F, can you please make sure to remove it from the Linux first?

    How to remove it from linux? i search I2C0 and I2C1, but donot find difference in code.

    2. Which VP and which vout are you are using to get BT601 output format? Which clock is used for both of these VPs?

    i use VP1 and VP2 to get BT601, and VOUT1 connect to ADV7511.   i set clock frequency to 121359600ULL. 

    although i also enable ENABLE_DSS_EDP, but i modify the setting of display_type. i move qnx7.1 DSS code to linux8.4 SDK. The DSS is fine and hdmi output is fine too.  These are some modify in DSS driver.

    typedef struct {

    app_dss_default_prm_t initPrm;
    uint32_t overlayIdEs, overlayIdDs;  //this is modify for 2 vp
    uint32_t vpIdDs, vpIdEs;                   //this is modify for 2 vp
    uint32_t nodeOverlayId;
    uint32_t nodeVpId;
    uint32_t nodeDpiId;
    uint32_t videoIfWidth;

    app_dss_default_m2m_obj_t m2m;

    } app_dss_default_obj_t;

    int32_t appDssDefaultInit(app_dss_default_prm_t *prm)

    {

    ...

    if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_EDP)
    {
    appLogPrintf("DSS: Display type is BT601 on VOUT1 !!!\n");
    obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY2;
    obj->nodeVpId = DSS_DCTRL_NODE_VP2;
    obj->nodeDpiId = DSS_DCTRL_NODE_DPI_DPI1;
    obj->overlayIdEs = APP_DSS_OVERLAY_ID_2;
    obj->overlayIdDs = APP_DSS_OVERLAY_ID_1;
    obj->vpIdEs = APP_DSS_VP_ID_2;
    obj->overlayIdDs   = APP_DSS_OVERLAY_ID_1;

    obj->vpIdEs        = APP_DSS_VP_ID_2;

    obj->vpIdDs        = APP_DSS_VP_ID_1;

    obj->videoIfWidth  = APP_DCTRL_VIFW_16BIT;

    }

    ....

    }

    3. i compare DSS driver with qnx7.1 SDK, i find that it has some changes. How can i use DSS driver which is fine in qnx7.1 SDK.?

  • Hi xie jc,

    How to remove it from linux? i search I2C0 and I2C1, but donot find difference in code.

    Please refer to below link.

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/986493/tda4vm-how-to-change-csi-camera-i2c-instance-in-vision_app

    2. Which VP and which vout are you are using to get BT601 output format? Which clock is used for both of these VPs?

    If you could share complete code, it would be helpful understand. Please also make sure that pinmux and pixel clock is setup correctly for VP1, VP2.

    3. i compare DSS driver with qnx7.1 SDK, i find that it has some changes. How can i use DSS driver which is fine in qnx7.1 SDK.?

    Do you mean QNS supports BT601 output? Can you please check with Blackberry for this question?

    Regards,

    Brijesh

  • Now I2C0 is work. i want to known how to check I2C is used in linux default.

    1. If you could share complete code, it would be helpful understand. Please also make sure that pinmux and pixel clock is setup correctly for VP1, VP2.

    i share you all the modify in DSS driver. they are in the 4 files. it will call these function 'appDssConfigurePixelClock()', 'appDssDefaultSetDefaultPrm(&prm)', 'appDssDefaultInit(&prm)', in appInit function when mcu2_0 core start.

    app_dctrl.happ_dss_defaults.h

    /*
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     * have made, use, import, offer to sell and sell ("Utilize") this software subject to the
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     * other than combinations with devices manufactured by or for TI ("TI Devices").
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     * (including the above copyright notice and the disclaimer and (if applicable) source
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    /* ========================================================================== */
    /*                             Include Files                                  */
    /* ========================================================================== */
    
    #include "app_dss_defaults_priv.h"
    #include <utils/sciclient/include/app_sciclient_wrapper_api.h>
    #include <ti/drv/sciclient/include/sciclient_pm.h>
    #include <ti/drv/sciclient/soc/sysfw/include/j721e/tisci_devices.h>
    #include <stdio.h>
    
    app_dss_default_obj_t g_app_dss_default_obj;
    #define DPI1_P_CLK_1280_800_50HZ  (121359600ULL)
    int32_t appBt601DctrlDefaultInit(app_dss_default_obj_t *obj);
    
    
    void appDssDefaultSetDefaultPrm(app_dss_default_prm_t *prm)
    {
        prm->display_type = APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI;
    
    	//new 1280*800, xjc modify
    	prm->timings[0].width = 1280U;
        prm->timings[0].height = 800U;
        prm->timings[0].hFrontPorch = 48;
        prm->timings[0].hBackPorch = 80;
        prm->timings[0].hSyncLen = 32;
        prm->timings[0].vFrontPorch = 3;
        prm->timings[0].vBackPorch = 14;
        prm->timings[0].vSyncLen = 6;
        prm->timings[0].pixelClock = DPI1_P_CLK_1280_800_50HZ;
        /* Embedded Sync */
        prm->timings[1].width = 1328;
        prm->timings[1].height = 800;
        prm->timings[1].hFrontPorch = 0U;
        prm->timings[1].hBackPorch = 0U;
        prm->timings[1].hSyncLen = 216;
        prm->timings[1].vFrontPorch = 3;
        prm->timings[1].vBackPorch = 18;
        prm->timings[1].vSyncLen = 0U;
        prm->timings[1].pixelClock = DPI1_P_CLK_1280_800_50HZ;
    
        prm->enableM2m            = TRUE;
    }
    
    //xjc add
    void appDssConfigurePinMux(void)
    {
    	#if 1
        volatile uint32_t regVal;
    
        /* VOUT1_VS -> AC22 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG102);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG102_MUXMODE,
                0x9U);
        regVal = 0x10009;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG102, regVal);
    
        /* VOUT1_HS -> AJ26 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG103);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG103_MUXMODE,
                0x9U);
        regVal = 0x10009;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG103, regVal);
    
        /* VOUT1_DE -> AJ22 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG105);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG105_MUXMODE,
                0x9U);
        regVal = 0x10009;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG105, regVal);
    
        /* VOUT1_D2 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG88);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG88_MUXMODE,
                0x4U);
        regVal = 0x10004;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG88, regVal);
    
        /* VOUT1_D3 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG89);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG89_MUXMODE,
                0x4U);
        regVal = 0x10004;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG89, regVal);
    
        /* VOUT1_D4 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG90);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG90_MUXMODE,
                0x4U);
        regVal = 0x10004;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG90, regVal);
    
        /* VOUT1_D5 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG91);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG91_MUXMODE,
                0x4U);
        regVal = 0x10004;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG91, regVal);
    
        /* VOUT1_D6 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG92);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG92_MUXMODE,
                0x4U);
        regVal = 0x10004;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG92, regVal);
    
        /* VOUT1_D7 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG93);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG93_MUXMODE,
                0x4U);
        regVal = 0x10004;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG93, regVal);
    
        /* VOUT1_D8 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG94);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG94_MUXMODE,
                0x4U);
        regVal = 0x10004;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG94, regVal);
    
        /* VOUT1_D9 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG95);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG95_MUXMODE,
                0x4U);
        regVal = 0x10004;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG95, regVal);
    
        /* VOUT1_CLK -> AJ22 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG104);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_PADCONFIG104_MUXMODE,
                0x4U);
        regVal = 0x10004;
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_PADCONFIG104, regVal);
    	#if 0
    	/* Select DPI1 */
        regVal = CSL_REG32_RD(CSL_DSS0_DISPC_0_COMMON_M_BASE +
                              CSL_DSS_COMMON_M_DISPC_CONNECTIONS);
        CSL_FINS(regVal,
                 /*DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN*/DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN,
                 /*CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_0_CONN_VAL_VP2*/ CSL_DSS_COMMON_M_DISPC_CONNECTIONS_DPI_1_CONN_VAL_VP2);
    
        CSL_REG32_WR(CSL_DSS0_DISPC_0_COMMON_M_BASE +
                     CSL_DSS_COMMON_M_DISPC_CONNECTIONS, regVal);
    	#endif
    	#endif
    }
    
    int32_t appDssDefaultInit(app_dss_default_prm_t *prm)
    {
        int32_t retVal = 0;
        app_dss_init_params_t dssParams;
        app_dss_default_obj_t *obj = &g_app_dss_default_obj;
    
        appLogPrintf("DSS: Init ... !!!\n");
    
        memcpy(&obj->initPrm, prm, sizeof(*prm));
    
        
       //xjc modify
        {
    		appLogPrintf("DSS: Display type is BT601 on VOUT1 !!!\n");
            obj->nodeOverlayId = APP_DCTRL_NODE_OVERLAY2;
            obj->nodeVpId      = DSS_DCTRL_NODE_VP2;
            obj->nodeDpiId     = DSS_DCTRL_NODE_DPI_DPI1;
            obj->overlayIdEs   = APP_DSS_OVERLAY_ID_2;
            obj->overlayIdDs   = APP_DSS_OVERLAY_ID_1;
            obj->vpIdEs        = APP_DSS_VP_ID_2;
            obj->vpIdDs        = APP_DSS_VP_ID_1;
    		obj->videoIfWidth  = APP_DCTRL_VIFW_16BIT;
        }
        
        if(prm->enableM2m == TRUE)
        {
            appLogPrintf("DSS: M2M Path is enabled !!!\n");
            obj->m2m.enableM2m     = true;
            obj->m2m.nodeOverlayId = APP_DCTRL_NODE_OVERLAY4;
            obj->m2m.overlayId     = APP_DSS_OVERLAY_ID_4;
            obj->m2m.pipeId        = APP_DCTRL_NODE_VIDL2;
            obj->m2m.vpId          = APP_DSS_VP_ID_4;
            obj->m2m.nodeVpId      = APP_DCTRL_NODE_VP4;
        }
    
        appDssConfigurePm(prm);
    	appDssConfigurePinMux(); /* xjc modify */
    
        if( (prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DPI_HDMI) ||
            (prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_EDP))
        {
            ///appDssConfigureBoard(prm); //xjc modify, bt601 not use it
        }
    
        if (prm->display_type == APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
        {
            appDssConfigureUB941AndUB925(prm);
        }
    
        appDssInitParamsInit(&dssParams);
        dssParams.isPipeAvailable[APP_DSS_VID_PIPE_ID_VID1] = true;
        dssParams.isPipeAvailable[APP_DSS_VID_PIPE_ID_VID2] = true;
        dssParams.isPipeAvailable[APP_DSS_VID_PIPE_ID_VIDL1] = true;
    
        if(prm->enableM2m == TRUE)
        {
            dssParams.isPipeAvailable[APP_DSS_VID_PIPE_ID_VIDL2] = true;
        }
        else
        {
            dssParams.isPipeAvailable[APP_DSS_VID_PIPE_ID_VIDL2] = false;
        }
        //dssParams.isOverlayAvailable[obj->overlayId] = true;
        //dssParams.isPortAvailable[obj->vpId] = true;
        //xjc modify
    	dssParams.isOverlayAvailable[obj->overlayIdEs] = true;
        dssParams.isOverlayAvailable[obj->overlayIdDs] = true;
        dssParams.isPortAvailable[obj->vpIdEs] = true;
        dssParams.isPortAvailable[obj->vpIdDs] = true;
    
        if(prm->enableM2m == TRUE)
        {
            dssParams.isOverlayAvailable[obj->m2m.overlayId] = true;
            dssParams.isPortAvailable[obj->m2m.vpId] = true;
        }
    
        if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_EDP)
        {
            dssParams.isDpAvailable = true;
        }
        if(prm->display_type==APP_DSS_DEFAULT_DISPLAY_TYPE_DSI)
        {
            dssParams.isDsiAvailable = true;
        }
    
        retVal = appDssInit(&dssParams);
        if(retVal!=FVID2_SOK)
        {
            appLogPrintf("DSS: ERROR: Dss init failed !!!\n");
        }
    
        if (FVID2_SOK == retVal)
        {
            retVal = appDctrlInit();
            if(retVal!=FVID2_SOK)
            {
                appLogPrintf("DSS: ERROR: Dctrl init failed !!!\n");
            }
        }
        if (FVID2_SOK == retVal)
        {
            //retVal = appDctrlDefaultInit(obj);
    		retVal = appBt601DctrlDefaultInit(obj); //xjc modify
            if(retVal!=FVID2_SOK)
            {
                appLogPrintf("DSS: ERROR: Dctrl default init failed !!!\n");
            }
        }
    
        appLogPrintf("DSS: Init ... Done !!!\n");
        return retVal;
    }
    
    int32_t appDssDefaultDeInit(void)
    {
        int32_t retVal = 0;
    
        retVal = appDctrlDefaultDeInit();
        if(retVal!=FVID2_SOK)
        {
            appLogPrintf("DSS: ERROR: Dctrl default deInit failed !!!\n");
        }
        retVal = appDctrlDeInit();
        if(retVal!=FVID2_SOK)
        {
            appLogPrintf("DSS: ERROR: Dctrl deInit failed !!!\n");
        }
        retVal = appDssDeInit();
        if(retVal!=FVID2_SOK)
        {
            appLogPrintf("DSS: ERROR: Dss deInit failed !!!\n");
        }
        return retVal;
    }
    
    int32_t appDctrlDefaultDeInit(void)
    {
        int32_t retVal = 0;
        uint32_t cpuId = APP_IPC_CPU_MCU2_0;
        app_dctrl_path_info_t pathInfo;
        app_dctrl_vp_params_t vpParams;
    
        appDctrlPathInfoInit(&pathInfo);
        appDctrlVpParamsInit(&vpParams);
        vpParams.vpId = APP_DSS_VP_ID_2;
        retVal = appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_CLEAR_PATH, &pathInfo, sizeof(pathInfo), 0U);
        retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_STOP_VP, &vpParams, sizeof(vpParams), 0U);
        retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_DELETE_HANDLE, NULL, 0U, 0U);
    
        return retVal;
    }
    
    //xjc add
    void appDssConfigurePixelClock()
    {
        int32_t status;
        volatile uint32_t regVal;
        uint32_t parent;
        uint64_t freq;
    
        SET_DEVICE_STATE_ON(TISCI_DEV_DSS0);
    
        #if 0
        SET_CLOCK_STATE(TISCI_DEV_DSS0,
                TISCI_DEV_DSS0_DSS_FUNC_CLK,
                0,
                TISCI_MSG_VALUE_CLOCK_SW_STATE_REQ,
                status);
        #endif
    
        SET_CLOCK_PARENT(TISCI_DEV_DSS0, 13, 18);
    	SET_CLOCK_FREQ(TISCI_DEV_DSS0, 13, DPI1_P_CLK_1280_800_50HZ);
    
        SET_CLOCK_PARENT(TISCI_DEV_DSS0, 4, 7);
        
        SET_CLOCK_PARENT(TISCI_DEV_DSS0, 1, 3);
        
        //SET_CLOCK_FREQ(TISCI_DEV_DSS0, 4, prm->timings[1].pixelClock);
        
        //SET_CLOCK_STATE(TISCI_DEV_DSS0, 4, 0, TISCI_MSG_VALUE_CLOCK_SW_STATE_REQ);
    
        status = Sciclient_pmGetModuleClkParent(TISCI_DEV_DSS0, 4, &parent,
            SCICLIENT_SERVICE_WAIT_FOREVER);
        printf ("==================>> Status = %d Parent = %d\n", status, parent);
    
        status = Sciclient_pmGetModuleClkFreq(TISCI_DEV_DSS0, 4, &freq,
            SCICLIENT_SERVICE_WAIT_FOREVER);
        //printf ("===================>> Status = %d Freq = %ld\n", status, freq);
    
        status = Sciclient_pmGetModuleClkParent(TISCI_DEV_DSS0, 1, &parent,
            SCICLIENT_SERVICE_WAIT_FOREVER);
        printf ("==================>> 1 Status = %d Parent = %d\n", status, parent);
    
        status = Sciclient_pmGetModuleClkFreq(TISCI_DEV_DSS0, 1, &freq,
            SCICLIENT_SERVICE_WAIT_FOREVER);
        printf ("===================>> 1 Status = %d Freq = %lu\n", status, (unsigned long)freq);
        
    
    #if 0
        /* Set PLL23.HSDIV clock source for DPI0/VP1 */
        regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_DSS_DISPC0_CLKSEL3);
        CSL_FINS(regVal,
                MAIN_CTRL_MMR_CFG0_DSS_DISPC0_CLKSEL3_DPI3_PCLK,
                0x5U);
        CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE +
                CSL_MAIN_CTRL_MMR_CFG0_DSS_DISPC0_CLKSEL3, regVal);
    #endif
    }
    
    //xjc add
    int32_t appBt601DctrlDefaultInit(app_dss_default_obj_t *obj)
    {
        int32_t retVal = 0;
        uint32_t cpuId = APP_IPC_CPU_MCU2_0;
        bool doHpd = false;
        app_dctrl_path_info_t pathInfo;
        app_dctrl_vp_params_t vpEsParams, vpDsParams;
        app_dctrl_overlay_params_t overlayParams;
        app_dctrl_layer_params_t layerParams;
    
        appDctrlPathInfoInit(&pathInfo);
        appDctrlVpParamsInit(&vpEsParams);
        appDctrlVpParamsInit(&vpDsParams);
        appDctrlOverlayParamsInit(&overlayParams);
        appDctrlLayerParamsInit(&layerParams);
    
        pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VID1;
        pathInfo.edgeInfo[pathInfo.numEdges].endNode   = obj->nodeOverlayId;
        pathInfo.numEdges++;
        pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VID2;
        pathInfo.edgeInfo[pathInfo.numEdges].endNode   = obj->nodeOverlayId;
        pathInfo.numEdges++;
        pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VIDL1;
        pathInfo.edgeInfo[pathInfo.numEdges].endNode   = obj->nodeOverlayId;
        pathInfo.numEdges++;
        pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->nodeOverlayId;
        pathInfo.edgeInfo[pathInfo.numEdges].endNode   = obj->nodeVpId;
        pathInfo.numEdges++;
        pathInfo.edgeInfo[pathInfo.numEdges].startNode = obj->nodeVpId;
        pathInfo.edgeInfo[pathInfo.numEdges].endNode   = obj->nodeDpiId;
        pathInfo.numEdges++;
    
        pathInfo.edgeInfo[pathInfo.numEdges].startNode = APP_DCTRL_NODE_VP1;
        pathInfo.edgeInfo[pathInfo.numEdges].endNode = APP_DCTRL_NODE_DISCSYNC0;
        pathInfo.numEdges++;
    
    
        vpEsParams.vpId             = obj->vpIdEs;
    
        vpEsParams.enabled = TRUE;
        vpEsParams.isPrimary = TRUE;
        vpEsParams.numSyncVpIds = 1U;
        vpEsParams.syncVpIds[0] = obj->vpIdDs;
    
        /* Always expect the app to provide a custom resolution */
        vpEsParams.standard         = APP_DCTRL_VID_STD_CUSTOM;
    
        vpEsParams.width            = obj->initPrm.timings[1].width;
        vpEsParams.height           = obj->initPrm.timings[1].height;
        vpEsParams.hFrontPorch      = obj->initPrm.timings[1].hFrontPorch;
        vpEsParams.hBackPorch       = obj->initPrm.timings[1].hBackPorch;
        vpEsParams.hSyncLen         = obj->initPrm.timings[1].hSyncLen;
        vpEsParams.vFrontPorch      = obj->initPrm.timings[1].vFrontPorch;
        vpEsParams.vBackPorch       = obj->initPrm.timings[1].vBackPorch;
        vpEsParams.vSyncLen         = obj->initPrm.timings[1].vSyncLen;
    	//appLogPrintf("===================>> 0 hFrontPorch = %u, %u \n", vpEsParams.hFrontPorch, vpEsParams.hBackPorch);
        vpEsParams.pixelClock       = (uint32_t)(obj->initPrm.timings[1].pixelClock / 1000ULL);
    	//appLogPrintf("===================>> 1 pixelClock = %u, %u \n", vpEsParams.pixelClock, obj->initPrm.timings[1].pixelClock);
        vpEsParams.dvoFormat        = APP_DCTRL_DV_BT656_EMBSYNC;
        vpEsParams.cscRange         = APP_DSS_CSC_RANGE_LIMITED;
        vpEsParams.videoIfWidth     = obj->videoIfWidth;
    
        vpEsParams.actVidPolarity   = APP_DCTRL_POL_HIGH;
        vpEsParams.pixelClkPolarity = APP_DCTRL_EDGE_POL_FALLING;
        vpEsParams.hsPolarity       = APP_DCTRL_POL_HIGH;
        vpEsParams.vsPolarity       = APP_DCTRL_POL_HIGH;
    
    
        vpDsParams.vpId             = obj->vpIdDs;
    
        vpDsParams.enabled = TRUE;
        vpDsParams.isPrimary = FALSE;
        vpDsParams.numSyncVpIds = 0U;
    
        /* Always expect the app to provide a custom resolution */
        vpDsParams.standard         = APP_DCTRL_VID_STD_CUSTOM;
    
        vpDsParams.width            = obj->initPrm.timings[0].width;
        vpDsParams.height           = obj->initPrm.timings[0].height;
        vpDsParams.hFrontPorch      = obj->initPrm.timings[0].hFrontPorch;
        vpDsParams.hBackPorch       = obj->initPrm.timings[0].hBackPorch;
        vpDsParams.hSyncLen         = obj->initPrm.timings[0].hSyncLen;
        vpDsParams.vFrontPorch      = obj->initPrm.timings[0].vFrontPorch;
        vpDsParams.vBackPorch       = obj->initPrm.timings[0].vBackPorch;
        vpDsParams.vSyncLen         = obj->initPrm.timings[0].vSyncLen;
        vpDsParams.pixelClock       = (uint32_t)(obj->initPrm.timings[0].pixelClock / 1000ULL);
    
        vpDsParams.dvoFormat        = APP_DCTRL_DV_GENERIC_DISCSYNC;
        vpDsParams.cscRange         = APP_DSS_CSC_RANGE_LIMITED;
        vpDsParams.videoIfWidth     = obj->videoIfWidth;
    
        vpDsParams.actVidPolarity   = APP_DCTRL_POL_HIGH;
        vpDsParams.pixelClkPolarity = APP_DCTRL_EDGE_POL_FALLING;
        vpDsParams.hsPolarity       = APP_DCTRL_POL_HIGH;
        vpDsParams.vsPolarity       = APP_DCTRL_POL_HIGH;
    
        vpDsParams.tdmEnable = TRUE;
        vpDsParams.tdmUnusedBitsLevel = 0x2u;
        vpDsParams.tdmCycleFormat = 1u; /* 0: 1 cycle per pixel , 1: 2 cycles per pixel*/
        vpDsParams.tdmParallelMode = 0u;
        vpDsParams.numBitsPixel1Cycle0 = 8;
        vpDsParams.numBitsPixel1Cycle1 = 8;
        vpDsParams.numBitsPixel1Cycle2 = 0;
    
        overlayParams.overlayId = obj->overlayIdEs;
        overlayParams.colorKeyEnable = 1;
        overlayParams.colorKeySel = APP_DCTRL_OVERLAY_TRANS_COLOR_SRC;
        overlayParams.transColorKeyMin = 0x0u;
        overlayParams.transColorKeyMax = 0x0u;
        overlayParams.backGroundColor = 0x0u; /* 0->0x00FFFFFFu, 2022-2-21 by xjc  */
    
        layerParams.overlayId = obj->overlayIdEs;
        layerParams.pipeLayerNum[APP_DSS_VID_PIPE_ID_VID1] = APP_DCTRL_OVERLAY_LAYER_NUM_0;
        layerParams.pipeLayerNum[APP_DSS_VID_PIPE_ID_VID2] = APP_DCTRL_OVERLAY_LAYER_NUM_1;
        /* VIDL1 this is graphics overlay layer and it MUST be top most layer, i.e layer num 4 in j721e */
        layerParams.pipeLayerNum[APP_DSS_VID_PIPE_ID_VIDL1] = APP_DCTRL_OVERLAY_LAYER_NUM_4;
        /* this is used by Linux on A72 so should be kept as disabled or invalid here */
        layerParams.pipeLayerNum[APP_DSS_VID_PIPE_ID_VIDL2] = APP_DCTRL_OVERLAY_LAYER_INVALID;
    
    	appLogPrintf("appBt601DctrlDefaultInit: 401 !!!\n");
    
        retVal = appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_REGISTER_HANDLE, &doHpd, sizeof(doHpd), 0U);
        retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_PATH, &pathInfo, sizeof(pathInfo), 0U);
        retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_VP_PARAMS, &vpDsParams, sizeof(vpDsParams), 0U);
        retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_VP_PARAMS, &vpEsParams, sizeof(vpEsParams), 0U);
        retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_OVERLAY_PARAMS, &overlayParams, sizeof(overlayParams), 0U);
        retVal+= appRemoteServiceRun(cpuId, APP_DCTRL_REMOTE_SERVICE_NAME, APP_DCTRL_CMD_SET_LAYER_PARAMS, &layerParams, sizeof(layerParams), 0U);
    	appLogPrintf("appBt601DctrlDefaultInit: retVal:%d \n", retVal);
    
        return retVal;
    }
    
    
    app_dss_defaults_priv.h

    please help to check it.

    The pinmux and pixel clock is correctly for VP1, VP2. because it come from qnx7.1 SDK. and it works fine.

    I run qnx7.1 SDK and hdmi ouput fine.  I found that when I used oscilloscope to test the pclk signal, the hdmi show no signal. If i donot test pclk signal, the hdmi output fine. So how to check pclk value? Is there any register to read it?

    2. Do you mean QNS supports BT601 output? Can you please check with Blackberry for this question?

    No, DSS is also not support BT601 in qnx7.1 SDK. i hava some change in default DSS driver. It has nothing to do with Blackberry .