PROCESSOR-SDK-AM64X: Enet Layer 2 CPSW Example does not work anymore with SDK version 08.05.00.24

Dominik Fischer

Hi,

with the newest version of MCU-Plus SDK 08.05.00.24 the example "Enet Layer 2 CPSW " doesn't work anymore on SK-AM64x. Example works in SDK-Version 08.04.00.17.

Here's the output from Debug-UART:

==========================
     Layer 2 CPSW Test
==========================

Init all peripheral clocks
----------------------------------------------
Enabling clocks!

Create RX tasks
----------------------------------------------
cpsw-3g: Create RX task

Open all peripherals
----------------------------------------------
cpsw-3g: Open enet
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 4 To 3

Init all configs
----------------------------------------------
cpsw-3g: init config
Mdio_open: MDIO Manual_Mode enabled
EnetRm_open: Resource partition validation failed: -3
EnetMod_open: cpsw3g.rm: Failed to open: -3
Cpsw_openInternal: Failed to open RM: -3
Assertion @ Line: 984 in /home/gtbldadm/nightlybuilds/mcupsdk_internal/jenkins/mcu_plus_sdk_am64x_08_05_00_24/source/networking/enet/core/src/per/V1/cpsw.c: hCpsw->hRxRsvdFlow != NULL

BTW: I am talking about MCU-PLUS-SDK-AM64X, but I cannot select this part number when creating a thread ...

over 1 year ago

0 Ashwani Goel over 1 year ago

TI__Genius 15700 points

Thanks for your query.

I will check and come back on this soon.

Best Regards

Ashwani

0 Anshu Choudhary over 1 year ago in reply to Ashwani Goel

TI__Genius 11970 points

Dominik,

thanks for pointing out. we acknowledge that there is an issue "Enet Layer 2 CPSW Example". we are working with dev team to get it resolved.

please allow me some time to get back to you with a timeline of resolution.

Regards

Anshu

0 Ashwani Goel over 1 year ago in reply to Ashwani Goel

TI__Genius 15700 points

Hi Dominik,

Please refer https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1097991/sk-am64-ethernet-access-from-freertos/4081226#4081226

and make sure you have pinmux related changes needed for CPSW in AM64x-SK board.

Best Regards

Ashwani

0 Dominik Fischer over 1 year ago in reply to Ashwani Goel

Intellectual 335 points

Hi Ashwani,

this doesn't solve my issue. I am using SDK version 8.5.0.24 in this SDK version there is already an example explictely for SK-AM64x. In the example the pinmux seems to be correct. So no need to change anything?!

Here the relevant lines from the example.syscfg that is used

enet_cpsw1.$name                        = "CONFIG_ENET_CPSW0";
enet_cpsw1.DisableMacPort2              = true;
enet_cpsw1.mdioMode                     = "MDIO_MODE_MANUAL";
enet_cpsw1.txDmaChannel[0].$name        = "ENET_DMA_TX_CH0";
enet_cpsw1.rxDmaChannel[0].$name        = "ENET_DMA_RX_CH0";
enet_cpsw1.pinmux[0].$name              = "ENET_CPSW_PINMUX0";
enet_cpsw1.pinmux[0].MDIO.$assign       = "MDIO0";
enet_cpsw1.pinmux[0].MDIO.MDC.$assign   = "ball.R2";
enet_cpsw1.pinmux[0].MDIO.MDIO.$assign  = "ball.P5";
enet_cpsw1.pinmux[0].RGMII1.$assign     = "RGMII1";
enet_cpsw1.pinmux[0].RGMII1.RD0.$assign = "ball.AA13";
enet_cpsw1.pinmux[0].RGMII2.$assign     = "RGMII2";

const udma         = scripting.addModule("/drivers/udma/udma", {}, false);
const udma1        = udma.addInstance({}, false);
enet_cpsw1.udmaDrv = udma1;

/**
 * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
 * version of the tool will not impact the pinmux you originally saw.  These lines can be completely deleted in order to
 * re-solve from scratch.
 */
debug_log.uartLog.UART.$suggestSolution             = "USART0";
debug_log.uartLog.UART.RXD.$suggestSolution         = "ball.D15";
debug_log.uartLog.UART.TXD.$suggestSolution         = "ball.C16";
enet_cpsw1.pinmux[0].RGMII1.RD1.$suggestSolution    = "ball.U12";
enet_cpsw1.pinmux[0].RGMII1.RD2.$suggestSolution    = "ball.Y13";
enet_cpsw1.pinmux[0].RGMII1.RD3.$suggestSolution    = "ball.V12";
enet_cpsw1.pinmux[0].RGMII1.RX_CTL.$suggestSolution = "ball.V13";
enet_cpsw1.pinmux[0].RGMII1.RXC.$suggestSolution    = "ball.W13";
enet_cpsw1.pinmux[0].RGMII1.TD0.$suggestSolution    = "ball.V15";
enet_cpsw1.pinmux[0].RGMII1.TD1.$suggestSolution    = "ball.V14";
enet_cpsw1.pinmux[0].RGMII1.TD2.$suggestSolution    = "ball.W14";
enet_cpsw1.pinmux[0].RGMII1.TD3.$suggestSolution    = "ball.AA14";
enet_cpsw1.pinmux[0].RGMII1.TX_CTL.$suggestSolution = "ball.U15";
enet_cpsw1.pinmux[0].RGMII1.TXC.$suggestSolution    = "ball.U14";
enet_cpsw1.pinmux[0].RGMII2.RD0.$suggestSolution    = "ball.W11";
enet_cpsw1.pinmux[0].RGMII2.RD1.$suggestSolution    = "ball.V11";
enet_cpsw1.pinmux[0].RGMII2.RD2.$suggestSolution    = "ball.AA12";
enet_cpsw1.pinmux[0].RGMII2.RD3.$suggestSolution    = "ball.Y12";
enet_cpsw1.pinmux[0].RGMII2.RX_CTL.$suggestSolution = "ball.W12";
enet_cpsw1.pinmux[0].RGMII2.RXC.$suggestSolution    = "ball.U11";
enet_cpsw1.pinmux[0].RGMII2.TD0.$suggestSolution    = "ball.AA10";
enet_cpsw1.pinmux[0].RGMII2.TD1.$suggestSolution    = "ball.V10";
enet_cpsw1.pinmux[0].RGMII2.TD2.$suggestSolution    = "ball.U10";
enet_cpsw1.pinmux[0].RGMII2.TD3.$suggestSolution    = "ball.AA11";
enet_cpsw1.pinmux[0].RGMII2.TX_CTL.$suggestSolution = "ball.Y11";
enet_cpsw1.pinmux[0].RGMII2.TXC.$suggestSolution    = "ball.Y10";

I've also done the last step described there:

Can you program the sbl null bootloader available in MCU+ SDK 8.02 instead of 07.03.00.19. You can follow the same steps to flash the binary.
There might be differences in the binary between two SDK's

So I've used the latest config "default_sbl_null.cfg" + python script provided in the SDK 8.5.0.24

But the issue still exists!

+1 Ashwani Goel over 1 year ago in reply to Dominik Fischer

TI__Genius 15700 points

Thanks Dominik for update.

Do you have local build setup ?

If Yes, follow below steps:

open file: mcu_plus_sdk_am64x_08_05_00_24\source\networking\.meta\enet_cpsw\templates\am64x_am243x\enet_soc_cfg.c.xdt

/*!
 *  \brief CPSW3G default configuration
 *
 *   Note: If user wishes to change the Resource Partition the following
 *   things must be considered:
 *   1. Sum of numTxCh allocated to each core should not exceed 8.
 *   2. Sum of numRxFlows allocated to each core should not exceed 7 (not 8),
 *      as one Rx flow is reserved to the master core.
 *
 */
static EnetRm_ResPrms gEnetAppRmDefCfg_3G =
{
    .coreDmaResInfo =
    {
        [0] =
        {
            .coreId        = `module.getCpuID()`,
            .numTxCh       = ENET_SYSCFG_TX_CHANNELS_NUM,    /* numTxCh */
            .numRxFlows    = (ENET_SYSCFG_RX_FLOWS_NUM + 1),    /* numRxFlows. Need one additional flow for reserved flow  */
            .numMacAddress = 3U,    /* numMacAddress */
        },
    },
    .numCores = 1U,
};

change .numMacAddress = 3U, /* numMacAddress */
It should be 4 by default

open command prompt
cd C:\ti\mcu_plus_sdk_am64x_08_05_00_24
gmake -s -C examples/networking/enet_layer2_cpsw/am64x-sk/r5fss0-0_freertos/ti-arm-clang clean
gmake -s -C examples/networking/enet_layer2_cpsw/am64x-sk/r5fss0-0_freertos/ti-arm-clang all
generated .out can be found in
1. C:\ti\mcu_plus_sdk_am64x_08_05_00_24\examples\networking\enet_layer2_cpsw\am64x-sk\r5fss0-0_freertos\ti-arm-clang
2. file name will be enet_l2_cpsw.release.out
Try to load this file using ccs

Issue should not occur for this.

Best regards

Ashwani

0 Dominik Fischer over 1 year ago in reply to Ashwani Goel

Intellectual 335 points

Hi Ashwani,

fortunately I have already setup to compile with gmake. Debug output changed but there is still the assertion, as before:

==========================
     Layer 2 CPSW Test
==========================

Init all peripheral clocks
----------------------------------------------
Enabling clocks!

Create RX tasks
----------------------------------------------
cpsw-3g: Create RX task

Open all peripherals
----------------------------------------------
cpsw-3g: Open enet
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 3 To 2

Init all configs
----------------------------------------------
cpsw-3g: init config
Mdio_open:282
EnetUdma_openRxCh:2086
EnetHostPortDma_open:121
Cpsw_openInternal:893
Cpsw_closeInternal:984
Assertion @ Line: 984 in /home/gtbldadm/nightlybuilds/mcupsdk_internal/jenkins/mcu_plus_sdk_am64x_08_05_00_24/source/networking/enet/core/src/per/V1/cpsw.c: hCpsw->hRxRsvdFlow != NULL

0 Ashwani Goel over 1 year ago in reply to Dominik Fischer

TI__Genius 15700 points

Hi Dominic,

I am sharing screenshot of CCS project settings. Please confirm same on your side ?

As on my setup, I could able to reproduce the issue you were facing.

But, After adding changes I suggested you, I am able to get out of issue.

enet_l2_cpsw.release.out

Open all peripherals
----------------------------------------------
cpsw-3g: Open enet
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 4 To 3

Init all configs
----------------------------------------------
cpsw-3g: init config
Mdio_open: MDIO Manual_Mode enabled

Starting NULL Bootloader ...

DMSC Firmware Version 8.5.3--v08.05.03 (Chill Capybar
DMSC Firmware revision 0x8
DMSC ABI revision 3.1

INFO: Bootloader_runCpu:155: CPU r5f1-0 is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU r5f1-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU m4f0-0 is initialized to 400000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU a530-0 is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU a530-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_loadSelfCpu:207: CPU r5f0-0 is initialized to 800000000 Hz !!!
INFO: Bootloader_loadSelfCpu:207: CPU r5f0-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_runSelfCpu:217: All done, reseting self ...

==========================
Layer 2 CPSW Test
==========================

Init all peripheral clocks
----------------------------------------------
Enabling clocks!

Create RX tasks
----------------------------------------------
cpsw-3g: Create RX task

Open all peripherals
----------------------------------------------
cpsw-3g: Open enet
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 3 To 2

Init all configs
----------------------------------------------
cpsw-3g: init config
Mdio_open:282
cpsw-3g: Open port 1
EnetPhy_bindDriver:1718
PHY 0 is alive
PHY 1 is alive

Attach core id 1 on all peripherals
----------------------------------------------
cpsw-3g: Attach core
cpsw-3g: Open DMA
initQs() txFreePktInfoQ initialized with 16 pkts
cpsw-3g: Waiting for link up...

Best Regards

Ashwani

0 Ashwani Goel over 1 year ago in reply to Dominik Fischer

TI__Genius 15700 points

Hi Dominic,

Can you please provide details of tools you are using example: sysfw version ?

Best Regards

Ashwani

0 Dominik Fischer over 1 year ago in reply to Ashwani Goel

Intellectual 335 points

Hi Ashwani,

Thank you for your patience. I completely deleted the old project and re-imported the project. Now it works with your suggested solution.

Thanks!

Kind regards

Dominik

Hint for others who have the same problem: With the change applied in SDK you can also use CCS to normally build the project you do not necessarily need to build via gmake

0 Ashwani Goel over 1 year ago in reply to Dominik Fischer

TI__Genius 15700 points

Hi Dominic,

Thanks for confirmation.

But this is not a clean fix. It was just to make sure that we got the root cause properly and there is no other side effect of this changes on your board.

I will work with dev team and come up with timeline to provide you a clean fix for this issue.

Best Regards

Ashwani

0 Belleteste Guillaume over 1 year ago in reply to Ashwani Goel

Prodigy 180 points

Hello Ashwani,

I had same issue on my side and I believe the issue is about the EEPROM contents.

Indeed, in the SDK 8.05, the number of MAC address is read from the EEPROM memory of the board:

I think that writing a number of 2 Max address solve the issue (despite the fact than second MAC address value is 0x00) This behavior looks like SDK 8.04

However, I have very poor performance on the switching part of ethernet packet:

sorry, it is in french but just for a ping every second, I have a lost of packets :/

(I can open another issue for that If you want)

Regards,

Guillaume

0 Ashwani Goel over 1 year ago in reply to Belleteste Guillaume

TI__Genius 15700 points

Belleteste Guillaume said:
I can open another issue for that If you want

It will be helpful. Please open another thread to track the issue.

Best Regards

Ashwani

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PROCESSOR-SDK-AM64X: Enet Layer 2 CPSW Example does not work anymore with SDK version 08.05.00.24