This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM5718: AM5718

Part Number: AM5718

Hi,

We have a simple question regarding the PCB layout using the PCIe and the AM5718: 

We are using the PCIe in the AM5718, one lane at 2.5Gbs, on the same PCB we have another IC with PCIe Gen3 interface. There is no connector in the middle, it is just a point-to-point interface on the same PCB. The layout of the differential pairs (TX, RX and REF_CLK) is routed with 100 Ohm impedance +-10%. We have used this impedance because it is recommended by TI in the document "Application Note

High-Speed Interface Layout Guidelines" (SPRAAR7I - NOVEMBER 2018 - REVISED APRIL 2022)

We have found this document from PCI Industrial Computer Manufacturers Group:

 

According to that...we should route with 85 ohms to support different GenX devices?

Best regards,

Gorka

  • As the PCIe speeds increased, I think the trace impedance changed from 100-ohm differential to 85-ohms differential.  With your design (point-to-point on same PCB), it likely won't matter much if traces are routed at either impedances.  For Gen2 (5Gbps), I think 85ohms is correct.  For the AM5718 device, I would recommend using 100-ohm since that is likely how the interface was validated on the device (at 5Gbps).