Hi,
We have a simple question regarding the PCB layout using the PCIe and the AM5718:
We are using the PCIe in the AM5718, one lane at 2.5Gbs, on the same PCB we have another IC with PCIe Gen3 interface. There is no connector in the middle, it is just a point-to-point interface on the same PCB. The layout of the differential pairs (TX, RX and REF_CLK) is routed with 100 Ohm impedance +-10%. We have used this impedance because it is recommended by TI in the document "Application Note
High-Speed Interface Layout Guidelines" (SPRAAR7I - NOVEMBER 2018 - REVISED APRIL 2022)
We have found this document from PCI Industrial Computer Manufacturers Group:
According to that...we should route with 85 ohms to support different GenX devices?
Best regards,
Gorka