PROCESSOR-SDK-AM64X: PRU ICSS Endat Register Interface

Hello

I have some questions on the PRU ICSS Endat Master registers

1- Does PRU ICSS Endat Master implementation of registers matches the  Endat Master Basic in FPGA registers

• If they are not the same , may I know the difference.

2- Do the PRU ICSSS Endat Master registers supports read and write function as per FPGA implementation

Thanks

Alan I