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TMDSEVM6678: EMIF DATA RATE

Part Number: TMDSEVM6678
Other Parts Discussed in Thread: TMS320C6678

Hi,

    I am using TMS320C6678 EVM . I am testing the EMIF16 peripheral,with chip select 3(CE1) with maximum speed configuration

*0x20C00014= (0 \
| (0 << 31) /* selectStrobe */ \
| (0 << 30) /* extWait  */ \
| (0x1 << 26) /*  */ \
| (0x01 << 20) /*  */ \
| (1 << 17) /* writeHold  ns */ \
| (0x1 << 13) /* readSetup  ns */ \
| (0x01 << 7) /* readStrobe  ns */ \
| (1 << 4) /* readHold  ns */ \
| (1 << 2) /* turnAround  ns */ \
| (1 << 0)); /* asyncSize  bus */ \.

                 According to the datasheet, EMIF16 peripheral uses DSPCLK/6 Frequency as a shared peripheral. i.e,(1000/6=166 MHZ). But In my practical testing analysis after probing the write enable data signal, I am getting 4MHZ approximately which is very much low . Pls check the attached photo images.

Is there any other configuration that i have to make inorder to increase the data frequency .Kindly let me know after checking the configuration and tested images.Thanks, Regards,Thilak


  • Hello,

    There are two likely overheads:

    1- overhead for CPU writes to flow across the bus to the EMIF and out the pins

    2- explicit overhead for setup/strobe/hold bus phases, and implicit overhead between CPU writes.

    You'll probably do better if you use the EDMA to transfer a burst of data out to the EMIFA.

    Regards,
    Kyle