AM5718: SSC setting of AM5718 processor

Peng Liu50174

Part Number: AM5718

Hi, Expert,

AM5718 processor support spread specturm clocking for Video and HDMI DPLL. But there is no introduction about calculation of SSC parameter such as DeltaMStep, MODFREQDIV_EXPONENT and MODFREQDIV_MANTISSA in TRM. Is there AM57xx application note introducingt this? or the infortion in AM335x processor TRM still valid for AM57xx processor?

Regards,

Peng,

over 1 year ago

0 kcastille over 1 year ago

TI__Mastermind 46702 points

Hello Peng, Please refer to this appnote:

https://www.ti.com/lit/an/spraby0a/spraby0a.pdf

Regards,
Kyle

0 Peng Liu50174 over 1 year ago in reply to kcastille

Expert 1480 points

Hi, Kyle,

Thanks for providing the appnote link.

Here is another question about display SSC.

If LCD1 pixel clock is generated from Video1 DPLL, and SSC is enabled, will the output timing (such as d(clk-ctlV) and d(clk-dV)) of LCD1 be affected by SSC?

Regards,

Peng

+1 kcastille over 1 year ago in reply to Peng Liu50174

TI__Mastermind 46702 points

Peng,

Those parameters aren't directly affected. However since the clock period is sometimes longer and sometimes shorter than the nominal period, there is slightly more or less setup time to the next clock edge where the connected component is latching the data.

Regards,

Kyle

0 Peng Liu50174 over 1 year ago in reply to kcastille

Expert 1480 points

Hi, Kyle,

The Spreadsheet to Configure SSC mentioned in this appnote is invalid, can you provide a valid link?

thanks

Peng,

0 kcastille over 1 year ago in reply to Peng Liu50174

TI__Mastermind 46702 points

Hello,

It's been posted in another e2e thread:

Jacinto6_ADPLLs_SSC_config.xlsm

Here's the thread in case the link has problems over time:

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/933117/tda2p-acd-vout_1-spread-spectrum

Regards,
Kyle

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AM5718: SSC setting of AM5718 processor