Hi Team,
I have a customer who is currently using TMS320C6672 for their project and they have the below enquiry:
1. Can it be disabled?
2. How to determine the chip using which SmartReflex class (0 or 3)
3. Is it possible or is there any ways to have constant voltage power design for CVDD rails?
4. There are 2 core voltages type, variable and fixed CVDD for this chip. For SR class 0, the variable voltage has to be equal or greater than the reading in VCNTLID or VID register during initial startup? They tried reading out this register value and found the mapped voltage could varies across different IC even they are of the same datecode.
Please kindly advise.
Best Regards,
Ernest
