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[FAQ] PROCESSOR-SDK-AM64X: AM64x Frequently Asked Questions List

Part Number: PROCESSOR-SDK-AM64X
Other Parts Discussed in Thread: TMDS64GPEVM

Here is list of FAQs created for AM64x board.

S.No. Domain Topic Link

1

Getting Started How can I flash SOC initialization binaries on HS - FS HW versions [FAQ] AM64X: How can I flash SOC initialization binaries on HS - FS HW versions

SR 2.0 Device Type Transition [FAQ] PROCESSOR-SDK-AM64X: AM64x/AM243x SR 2.0 Device Type Transition
2 HW / Board Design

Custom board design – Collaterals to Get started

[FAQ] AM6442, AM6441, AM6422, AM6421, AM6412, AM6411 Custom board hardware design – Collaterals to Get started
3

Custom board hardware design - Reusing TI EVM design files

(25) [FAQ] AM6442, AM6441, AM6422, AM6421, AM6412, AM6411 Custom board hardware design - Reusing TI EVM design files - Processors forum - Processors - TI E2E support forums
4

PRU

How to Toggle GPIO Pin on PRU? [FAQ] AM6442( AM64X) : How to Toggle GPIO Pin on PRU?
5

How to Load/Flash PRU binaries into external memory

[FAQ] AM64X: How to Load/Flash PRU binaries into external memory
6 Multicore

How to use CCS to debug a running M4F core that was started by Linux?

[FAQ] AM62x & AM64x: How to use CCS to debug a running M4F core that was started by Linux?
7

Updating the Region-based Address Translation (RAT) Settings

[FAQ] AM62x, AM64x: Updating the Region-based Address Translation (RAT) Settings
8

How to disable unused cores?

[FAQ] AM62x, AM64x: How to disable unused cores?
Generating an IPC Multicore App Image for a Custom Selection of Cores [FAQ] (AM64X ) : Generating an IPC Multicore App Image for a Custom Selection of Cores
Multi-core Image Gen for GP and HS - FS Hw versions [FAQ] AM6442( AM64X ): Multi-core Image Gen for GP and HS - FS Hw versions
Sitara multicore development and documentation [FAQ] Sitara multicore development and documentation
9 Multicore / GPIO How to Run MCU+ SDK GPIO_INPUT_INTERRUPT example for R5FSS0-0 with Linux running on A53

 

[FAQ] AM64X: How to Run MCU+ SDK GPIO_INPUT_INTERRUPT example for R5FSS0-0 with Linux running on A53
12 ROM/ Security/ Boot

Redundant/recovery boot support in ROM booting R5 bootloader

[FAQ] AM64x/AM62x SoC redundant/recovery boot support in ROM booting R5 bootloader

13 Networking

NoRTOS: http server example static ip adress configuration

[FAQ] PROCESSOR-SDK-AM64X: AM64x: NoRTOS: http server example static ip adress configuration

14

Enet Layer 2 CPSW Example not working on AM64x MCU+ SDK 08.05.00.24

[FAQ] PROCESSOR-SDK-AM64X: Enet Layer 2 CPSW Example not working on AM64x MCU+ SDK 08.05.00.24

15 CCS

Error connecting to the target from CCS 10.4.0.00006 on TMDS64GPEVM

[FAQ] PROCESSOR-SDK-AM64X: Error connecting to the target from CCS 10.4.0.00006 on TMDS64GPEVM

16 Security/TISCI-TIFS

How to use the TISCI APIs (READ_KEYCNT_KEYREV & WRITE_KEYREV) to activate the backup key set

[FAQ] AM6442: How to use the TISCI APIs (READ_KEYCNT_KEYREV & WRITE_KEYREV) to activate the backup key set