• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 100 subscribers
  • Views 334 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

[FAQ] AM62X : How do I use M4F memories when M4F(M4FSS0_0) Core is not being used?

Swargam Anil
Mastermind 21360 points
Part Number:

How do I use M4F DRAM and IRAM memories when the M4F(M4FSS0_0) core is not used for any purpose?

This FAQ mainly explains how users can use  M4F(M4FSS0_0) DRAM and IRAM memories from R5F .

This FAQ is applicable when you are not using M4F(M4FSS0_0) core in your application.

  • 0
    TI__Mastermind 21360 points

    This FAQ mainly explains how users can use  M4F DRAM and IRAM memories from R5F when the M4F App image is not presented in the Multicore App image .

    Typically, the Boot loader initializes all the cores.  during the bootflow the DM(Device Manager) configures the clock and SBL initializes the Memory for the cores whose app image is present in multicore App image file.

    for more details on boot flow please refer to documentation here https://software-dl.ti.com/mcu-plus-sdk/esd/AM62X/08_06_00_18/exports/docs/api_guide_am62x/BOOTFLOW_GUIDE.html

    if you want to use the memory associated with M4 core you will need to configure clock for the M4 Core and Initialize memories and then from your R5F application, you can access MCU M4 memory.

    Here, I am following the same method, please follow the below steps in your R5F application.

  • +1 in reply to Swargam Anil
    TI__Mastermind 21360 points

    Steps :

    1. Initialize Clock for M4F:

    Call the Bootloader_M4Cpu_init function after initialization is done and attach the code below.

    As mentioned above, we have to set the frequency to M4F by calling the SCI client API, which I have used below.

    int32_t Bootloader_M4Cpu_init(void)
{
    int32_t status = SystemP_SUCCESS;
    uint32_t clkHz;

    clkHz = Bootloader_socCpuGetClkDefault(CSL_CORE_ID_M4FSS0_0);
    status = Bootloader_socCpuRequest(CSL_CORE_ID_M4FSS0_0); //Step 1

    status = Bootloader_socCpuSetClock(CSL_CORE_ID_M4FSS0_0, clkHz); //Step 2

    if(SystemP_SUCCESS == status)
    {
     status = Bootloader_socCpuPowerOnReset(CSL_CORE_ID_M4FSS0_0,0U); //Step 3
    }

    return status;
}

    2. Access M4F Memories (IRAM & DRAM): 

    Results :

    1. The SBL image is loading only A53 and R5F cores.

    2. The R5F application is writing data into DRAM memories.