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DRA744: VIP, VPDMA and DSS configurations

Part Number: DRA744

We are getting progressive camera output from CVBS Camera sensor, of resolution 1280*960. at 30 FPS
We are trying to configure VIP1 Port A to accept this frames as input.


When we test currently we are not getting 30 Frames, only 3 Frames observing the VIP port interrupt.

What are the minimum register configurations that we need to do, to get the data on memory buffer and pass it to DSS.


  • Are you submitting the VPDMA descriptors continuously to the VPDMA for the capture channels? If this is not done, then it can stop.. 

    Please refer to the TRM for minimal configuration for registers. VIP is straight forward, it requires just less than 10 registers, but DSS requires more. 

    Regards,

    Brijesh