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TMS320C6657: Questions for device local reset

Part Number: TMS320C6657

Hi,

My customer has questions for device local reset.
Below is Table 6-34 in datasheet (SPRS814D).


Q1) When local reset is asserted by nLRESET=0, the local reset is asserted to CorePac.
In this case, the local reset is automatically deasserted by internal circuit afterward?

Q2) If the answer to Q1 is "NO", nLRESET pin needs to be set to '1' to deassert the local reset?

Thanks and regards,
Koichiro Tashiro

  • Q1) When local reset is asserted by nLRESET=0, the local reset is asserted to CorePac.
    In this case, the local reset is automatically deasserted by internal circuit afterward?

    As far as I know, the answer is "no". ( From the details below in https://www.ti.com/lit/ug/sprugv4c/sprugv4c.pdf   chapter 2.2.3 ) 

    2.2.3 Local Reset

    In addition to module reset described in the previous section, the C66x core can be reset using a special local reset. When local reset is asserted, the internal memories (L1P, L1D, and L2) for the core are still accessible. The local reset resets only the corresponding C66x core, not the rest of the chip. Local reset is intended to be used by the watchdog timers to reset the C66x core in the event of an error. The procedures for asserting and de-asserting local reset are as follows (Y denotes the module domain number):

    1. Set MDCTL[Y].LRSTZ to 0x0 to assert local reset.

    2. Set MDCTL[Y].LRSTZ to 0x1 to de-assert local reset.

    The C66x core immediately executes program instructions after reset is de-asserted. Note that the boot sequence does not re-occur unless there is a device-level reset. Execution of code previously in L2 begins execution.

    Q2) If the answer to Q1 is "NO", nLRESET pin needs to be set to '1' to deassert the local reset?

    Yes. nLRESET pin needs to be set to '1' to deassert the local reset.

    The additional details on the effect of the local reset is given in Table 6-8. Reset Types. Page no: 79.

    --"MMR bit in LPSC controls C66x CorePac local reset. Used by watchdog timers (in the event of a time-out) to reset C66x CorePac. Can also be initiated by LRESET device pin. C66x CorePac memory system and slave DMA port are still alive when C66x CorePac is in local reset. Provides a local reset of the C66x CorePac, without destroying clock alignment or memory contents. Does not initiate ROM boot process."

    --"Does not toggle RESETSTAT pin"

    --

    And also please note, for Power-on-Reset,

    "To most of the device, reset is deasserted only when the POR and RESET pins are both deasserted (driven high). Therefore, in the sequence described above, if the RESET pin is held low past the low period of the POR pin, most of the device will remain in reset. The RESET pin should not be tied together with the POR pin."

    --

    Regards

    Shankari G