I have imported two example codes, as mentioned below.
1. empty_am64x-evm_r5fss0-1_freertos_ti-arm-clang
2. ipc_rpmsg_echo_am64x-evm_r5fss0-0_freertos_ti-arm-clang
My goal is to do IPC communication between R5F_0 and R5F_1 Free RTOS.
Currently, examples available in MCU+SDK are No RTOS projects, but after moving No RTOS projects into RTOS projects, my example is not working.
Please help me resolve this issue.
Please follow the below steps to port IPC examples from No RTOS to Free RTOS.
Currently, I am doing these steps for R5F0 and R5F1, and these steps are the same for all other cores as well.
Step 1: Enable IPC RPMessage and/or IPC Notify in SysConfig for the R5F0 and R5F1. Subsequently, disable IPC feature for all cores .
Step 2 : Change the Remote Core ID List to support only core 0-1 in both ipc_rpmsg_echo.c files, and remove rest of the cores as shown below.
Step 3 : Update linker command file to place the shared memory sections at the right place in the memory map
Step 4: Mark the shared memory sections as non-cached in the MPU/MMU of the CPU. This can be done via SysConfig
Step 5 : Compile Projects
Step 6 : Use the below FAQ to generate an IPC image for custom core selection.
