Hi,
There is a concern around running GPIO Input Interrupt MCU PLUS SDK example on AM64x.
One might get an error message saying:
MAIN_Cortex_R5_0_0] [Error] Sciclient event config failed!!!
ASSERT: 0.12970s: syscfg/ti_drivers_config.c:Sciclient_gpioIrqSet:116: FALSE failed !!!
But, the same example works in MCU PLUS SDK version 08_05_00_24.
Lets see a resolution for the same in few steps.
Thanks.
In the old version 8.5:
Main GPIO Interrupt Routers 12 and 13 have been configured and routed to the R5F1_0 Core.
Main GPIO Interrupt Routers 14 and 15 have been configured and routed to the R5F1_1 Core.
Main GPIO Interrupt Routers 0 and 11 have been configured and routed to the A530_1 Core.
In the new version 8.6:
Main GPIO Interrupt Routers 12 and 13 have been configured and routed to the R5F1_0 Core.
Main GPIO Interrupt Routers 14 and 15 have been configured and routed to the R5F1_1 Core.
Main GPIO Interrupt Routers 0 and 7 have been configured and routed to the A530_1 Core.
Main GPIO Interrupt Routers 0 and 7 have been configured and routed to the R5F0_0 Core.
Main GPIO Interrupt Routers 8 and 9 have been configured and routed to the R5F0_1 Core.
Now, if you do not flash the 8.6 version of binaries on HW and then run the GPIO interrupt example from CCS, you will get the below SCI client error.
MAIN_Cortex_R5_0_0] [Error] Sciclient event configuration failed!
ASSERT: 0.12970s: syscfg/ti_drivers_config.c:Sciclient_gpioIrqSet:116: FALSE failed97
In the current 8.6 example, Router 7 has been configured for the R5F core, but Router 7 is not routing to the R5F core in the 8.5 MCU+SDK version and is routing to the A53 core. To avoid these problems, please try to flash SOC initializations with the 8.6 MCU+SDK version.
