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SK-AM64: Software-initiated power-on reset

Part Number: SK-AM64

Hi, I'm trying to initiate a power-on reset from software running on an R5 core. On boot after the reset, I'd like to verify the source of the reset by checking the `CTRLMMR_MCU_RST_SRC` register.

When I run this test code, I'd expect to see bit 25 (SW_MAIN_POR_FROM_MAIN) set, however I see bit 16 (`SW_MCU_WARMRST`) set instead:

last reset reason: 0x00010000

int main(void)
{
    System_init();
    Board_init();
    Drivers_open();
    Board_driversOpen();

    /* Show the last reset reason. Then trigger a power-on-reset */
    uint32_t reset_reason = SOC_getWarmResetCauseMainDomain();
    SOC_clearResetCauseMainMcuDomain(0xffffffff);
    DebugP_log("last reset reason: %08x \r\n", reset_reason);

    ClockP_sleep(10);
    SOC_generateSwPORResetMainDomain();


    return 0;
}

I'm not sure if `SOC_generateSwPORResetMainDomain()` is actually causing a warm reset, or if a power-on-reset always causes bit 16 to be set in `CTRLMMR_MCU_RST_SRC`, or if something else is happening.

Could I have help understanding what's happening?

  • What SDK / bootloader are you using, and which version?

    The "latest" (as in 08.06, 08.05, not sure about 08.04) MCU+ SDK (SBL) and Linux SDK (U-Boot) should include a workaround for a CPSW errata that requires a warm reset when the device is coming out of cold reset. Maybe that's what you're seeing?

    Regards,

    Dominic

  • I'm using SDK 08.05 and the OSPI SBL packaged with it.

    In the bootloader, I can see what you're describing with `Bootloader_socResetWorkaround()` which would explain my symptoms.
    Thank you!