AM5718: AM5718: IEP register access leads to crash or hang of A15

Anders Viken

Part Number: AM5718

Sorry for not responding to the previous question in a timely manner. We got busy with something else. Back to this now,.

We do enable both PRUs but i think we are only using one. For sure planning to use both in the future.

Repeating text from previous post below.

Hi.

We seem to have the exact same problem as
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1016508/am5708-a15-dsp1-hangs-if-try-to-access-any-register-of-iep-of-pru-icss1-omap_l3_noc-44000000-ocp-l3-application-error-target-5-mod-1-unclearable

When doing HW reset (power cycle) and performing a read or write to e.g. (icssEmacBaseAddressHandle->prussIepRegs + CSL_ICSSIEP_GLOBAL_CFG_REG), or any reg in prussIepRegs, A15 hangs.

This does not happen on soft reset.

However, this issue only occurs in about 1 in 20 boards.

Did you find a solution in the above case.

Thanks for you continuous support,

Anders.

over 1 year ago

0 Anders Viken over 1 year ago

Intellectual 740 points

Stanley LiuWe do enable both PRUs but i think we are only using one. For sure planning to use both in the future. Any input? Thanks.

0 Josue Zamitiz-Ayala over 1 year ago in reply to Anders Viken

TI__Mastermind 19004 points

Hello Anders,

This is a pretty rare silicon bug that happens when enabling both PRUs. It is not officially in errata yet but I have made a patch to fix it.

The patch implements a DMA burst write to the PRU clock registers that has shown to fix the issue on all our test and for other costumers as well.

Implementation:

Apply the TST patch first

0001-TST-ARM-am57xx-Enable-PRUSS-clocks.patch

2. Apply the EDMA patch on top

0001-EDMA-burst-write-to-initialize-both-PRUSS-clocks.patch

Dependency:

The patch is implemented from u-boot source and utilizes EDMA3 driver. – drivers/dma/ti-edma3.c

• This driver is enabled by enabling TI_QSPI, which should be enabled by default in defconfig file – am57xx_evm_defconfig

Regards,

-Josue

0 Anders Viken over 1 year ago in reply to Josue Zamitiz-Ayala

Intellectual 740 points

Thanks for the quick response Josue Zamitiz-Ayala. We will probably be able to give this a shot beginning of next week.

I should probably mention that we do not use linux (your pathes seemed to look like patches for linux files?), we use TI-RTOS. Maybe you have a similar fix for TI-RTOS?

Best Regards,

Anders

0 Josue Zamitiz-Ayala over 1 year ago in reply to Anders Viken

TI__Mastermind 19004 points

Hello Anders,

Unfortunately I do not. You can use the patch as an example on how to initialize both PRU instances by using a EDMA burst write. This writes directly to the PRU clock registers in one write within the timing constraint (20ns), as long as you do this before utilizing the PRUs instances you should not see this hang anymore.

It makes the write from OCMC ram directly to the registers using the EDMA driver copy-API.

From a quick look it seems like the infrastructure to make an EDMA transfer is there: git.ti.com/.../edma

I hope this helps!

Regards,

Josue

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AM5718: AM5718: IEP register access leads to crash or hang of A15