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TDA4VH-Q1: McSPI clock configuration values not lining up to possible values.

Part Number: TDA4VH-Q1

We have MCU_MCSPI0, MCSPI0, and MCSPI2 Configured on the device to operate a few peripherals. On MCSPI2, the clock was initially set to 20 MHz which stepped up to 25 MHz in measurement. This makes sense from the given clock information found on table  12-36 of the TRM (SPRUJ43C – MARCH 2022 – REVISED NOVEMBER 2022). 

However, on MCU_MCSPI0 and MCSPI0, the clock is configured to 4MHz and 8MHz respectively, and measured in at 4.167MHz and 8.33MHz. From table 12-36, it doesn't look like this is a possible configuration. 

I see info on the Clock Granularity bits in table 12-38. Can you confirm if we're able to get 8.333Mhz and 4.167MHz by configuring both the granularity and the clock rate (CLKG and CLKD) of the McSPI?