What is the PRU core? Why is it useful for applications that would typically require an FPGA or a CPLD to work?
INTRODUCTION
Many systems need to interface to an external device that does not use a standard protocol. These external devices can range from an array of analog to digital converters (ADCs) to a peripheral with a proprietary bus interface. TI’s Sitara processors with programmable real-time unit (PRU) cores are designed to communicate with these devices without the need to add FPGAs, ASICs, CPLDs, etc to the design.
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This FAQ applies to all Sitara processors with a PRU subsystem, including AM243x, AM263x, AM335x, AM437x, AM57x, AM62x, AM64x, AM65x. For more information about the PRU, reference the PRU Development section of the Sitara multicore development and documentation FAQ.