We are reading an analog signal into analog input 0 that ranges from 0 to 1.6V. It's a low-frequency signal.
I know some of this is not TI-supported, but my question is about the basic functionality of the TSCADC, so please read on.
We are using a BeagleBone Black. We write all code in C and run on Debian Linux.
We monitor the analog line with a separate data acquisition system.
Code written and running on the ARM reads the signal fine. There's a little noise, but it is acceptable.
We use the off-the-shelf kernel driver that sets up the ADC with all steps enabled, 16 averages per sample, and the default open delay.
When we use the code we wrote for PRU0 to read the signal, it works fine (and has for months), but the signal observed on the data acquisition system drifts up around 300 mv and sits there with this DC offset.
I've never seen an ADC cause this type of behavior. What would cause this? We're pulling our hair out.
Does the TSC Charge have any potential impact? I've never messed with it at all and the TRM doesn't really say much about how it works. It just describes the two registers.