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TDA4VH-Q1: Mixed precision inference on board gets stuck with 3*768*768 image input

Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VP-Q1, TDA4AH-Q1, TDA4AP-Q1, TDA4VH

PROCESSOR-SDK-RTOS-J784S4
RTOS SDK for TDA4AP-Q1, TDA4VP-Q1, TDA4AH-Q1 and TDA4VH-Q1
Version: 08.06.xx

The model is a detection model that allows the customized configuration file to successfully export the mix precision quantized model with 768*768 size, which is good for PC simulations inference, but it gets stuck on board , it looks like getting stuck at the verift graph phase of VX. By the way, when only input image size is changed to 576*576 and other configurations is same, all things goes well. But we need the 768*768 case work. 

 Please help me check this problem, there are some relative files following for checking this problem.

TI_VH_problem.zip

  • Hi, 

    In the attached file, I do not see the logs attached.

    Could you share me the full logs from the application as well as remote core logs?

    Please run ./vision_apps_init.sh before running the application and share the logs for the same.

    Regards,

    Nikhil

  • I can just provide generated files by model importing  for some reason, please help us reproduce this problem. tidl version :ti-processor-sdk-rtos-j721e-evm-08_06_00_12/tidl_j721e_08_06_00_10import result.zip

  • Hi,

    I believe you are running the model with some vision_apps application on the EVM or your custom board right?

    If yes, may I know which vision_apps SDK demos are you using?

    it looks like getting stuck at the verift graph phase of VX

    You mentioned it is getting stuck in verify graph. 

    For this, I need the below logs in order to debug this issue. Please provide me these logs.

    Could you share me the full logs from the application as well as remote core logs?

    Please run ./vision_apps_init.sh before running the application and share the logs for the same.

    Regards,

    Nikhil

  • here is the log you want 8424.log.zip 

  • Hi,

    Thank you for the logs.

    From this I see that the IPC echo test logs does not have MCU3_0 and MCU3_1 whereas that are vision_apps logs coming from MCU3_1.

    Could you disable this core from vision_apps if you are not using the same?

    Regards,

    Nikhil

  • Sorry,we cant disable the core you mentioned. Do you know how to diable the core by some easy way? By the way, We had provided original files for importing model mentioned above,  could you generate model and reproduce the problem according the same version mention above to explore some solution?

  • Hi,

    Sorry,we cant disable the core you mentioned. Do you know how to diable the core by some easy way?

    To disable the cores, you would have to do the following 2 changes.

    1. In vision_apps/platform/j784s4/rtos/common/app_cfg.h , comment out ENABLE_IPC_MCU3_0 and ENABLE_IPC_MCU3_1

    2. In vision_apps/vision_apps_build_flags.mak, make BUILD_CPU_MCU3_0?= no and BUILD_CPU_MCU3_1?= no

    Do a clean build of vision_apps and copy the contents into the SD Card. This will disable MCU3_0 and MCU3_1

    May I know how are you executing your object detection model? Are you using any SDK vision_apps demo for the same? if yes, could you let me know which one?

    Regards,

    Nikhil

  • ok ,I'll check killing cores later. 

    Our method:
    importting model: ti-processor-sdk-rtos-j721e-evm-08_06_00_12/tidl_j721e_08_06_00_10/ti_dl/utils/tidlModelImport/out/tidl_model_import.out
    Inferring model: ti-processor-sdk-rtos-j721e-evm-08_06_00_12/tidl_j721e_08_06_00_10/ti_dl/test//PC_dsp_test_dl_algo.out
  • Hi,

    As i read through the above responses, you are using TIDL RT, for your model import and inference purpose.

    Can you share the inference logs on EVM with debugTraceLevel = 2 that would be good to look into (If its already shared, can you help me point the same ?)

  • Hi Pratik.

    with customer help, tried to import customer model and run that on SDK9.1 + VH EVM.

    using TIDL RT to run the onnx model (best model), segmentation fault happens whatever the input size is 576x576 and 768x768.

    corresponding files (model, input image...) 1803.testvecs.zip

    log and the steps as below.

    j784s4_log_error_faw_best_onnx_net_768.txt

    j784s4_log_pass_faw_best_onnx_net_PC_Simu_768.txt
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ ./PC_dsp_test_dl_algo.out --debugTraceLevel 2
    
    Processing config file #0 : testvecs/config/infer/public/onnx/tidl_infer_faw_best_model.txt 
    Input : dataId=0, name=images_original, elementType 0, scale=1.000000, zero point=0, layout=0
    Ouput : dataId=118, name=detections_det, elementType 6, scale=1.000000, zero point=0, layout=0 
         19852256,     18.933 0x7fb6ec0f0010
    worstCaseDelay for Pre-emption is 1.5886135 
    Network File Read done
    Calling algAlloc
    
    --------------------------------------------
    TIDL Memory size requiement (record wise):
    MemRecNum   , Space               , Attribute   , Alignment   , Size(KBytes), BasePtr     
    0           , DDR Cacheable       , Persistent  ,  128, 15.65   , 0x00000000
    1           , DDR Cacheable       , Persistent  ,  128, 0.64    , 0x00000000
    2           , DDR Cacheable       , Scratch     ,  128, 16.00   , 0x00000000
    3           , DDR Cacheable       , Scratch     ,  128, 448.00  , 0x00000000
    4           , DDR Cacheable       , Scratch     ,  128, 2944.00 , 0x00000000
    5           , DDR Cacheable       , Persistent  ,  128, 12856.77, 0x00000000
    6           , DDR Cacheable       , Scratch     ,  128, 29.62   , 0x00000000
    7           , DDR Cacheable       , Scratch     ,  128, 8646.00 , 0x00000000
    8           , DDR Cacheable       , Scratch     ,  128, 116352.12, 0x00000000
    9           , DDR Cacheable       , Scratch     ,  128, 9699.00 , 0x00000000
    10          , DDR Cacheable       , Persistent  ,  128, 1278.67 , 0x00000000
    11          , DDR Cacheable       , Scratch     ,  128, 45300.24, 0x00000000
    12          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0x00000000
    13          , DDR Cacheable       , Persistent  ,  128, 19387.09, 0x00000000
    14          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0x00000000
    --------------------------------------------
    Total memory size requirement (space wise):
    Mem Space , Size(KBytes)
    DDR Cacheable, 216974.06
    --------------------------------------------
    NOTE: Memory requirement in host emulation can be different from the same on EVM
          To get the actual TIDL memory requirement make sure to run on EVM with 
          debugTraceLevel = 2
    
    --------------------------------------------
    Num,    Space,     SizeinBytes,   SineInMB
       0,    17,        16024,      0.015 0x55f98e7ec080
       1,    17,          656,      0.001 0x55f98e7eb100
       2,    17,        16384,      0.016 0x7fb6ed3df080
       3,    17,       458752,      0.438 0x7fb6ed3e3080
       4,    17,      3014656,      2.875 0x7fb6ed453080
       5,    17,     13165336,     12.555 0x7fb6eb461080
       6,    17,        30336,      0.029 0x7fb6ed733080
       7,    17,      8853504,      8.443 0x7fb6ed73a700
       8,    17,    119144576,    113.625 0x7fb6edfabf00
       9,    17,      9931776,      9.472 0x7fb6f514bf80
      10,    17,      1309360,      1.249 0x7fb6eb321080
      11,    17,     46387443,     44.239 0x7fb6f5ac4b80
      12,    17,          128,      0.000 0x55f98e7f0000
      13,    17,     19852384,     18.933 0x7fb6ea032080
      14,    17,          121,      0.000 0x55f98e7f0100
    Total External Memory (DDR) Size =    222181436,    211.889 
    TIDL init call from ivision API 
    
    --------------------------------------------
    TIDL Memory size requiement (record wise):
    MemRecNum   , Space               , Attribute   , Alignment   , Size(KBytes), BasePtr     
    0           , DDR Cacheable       , Persistent  ,  128, 15.65   , 0x8e7ec080
    1           , DDR Cacheable       , Persistent  ,  128, 0.64    , 0x8e7eb100
    2           , DDR Cacheable       , Scratch     ,  128, 16.00   , 0xed3df080
    3           , DDR Cacheable       , Scratch     ,  128, 448.00  , 0xed3e3080
    4           , DDR Cacheable       , Scratch     ,  128, 2944.00 , 0xed453080
    5           , DDR Cacheable       , Persistent  ,  128, 12856.77, 0xeb461080
    6           , DDR Cacheable       , Scratch     ,  128, 29.62   , 0xed733080
    7           , DDR Cacheable       , Scratch     ,  128, 8646.00 , 0xed73a700
    8           , DDR Cacheable       , Scratch     ,  128, 116352.12, 0xedfabf00
    9           , DDR Cacheable       , Scratch     ,  128, 9699.00 , 0xf514bf80
    10          , DDR Cacheable       , Persistent  ,  128, 1278.67 , 0xeb321080
    11          , DDR Cacheable       , Scratch     ,  128, 45300.24, 0xf5ac4b80
    12          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0x8e7f0000
    13          , DDR Cacheable       , Persistent  ,  128, 19387.09, 0xea032080
    14          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0x8e7f0100
    --------------------------------------------
    Total memory size requirement (space wise):
    Mem Space , Size(KBytes)
    DDR Cacheable, 216974.06
    --------------------------------------------
    NOTE: Memory requirement in host emulation can be different from the same on EVM
          To get the actual TIDL memory requirement make sure to run on EVM with 
          debugTraceLevel = 2
    
    --------------------------------------------
    Alg Init for Layer # -    1
    Alg Init for Layer # -    2
    Alg Init for Layer # -    3
    Alg Init for Layer # -    4
    Alg Init for Layer # -    5
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    Alg Init for Layer # -   91
    Alg Init for Layer # -  100
    Alg Init for Layer # -  109
    Alg Init for Layer # -  118
    PREEMPTION: Adding a new priority object for targetPriority = 0, handle = 0x55f98e7ec080
    PREEMPTION: Now total number of priority objects = 1 at priorityId = 0,    with new memRec of base = 0x55f98e7f0000 and size = 128
    PREEMPTION: Requesting context memory addr for handle 0x55f98e7ec080, return Addr = 0x55f9846d1158
     Freeing memory for user provided Net
    
     Instance created for  testvecs/config/infer/public/onnx/tidl_infer_faw_best_model.txt
    
    Processing Cnt :    0, InstCnt :    0 testvecs/config/tidl_models/onnx/det_model.bin!
    TIDL_RT: Set default TIDLRT tensor done
    TIDL_RT: Set default TIDLRT tensor done
    testvecs/input/1.bmp
         3538944,      3.375 0x55f98e9a3300
          202080,      0.193 0x55f98ed03380
     ----------------------- TIDL Process with REF_ONLY FLOW ------------------------
    
    #    0 . ..TIDL_activate is called with handle : 8e7ec080 
    Core 0 Alg Process for Layer # -    1, layer type 1 
    Processing Layer # -    1
    End of Layer # -    1 with outPtrs[0] = 0x7fb6ed73a700
    Core 0 Alg Process for Layer # -    2, layer type 1 
    Processing Layer # -    2
    End of Layer # -    2 with outPtrs[0] = 0x7fb6edaefa00
    Core 0 Alg Process for Layer # -    3, layer type 1 
    Processing Layer # -    3
    End of Layer # -    3 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -    4, layer type 1 
    Processing Layer # -    4
    End of Layer # -    4 with outPtrs[0] = 0x7fb6ed73a700
    Core 0 Alg Process for Layer # -    5, layer type 1 
    Processing Layer # -    5
    End of Layer # -    5 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -    6, layer type 1 
    Processing Layer # -    6
    End of Layer # -    6 with outPtrs[0] = 0x7fb6ed573900
    Core 0 Alg Process for Layer # -    7, layer type 1 
    Processing Layer # -    7
    End of Layer # -    7 with outPtrs[0] = 0x7fb6ed573900
    Core 0 Alg Process for Layer # -    8, layer type 5 
    Processing Layer # -    8
    End of Layer # -    8 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -    9, layer type 12 
    Processing Layer # -    9
    End of Layer # -    9 with outPtrs[0] = 0x7fb6ed886300
    Core 0 Alg Process for Layer # -   10, layer type 1 
    Processing Layer # -   10
    End of Layer # -   10 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   11, layer type 1 
    Processing Layer # -   11
    End of Layer # -   11 with outPtrs[0] = 0x7fb6ed73a700
    Core 0 Alg Process for Layer # -   12, layer type 1 
    Processing Layer # -   12
    End of Layer # -   12 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   14, layer type 1 
    Processing Layer # -   14
    End of Layer # -   14 with outPtrs[0] = 0x7fb6ed4e4100
    Core 0 Alg Process for Layer # -   15, layer type 1 
    Processing Layer # -   15
    End of Layer # -   15 with outPtrs[0] = 0x7fb6ed4e4100
    Core 0 Alg Process for Layer # -   16, layer type 5 
    Processing Layer # -   16
    End of Layer # -   16 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   17, layer type 1 
    Processing Layer # -   17
    End of Layer # -   17 with outPtrs[0] = 0x7fb6ed4e4100
    Core 0 Alg Process for Layer # -   18, layer type 1 
    Processing Layer # -   18
    End of Layer # -   18 with outPtrs[0] = 0x7fb6ed4e4100
    Core 0 Alg Process for Layer # -   19, layer type 5 
    Processing Layer # -   19
    End of Layer # -   19 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   20, layer type 1 
    Processing Layer # -   20
    End of Layer # -   20 with outPtrs[0] = 0x7fb6ed4e4100
    Core 0 Alg Process for Layer # -   21, layer type 1 
    Processing Layer # -   21
    End of Layer # -   21 with outPtrs[0] = 0x7fb6ed4e4100
    Core 0 Alg Process for Layer # -   22, layer type 5 
    Processing Layer # -   22
    End of Layer # -   22 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   13, layer type 1 
    Processing Layer # -   13
    End of Layer # -   13 with outPtrs[0] = 0x7fb6ed4e4100
    Core 0 Alg Process for Layer # -   23, layer type 12 
    Processing Layer # -   23
    End of Layer # -   23 with outPtrs[0] = 0x7fb6ed576ec0
    Core 0 Alg Process for Layer # -   24, layer type 1 
    Processing Layer # -   24
    End of Layer # -   24 with outPtrs[0] = 0x7fb6ed4df200
    Core 0 Alg Process for Layer # -   25, layer type 1 
    Processing Layer # -   25
    End of Layer # -   25 with outPtrs[0] = 0x7fb6ed601280
    Core 0 Alg Process for Layer # -   26, layer type 1 
    Processing Layer # -   26
    End of Layer # -   26 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   28, layer type 1 
    Processing Layer # -   28
    End of Layer # -   28 with outPtrs[0] = 0x7fb6ed695300
    Core 0 Alg Process for Layer # -   29, layer type 1 
    Processing Layer # -   29
    End of Layer # -   29 with outPtrs[0] = 0x7fb6ed695300
    Core 0 Alg Process for Layer # -   30, layer type 5 
    Processing Layer # -   30
    End of Layer # -   30 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   31, layer type 1 
    Processing Layer # -   31
    End of Layer # -   31 with outPtrs[0] = 0x7fb6ed695300
    Core 0 Alg Process for Layer # -   32, layer type 1 
    Processing Layer # -   32
    End of Layer # -   32 with outPtrs[0] = 0x7fb6ed695300
    Core 0 Alg Process for Layer # -   33, layer type 5 
    Processing Layer # -   33
    End of Layer # -   33 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   34, layer type 1 
    Processing Layer # -   34
    End of Layer # -   34 with outPtrs[0] = 0x7fb6ed695300
    Core 0 Alg Process for Layer # -   35, layer type 1 
    Processing Layer # -   35
    End of Layer # -   35 with outPtrs[0] = 0x7fb6ed695300
    Core 0 Alg Process for Layer # -   36, layer type 5 
    Processing Layer # -   36
    End of Layer # -   36 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   27, layer type 1 
    Processing Layer # -   27
    End of Layer # -   27 with outPtrs[0] = 0x7fb6ed601280
    Core 0 Alg Process for Layer # -   37, layer type 12 
    Processing Layer # -   37
    End of Layer # -   37 with outPtrs[0] = 0x7fb6ed64bbc0
    Core 0 Alg Process for Layer # -   38, layer type 1 
    Processing Layer # -   38
    End of Layer # -   38 with outPtrs[0] = 0x7fb6ed601280
    Core 0 Alg Process for Layer # -   39, layer type 1 
    Processing Layer # -   39
    End of Layer # -   39 with outPtrs[0] = 0x7fb6ed46e100
    Core 0 Alg Process for Layer # -   40, layer type 1 
    Processing Layer # -   40
    End of Layer # -   40 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   41, layer type 1 
    Processing Layer # -   41
    End of Layer # -   41 with outPtrs[0] = 0x7fb6ed46e100
    Core 0 Alg Process for Layer # -   42, layer type 1 
    Processing Layer # -   42
    End of Layer # -   42 with outPtrs[0] = 0x7fb6ed48f180
    Core 0 Alg Process for Layer # -   43, layer type 1 
    Processing Layer # -   43
    End of Layer # -   43 with outPtrs[0] = 0x7fb6ed4aa200
    Core 0 Alg Process for Layer # -   44, layer type 5 
    Processing Layer # -   44
    End of Layer # -   44 with outPtrs[0] = 0x7fb6ed46e100
    Core 0 Alg Process for Layer # -   45, layer type 12 
    Processing Layer # -   45
    End of Layer # -   45 with outPtrs[0] = 0x7fb6ed489340
    Core 0 Alg Process for Layer # -   46, layer type 1 
    Processing Layer # -   46
    End of Layer # -   46 with outPtrs[0] = 0x7fb6ed465100
    Core 0 Alg Process for Layer # -   47, layer type 1 
    Processing Layer # -   47
    End of Layer # -   47 with outPtrs[0] = 0x7fb6ed49b180
    Core 0 Alg Process for Layer # -   48, layer type 1 
    Processing Layer # -   48
    End of Layer # -   48 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   49, layer type 2 
    Processing Layer # -   49
    End of Layer # -   49 with outPtrs[0] = 0x7fb6ed49b180
    Core 0 Alg Process for Layer # -   50, layer type 2 
    Processing Layer # -   50
    End of Layer # -   50 with outPtrs[0] = 0x7fb6ed4a7200
    Core 0 Alg Process for Layer # -   52, layer type 2 
    Processing Layer # -   52
    End of Layer # -   52 with outPtrs[0] = 0x7fb6ed4a7200
    Core 0 Alg Process for Layer # -   51, layer type 2 
    Processing Layer # -   51
    End of Layer # -   51 with outPtrs[0] = 0x7fb6ed4b3280
    Core 0 Alg Process for Layer # -   53, layer type 2 
    Processing Layer # -   53
    End of Layer # -   53 with outPtrs[0] = 0x7fb6ed4b3280
    Core 0 Alg Process for Layer # -   54, layer type 2 
    Processing Layer # -   54
    End of Layer # -   54 with outPtrs[0] = 0x7fb6ed4b3280
    Core 0 Alg Process for Layer # -   55, layer type 12 
    Processing Layer # -   55
    End of Layer # -   55 with outPtrs[0] = 0x7fb6ed695300
    Core 0 Alg Process for Layer # -   56, layer type 1 
    Processing Layer # -   56
    End of Layer # -   56 with outPtrs[0] = 0x7fb6ed49b180
    Core 0 Alg Process for Layer # -   57, layer type 1 
    Processing Layer # -   57
    End of Layer # -   57 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   59, layer type 1 
    Processing Layer # -   59
    End of Layer # -   59 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   60, layer type 1 
    Processing Layer # -   60
    End of Layer # -   60 with outPtrs[0] = 0x7fb6ed4b3200
    Core 0 Alg Process for Layer # -   58, layer type 1 
    Processing Layer # -   58
    End of Layer # -   58 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   61, layer type 12 
    Processing Layer # -   61
    End of Layer # -   61 with outPtrs[0] = 0x7fb6ed49b1f4
    Core 0 Alg Process for Layer # -   62, layer type 1 
    Processing Layer # -   62
    End of Layer # -   62 with outPtrs[0] = 0x7fb6ed4b3274
    Core 0 Alg Process for Layer # -   63, layer type 1 
    Processing Layer # -   63
    End of Layer # -   63 with outPtrs[0] = 0x7fb6ed4530f4
    Core 0 Alg Process for Layer # -   64, layer type 21 
    Processing Layer # -   64
    End of Layer # -   64 with outPtrs[0] = 0x7fb6ed49b268
    Core 0 Alg Process for Layer # -   65, layer type 12 
    Processing Layer # -   65
    End of Layer # -   65 with outPtrs[0] = 0x7fb6ed695300
    Core 0 Alg Process for Layer # -   66, layer type 1 
    Processing Layer # -   66
    End of Layer # -   66 with outPtrs[0] = 0x7fb6ed465100
    Core 0 Alg Process for Layer # -   68, layer type 1 
    Processing Layer # -   68
    End of Layer # -   68 with outPtrs[0] = 0x7fb6ed465100
    Core 0 Alg Process for Layer # -   69, layer type 1 
    Processing Layer # -   69
    End of Layer # -   69 with outPtrs[0] = 0x7fb6ed480180
    Core 0 Alg Process for Layer # -   67, layer type 1 
    Processing Layer # -   67
    End of Layer # -   67 with outPtrs[0] = 0x7fb6ed465100
    Core 0 Alg Process for Layer # -   70, layer type 12 
    Processing Layer # -   70
    End of Layer # -   70 with outPtrs[0] = 0x7fb6ed49b268
    Core 0 Alg Process for Layer # -   71, layer type 1 
    Processing Layer # -   71
    End of Layer # -   71 with outPtrs[0] = 0x7fb6ed4912e8
    Core 0 Alg Process for Layer # -   72, layer type 1 
    Processing Layer # -   72
    End of Layer # -   72 with outPtrs[0] = 0x7fb6ed465168
    Core 0 Alg Process for Layer # -   73, layer type 21 
    Processing Layer # -   73
    End of Layer # -   73 with outPtrs[0] = 0x7fb6ed73a7d0
    Core 0 Alg Process for Layer # -   74, layer type 12 
    Processing Layer # -   74
    End of Layer # -   74 with outPtrs[0] = 0x7fb6ed7d0b80
    Core 0 Alg Process for Layer # -   75, layer type 1 
    Processing Layer # -   75
    End of Layer # -   75 with outPtrs[0] = 0x7fb6ed491180
    Core 0 Alg Process for Layer # -   77, layer type 1 
    Processing Layer # -   77
    End of Layer # -   77 with outPtrs[0] = 0x7fb6ed491180
    Core 0 Alg Process for Layer # -   78, layer type 1 
    Processing Layer # -   78
    End of Layer # -   78 with outPtrs[0] = 0x7fb6ed491180
    Core 0 Alg Process for Layer # -   76, layer type 1 
    Processing Layer # -   76
    End of Layer # -   76 with outPtrs[0] = 0x7fb6ed601280
    Core 0 Alg Process for Layer # -   79, layer type 12 
    Processing Layer # -   79
    End of Layer # -   79 with outPtrs[0] = 0x7fb6ed64b350
    Core 0 Alg Process for Layer # -   80, layer type 1 
    Processing Layer # -   80
    End of Layer # -   80 with outPtrs[0] = 0x7fb6ed601790
    Core 0 Alg Process for Layer # -   81, layer type 1 
    Processing Layer # -   81
    End of Layer # -   81 with outPtrs[0] = 0x7fb6ed4911d0
    Core 0 Alg Process for Layer # -   82, layer type 21 
    Processing Layer # -   82
    End of Layer # -   82 with outPtrs[0] = 0x7fb6ed73a7a0
    Core 0 Alg Process for Layer # -   83, layer type 12 
    Processing Layer # -   83
    End of Layer # -   83 with outPtrs[0] = 0x7fb6ed860b80
    Core 0 Alg Process for Layer # -   84, layer type 1 
    Processing Layer # -   84
    End of Layer # -   84 with outPtrs[0] = 0x7fb6ed4df200
    Core 0 Alg Process for Layer # -   86, layer type 1 
    Processing Layer # -   86
    End of Layer # -   86 with outPtrs[0] = 0x7fb6ed4df200
    Core 0 Alg Process for Layer # -   87, layer type 1 
    Processing Layer # -   87
    End of Layer # -   87 with outPtrs[0] = 0x7fb6ed4df200
    Core 0 Alg Process for Layer # -   85, layer type 1 
    Processing Layer # -   85
    End of Layer # -   85 with outPtrs[0] = 0x7fb6ed570280
    Core 0 Alg Process for Layer # -   88, layer type 12 
    Processing Layer # -   88
    End of Layer # -   88 with outPtrs[0] = 0x7fb6ed601300
    Core 0 Alg Process for Layer # -   89, layer type 1 
    Processing Layer # -   89
    End of Layer # -   89 with outPtrs[0] = 0x7fb6ed4df200
    Core 0 Alg Process for Layer # -   90, layer type 1 
    Processing Layer # -   90
    End of Layer # -   90 with outPtrs[0] = 0x7fb6ed601280
    Core 0 Alg Process for Layer # -   92, layer type 12 
    Processing Layer # -   92
    End of Layer # -   92 with outPtrs[0] = 0x7fb6ed64b300
    Core 0 Alg Process for Layer # -   93, layer type 1 
    Processing Layer # -   93
    End of Layer # -   93 with outPtrs[0] = 0x7fb6ed491180
    Core 0 Alg Process for Layer # -   95, layer type 1 
    Processing Layer # -   95
    End of Layer # -   95 with outPtrs[0] = 0x7fb6ed491180
    Core 0 Alg Process for Layer # -   96, layer type 1 
    Processing Layer # -   96
    End of Layer # -   96 with outPtrs[0] = 0x7fb6ed491180
    Core 0 Alg Process for Layer # -   94, layer type 1 
    Processing Layer # -   94
    End of Layer # -   94 with outPtrs[0] = 0x7fb6ed601280
    Core 0 Alg Process for Layer # -   97, layer type 12 
    Processing Layer # -   97
    End of Layer # -   97 with outPtrs[0] = 0x7fb6ed64b300
    Core 0 Alg Process for Layer # -   98, layer type 1 
    Processing Layer # -   98
    End of Layer # -   98 with outPtrs[0] = 0x7fb6ed601300
    Core 0 Alg Process for Layer # -   99, layer type 1 
    Processing Layer # -   99
    End of Layer # -   99 with outPtrs[0] = 0x7fb6ed491180
    Core 0 Alg Process for Layer # -  101, layer type 12 
    Processing Layer # -  101
    End of Layer # -  101 with outPtrs[0] = 0x7fb6ed695380
    Core 0 Alg Process for Layer # -  102, layer type 1 
    Processing Layer # -  102
    End of Layer # -  102 with outPtrs[0] = 0x7fb6ed465100
    Core 0 Alg Process for Layer # -  104, layer type 1 
    Processing Layer # -  104
    End of Layer # -  104 with outPtrs[0] = 0x7fb6ed465100
    Core 0 Alg Process for Layer # -  105, layer type 1 
    Processing Layer # -  105
    End of Layer # -  105 with outPtrs[0] = 0x7fb6ed480180
    Core 0 Alg Process for Layer # -  103, layer type 1 
    Processing Layer # -  103
    End of Layer # -  103 with outPtrs[0] = 0x7fb6ed465100
    Core 0 Alg Process for Layer # -  106, layer type 12 
    Processing Layer # -  106
    End of Layer # -  106 with outPtrs[0] = 0x7fb6ed49b200
    Core 0 Alg Process for Layer # -  107, layer type 1 
    Processing Layer # -  107
    End of Layer # -  107 with outPtrs[0] = 0x7fb6ed465100
    Core 0 Alg Process for Layer # -  108, layer type 1 
    Processing Layer # -  108
    End of Layer # -  108 with outPtrs[0] = 0x7fb6ed49b180
    Core 0 Alg Process for Layer # -  110, layer type 12 
    Processing Layer # -  110
    End of Layer # -  110 with outPtrs[0] = 0x7fb6ed4ad200
    Core 0 Alg Process for Layer # -  111, layer type 1 
    Processing Layer # -  111
    End of Layer # -  111 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -  113, layer type 1 
    Processing Layer # -  113
    End of Layer # -  113 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -  114, layer type 1 
    Processing Layer # -  114
    End of Layer # -  114 with outPtrs[0] = 0x7fb6ed49b180
    Core 0 Alg Process for Layer # -  112, layer type 1 
    Processing Layer # -  112
    End of Layer # -  112 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -  115, layer type 12 
    Processing Layer # -  115
    End of Layer # -  115 with outPtrs[0] = 0x7fb6ed4b3200
    Core 0 Alg Process for Layer # -  116, layer type 1 
    Processing Layer # -  116
    End of Layer # -  116 with outPtrs[0] = 0x7fb6ed49b180
    Core 0 Alg Process for Layer # -  117, layer type 1 
    Processing Layer # -  117
    End of Layer # -  117 with outPtrs[0] = 0x7fb6ed453080
    Core 0 Alg Process for Layer # -   91, layer type 1 
    Processing Layer # -   91
    End of Layer # -   91 with outPtrs[0] = 0x7fb6ed73a700
    Core 0 Alg Process for Layer # -  100, layer type 1 
    Processing Layer # -  100
    End of Layer # -  100 with outPtrs[0] = 0x7fb6ed49b180
    Core 0 Alg Process for Layer # -  109, layer type 1 
    Processing Layer # -  109
    End of Layer # -  109 with outPtrs[0] = 0x7fb6ed516500
    Core 0 Alg Process for Layer # -  118, layer type 19 
    Processing Layer # -  118
    End of Layer # -  118 with outPtrs[0] = 0x55f98ed03380
    TIDL_process is completed with handle : 8e7ec080 
     T   38506.40 Skipping static gen-set function
     .... ..... ...testvecs/input/1.bmp
    testvecs/input/1.bmp
     .... .....TIDL_deactivate is called with handle : 8e7ec080 
    PREEMPTION: Removing priroty object with handle = 0x55f98e7ec080 and targetPriority = 0,      Number of obejcts left are = 0, removed object with base  = 0x55f98e7f0000 and size =128
    
    

    j784s4_log_pass_faw_best_onnx_net_PC_Simu_576.txt
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ ./PC_dsp_test_dl_algo.out --debugTraceLevel 2
    
    Processing config file #0 : testvecs/config/infer/public/onnx/tidl_infer_faw_best_model.txt 
    Input : dataId=0, name=images_original, elementType 0, scale=1.000000, zero point=0, layout=0
    Ouput : dataId=118, name=detections_det, elementType 6, scale=1.000000, zero point=0, layout=0 
         19852256,     18.933 0x7facabef0010
    worstCaseDelay for Pre-emption is 0.7556463 
    Network File Read done
    Calling algAlloc
    
    --------------------------------------------
    TIDL Memory size requiement (record wise):
    MemRecNum   , Space               , Attribute   , Alignment   , Size(KBytes), BasePtr     
    0           , DDR Cacheable       , Persistent  ,  128, 15.65   , 0x00000000
    1           , DDR Cacheable       , Persistent  ,  128, 0.64    , 0x00000000
    2           , DDR Cacheable       , Scratch     ,  128, 16.00   , 0x00000000
    3           , DDR Cacheable       , Scratch     ,  128, 448.00  , 0x00000000
    4           , DDR Cacheable       , Scratch     ,  128, 2944.00 , 0x00000000
    5           , DDR Cacheable       , Persistent  ,  128, 12856.77, 0x00000000
    6           , DDR Cacheable       , Scratch     ,  128, 29.62   , 0x00000000
    7           , DDR Cacheable       , Scratch     ,  128, 3295.25 , 0x00000000
    8           , DDR Cacheable       , Scratch     ,  128, 79056.12, 0x00000000
    9           , DDR Cacheable       , Scratch     ,  128, 6591.00 , 0x00000000
    10          , DDR Cacheable       , Persistent  ,  128, 1278.67 , 0x00000000
    11          , DDR Cacheable       , Scratch     ,  128, 25815.52, 0x00000000
    12          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0x00000000
    13          , DDR Cacheable       , Persistent  ,  128, 19387.09, 0x00000000
    14          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0x00000000
    --------------------------------------------
    Total memory size requirement (space wise):
    Mem Space , Size(KBytes)
    DDR Cacheable, 151734.59
    --------------------------------------------
    NOTE: Memory requirement in host emulation can be different from the same on EVM
          To get the actual TIDL memory requirement make sure to run on EVM with 
          debugTraceLevel = 2
    
    --------------------------------------------
    Num,    Space,     SizeinBytes,   SineInMB
       0,    17,        16024,      0.015 0x55f2b467fb00
       1,    17,          656,      0.001 0x55f2b467eb00
       2,    17,        16384,      0.016 0x7facad1df080
       3,    17,       458752,      0.438 0x7facad1e3080
       4,    17,      3014656,      2.875 0x7facad253080
       5,    17,     13165336,     12.555 0x7facab261080
       6,    17,        30336,      0.029 0x7facad533080
       7,    17,      3374336,      3.218 0x7facad53a700
       8,    17,     80953472,     77.203 0x7facad872400
       9,    17,      6749184,      6.437 0x7facb25a6480
      10,    17,      1309360,      1.249 0x7facab121080
      11,    17,     26435091,     25.210 0x7facb2c16080
      12,    17,          128,      0.000 0x55f2b4683a00
      13,    17,     19852384,     18.933 0x7faca9e32080
      14,    17,          121,      0.000 0x55f2b4683b80
    Total External Memory (DDR) Size =    155376220,    148.178 
    TIDL init call from ivision API 
    
    --------------------------------------------
    TIDL Memory size requiement (record wise):
    MemRecNum   , Space               , Attribute   , Alignment   , Size(KBytes), BasePtr     
    0           , DDR Cacheable       , Persistent  ,  128, 15.65   , 0xb467fb00
    1           , DDR Cacheable       , Persistent  ,  128, 0.64    , 0xb467eb00
    2           , DDR Cacheable       , Scratch     ,  128, 16.00   , 0xad1df080
    3           , DDR Cacheable       , Scratch     ,  128, 448.00  , 0xad1e3080
    4           , DDR Cacheable       , Scratch     ,  128, 2944.00 , 0xad253080
    5           , DDR Cacheable       , Persistent  ,  128, 12856.77, 0xab261080
    6           , DDR Cacheable       , Scratch     ,  128, 29.62   , 0xad533080
    7           , DDR Cacheable       , Scratch     ,  128, 3295.25 , 0xad53a700
    8           , DDR Cacheable       , Scratch     ,  128, 79056.12, 0xad872400
    9           , DDR Cacheable       , Scratch     ,  128, 6591.00 , 0xb25a6480
    10          , DDR Cacheable       , Persistent  ,  128, 1278.67 , 0xab121080
    11          , DDR Cacheable       , Scratch     ,  128, 25815.52, 0xb2c16080
    12          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0xb4683a00
    13          , DDR Cacheable       , Persistent  ,  128, 19387.09, 0xa9e32080
    14          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0xb4683b80
    --------------------------------------------
    Total memory size requirement (space wise):
    Mem Space , Size(KBytes)
    DDR Cacheable, 151734.59
    --------------------------------------------
    NOTE: Memory requirement in host emulation can be different from the same on EVM
          To get the actual TIDL memory requirement make sure to run on EVM with 
          debugTraceLevel = 2
    
    --------------------------------------------
    Alg Init for Layer # -    1
    Alg Init for Layer # -    2
    Alg Init for Layer # -    3
    Alg Init for Layer # -    4
    Alg Init for Layer # -    5
    Alg Init for Layer # -    6
    Alg Init for Layer # -    7
    Alg Init for Layer # -    8
    Alg Init for Layer # -    9
    Alg Init for Layer # -   10
    Alg Init for Layer # -   11
    Alg Init for Layer # -   12
    Alg Init for Layer # -   14
    Alg Init for Layer # -   15
    Alg Init for Layer # -   16
    Alg Init for Layer # -   17
    Alg Init for Layer # -   18
    Alg Init for Layer # -   19
    Alg Init for Layer # -   20
    Alg Init for Layer # -   21
    Alg Init for Layer # -   22
    Alg Init for Layer # -   13
    Alg Init for Layer # -   23
    Alg Init for Layer # -   24
    Alg Init for Layer # -   25
    Alg Init for Layer # -   26
    Alg Init for Layer # -   28
    Alg Init for Layer # -   29
    Alg Init for Layer # -   30
    Alg Init for Layer # -   31
    Alg Init for Layer # -   32
    Alg Init for Layer # -   33
    Alg Init for Layer # -   34
    Alg Init for Layer # -   35
    Alg Init for Layer # -   36
    Alg Init for Layer # -   27
    Alg Init for Layer # -   37
    Alg Init for Layer # -   38
    Alg Init for Layer # -   39
    Alg Init for Layer # -   40
    Alg Init for Layer # -   41
    Alg Init for Layer # -   42
    Alg Init for Layer # -   43
    Alg Init for Layer # -   44
    Alg Init for Layer # -   45
    Alg Init for Layer # -   46
    Alg Init for Layer # -   47
    Alg Init for Layer # -   48
    Alg Init for Layer # -   49
    Alg Init for Layer # -   50
    Alg Init for Layer # -   52
    Alg Init for Layer # -   51
    Alg Init for Layer # -   53
    Alg Init for Layer # -   54
    Alg Init for Layer # -   55
    Alg Init for Layer # -   56
    Alg Init for Layer # -   57
    Alg Init for Layer # -   59
    Alg Init for Layer # -   60
    Alg Init for Layer # -   58
    Alg Init for Layer # -   61
    Alg Init for Layer # -   62
    Alg Init for Layer # -   63
    Alg Init for Layer # -   64
    Alg Init for Layer # -   65
    Alg Init for Layer # -   66
    Alg Init for Layer # -   68
    Alg Init for Layer # -   69
    Alg Init for Layer # -   67
    Alg Init for Layer # -   70
    Alg Init for Layer # -   71
    Alg Init for Layer # -   72
    Alg Init for Layer # -   73
    Alg Init for Layer # -   74
    Alg Init for Layer # -   75
    Alg Init for Layer # -   77
    Alg Init for Layer # -   78
    Alg Init for Layer # -   76
    Alg Init for Layer # -   79
    Alg Init for Layer # -   80
    Alg Init for Layer # -   81
    Alg Init for Layer # -   82
    Alg Init for Layer # -   83
    Alg Init for Layer # -   84
    Alg Init for Layer # -   86
    Alg Init for Layer # -   87
    Alg Init for Layer # -   85
    Alg Init for Layer # -   88
    Alg Init for Layer # -   89
    Alg Init for Layer # -   90
    Alg Init for Layer # -   92
    Alg Init for Layer # -   93
    Alg Init for Layer # -   95
    Alg Init for Layer # -   96
    Alg Init for Layer # -   94
    Alg Init for Layer # -   97
    Alg Init for Layer # -   98
    Alg Init for Layer # -   99
    Alg Init for Layer # -  101
    Alg Init for Layer # -  102
    Alg Init for Layer # -  104
    Alg Init for Layer # -  105
    Alg Init for Layer # -  103
    Alg Init for Layer # -  106
    Alg Init for Layer # -  107
    Alg Init for Layer # -  108
    Alg Init for Layer # -  110
    Alg Init for Layer # -  111
    Alg Init for Layer # -  113
    Alg Init for Layer # -  114
    Alg Init for Layer # -  112
    Alg Init for Layer # -  115
    Alg Init for Layer # -  116
    Alg Init for Layer # -  117
    Alg Init for Layer # -   91
    Alg Init for Layer # -  100
    Alg Init for Layer # -  109
    Alg Init for Layer # -  118
    PREEMPTION: Adding a new priority object for targetPriority = 0, handle = 0x55f2b467fb00
    PREEMPTION: Now total number of priority objects = 1 at priorityId = 0,    with new memRec of base = 0x55f2b4683a00 and size = 128
    PREEMPTION: Requesting context memory addr for handle 0x55f2b467fb00, return Addr = 0x55f2a9220158
     Freeing memory for user provided Net
    
     Instance created for  testvecs/config/infer/public/onnx/tidl_infer_faw_best_model.txt
    
    Processing Cnt :    0, InstCnt :    0 testvecs/config/tidl_models/onnx/det_model.bin!
    TIDL_RT: Set default TIDLRT tensor done
    TIDL_RT: Set default TIDLRT tensor done
    testvecs/input/1.bmp
         1990656,      1.898 0x55f2b4779d80
          202080,      0.193 0x55f2b495fe00
     ----------------------- TIDL Process with REF_ONLY FLOW ------------------------
    
    #    0 . ..TIDL_activate is called with handle : b467fb00 
    Core 0 Alg Process for Layer # -    1, layer type 1 
    Processing Layer # -    1
    End of Layer # -    1 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -    2, layer type 1 
    Processing Layer # -    2
    End of Layer # -    2 with outPtrs[0] = 0x7facad53a700
    Core 0 Alg Process for Layer # -    3, layer type 1 
    Processing Layer # -    3
    End of Layer # -    3 with outPtrs[0] = 0x7facad2f5900
    Core 0 Alg Process for Layer # -    4, layer type 1 
    Processing Layer # -    4
    End of Layer # -    4 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -    5, layer type 1 
    Processing Layer # -    5
    End of Layer # -    5 with outPtrs[0] = 0x7facad2f5900
    Core 0 Alg Process for Layer # -    6, layer type 1 
    Processing Layer # -    6
    End of Layer # -    6 with outPtrs[0] = 0x7facad398180
    Core 0 Alg Process for Layer # -    7, layer type 1 
    Processing Layer # -    7
    End of Layer # -    7 with outPtrs[0] = 0x7facad398180
    Core 0 Alg Process for Layer # -    8, layer type 5 
    Processing Layer # -    8
    End of Layer # -    8 with outPtrs[0] = 0x7facad2f5900
    Core 0 Alg Process for Layer # -    9, layer type 12 
    Processing Layer # -    9
    End of Layer # -    9 with outPtrs[0] = 0x7facad398180
    Core 0 Alg Process for Layer # -   10, layer type 1 
    Processing Layer # -   10
    End of Layer # -   10 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   11, layer type 1 
    Processing Layer # -   11
    End of Layer # -   11 with outPtrs[0] = 0x7facad398100
    Core 0 Alg Process for Layer # -   12, layer type 1 
    Processing Layer # -   12
    End of Layer # -   12 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   14, layer type 1 
    Processing Layer # -   14
    End of Layer # -   14 with outPtrs[0] = 0x7facad2a4100
    Core 0 Alg Process for Layer # -   15, layer type 1 
    Processing Layer # -   15
    End of Layer # -   15 with outPtrs[0] = 0x7facad2a4100
    Core 0 Alg Process for Layer # -   16, layer type 5 
    Processing Layer # -   16
    End of Layer # -   16 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   17, layer type 1 
    Processing Layer # -   17
    End of Layer # -   17 with outPtrs[0] = 0x7facad2a4100
    Core 0 Alg Process for Layer # -   18, layer type 1 
    Processing Layer # -   18
    End of Layer # -   18 with outPtrs[0] = 0x7facad2a4100
    Core 0 Alg Process for Layer # -   19, layer type 5 
    Processing Layer # -   19
    End of Layer # -   19 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   20, layer type 1 
    Processing Layer # -   20
    End of Layer # -   20 with outPtrs[0] = 0x7facad2a4100
    Core 0 Alg Process for Layer # -   21, layer type 1 
    Processing Layer # -   21
    End of Layer # -   21 with outPtrs[0] = 0x7facad2a4100
    Core 0 Alg Process for Layer # -   22, layer type 5 
    Processing Layer # -   22
    End of Layer # -   22 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   13, layer type 1 
    Processing Layer # -   13
    End of Layer # -   13 with outPtrs[0] = 0x7facad2a4100
    Core 0 Alg Process for Layer # -   23, layer type 12 
    Processing Layer # -   23
    End of Layer # -   23 with outPtrs[0] = 0x7facad2f7e00
    Core 0 Alg Process for Layer # -   24, layer type 1 
    Processing Layer # -   24
    End of Layer # -   24 with outPtrs[0] = 0x7facad265100
    Core 0 Alg Process for Layer # -   25, layer type 1 
    Processing Layer # -   25
    End of Layer # -   25 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   26, layer type 1 
    Processing Layer # -   26
    End of Layer # -   26 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -   28, layer type 1 
    Processing Layer # -   28
    End of Layer # -   28 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   29, layer type 1 
    Processing Layer # -   29
    End of Layer # -   29 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   30, layer type 5 
    Processing Layer # -   30
    End of Layer # -   30 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -   31, layer type 1 
    Processing Layer # -   31
    End of Layer # -   31 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   32, layer type 1 
    Processing Layer # -   32
    End of Layer # -   32 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   33, layer type 5 
    Processing Layer # -   33
    End of Layer # -   33 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -   34, layer type 1 
    Processing Layer # -   34
    End of Layer # -   34 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   35, layer type 1 
    Processing Layer # -   35
    End of Layer # -   35 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   36, layer type 5 
    Processing Layer # -   36
    End of Layer # -   36 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -   27, layer type 1 
    Processing Layer # -   27
    End of Layer # -   27 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   37, layer type 12 
    Processing Layer # -   37
    End of Layer # -   37 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   38, layer type 1 
    Processing Layer # -   38
    End of Layer # -   38 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   39, layer type 1 
    Processing Layer # -   39
    End of Layer # -   39 with outPtrs[0] = 0x7facad439800
    Core 0 Alg Process for Layer # -   40, layer type 1 
    Processing Layer # -   40
    End of Layer # -   40 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -   41, layer type 1 
    Processing Layer # -   41
    End of Layer # -   41 with outPtrs[0] = 0x7facad370280
    Core 0 Alg Process for Layer # -   42, layer type 1 
    Processing Layer # -   42
    End of Layer # -   42 with outPtrs[0] = 0x7facad385300
    Core 0 Alg Process for Layer # -   43, layer type 1 
    Processing Layer # -   43
    End of Layer # -   43 with outPtrs[0] = 0x7facad39a380
    Core 0 Alg Process for Layer # -   44, layer type 5 
    Processing Layer # -   44
    End of Layer # -   44 with outPtrs[0] = 0x7facad370280
    Core 0 Alg Process for Layer # -   45, layer type 12 
    Processing Layer # -   45
    End of Layer # -   45 with outPtrs[0] = 0x7facad385300
    Core 0 Alg Process for Layer # -   46, layer type 1 
    Processing Layer # -   46
    End of Layer # -   46 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -   47, layer type 1 
    Processing Layer # -   47
    End of Layer # -   47 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   48, layer type 1 
    Processing Layer # -   48
    End of Layer # -   48 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   49, layer type 2 
    Processing Layer # -   49
    End of Layer # -   49 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   50, layer type 2 
    Processing Layer # -   50
    End of Layer # -   50 with outPtrs[0] = 0x7facad391300
    Core 0 Alg Process for Layer # -   52, layer type 2 
    Processing Layer # -   52
    End of Layer # -   52 with outPtrs[0] = 0x7facad391300
    Core 0 Alg Process for Layer # -   51, layer type 2 
    Processing Layer # -   51
    End of Layer # -   51 with outPtrs[0] = 0x7facad39d380
    Core 0 Alg Process for Layer # -   53, layer type 2 
    Processing Layer # -   53
    End of Layer # -   53 with outPtrs[0] = 0x7facad39d380
    Core 0 Alg Process for Layer # -   54, layer type 2 
    Processing Layer # -   54
    End of Layer # -   54 with outPtrs[0] = 0x7facad39d380
    Core 0 Alg Process for Layer # -   55, layer type 12 
    Processing Layer # -   55
    End of Layer # -   55 with outPtrs[0] = 0x7facad3a9400
    Core 0 Alg Process for Layer # -   56, layer type 1 
    Processing Layer # -   56
    End of Layer # -   56 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -   57, layer type 1 
    Processing Layer # -   57
    End of Layer # -   57 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   59, layer type 1 
    Processing Layer # -   59
    End of Layer # -   59 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   60, layer type 1 
    Processing Layer # -   60
    End of Layer # -   60 with outPtrs[0] = 0x7facad431700
    Core 0 Alg Process for Layer # -   58, layer type 1 
    Processing Layer # -   58
    End of Layer # -   58 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   61, layer type 12 
    Processing Layer # -   61
    End of Layer # -   61 with outPtrs[0] = 0x7facad3852f7
    Core 0 Alg Process for Layer # -   62, layer type 1 
    Processing Layer # -   62
    End of Layer # -   62 with outPtrs[0] = 0x7facad39d377
    Core 0 Alg Process for Layer # -   63, layer type 1 
    Processing Layer # -   63
    End of Layer # -   63 with outPtrs[0] = 0x7facad2530f7
    Core 0 Alg Process for Layer # -   64, layer type 21 
    Processing Layer # -   64
    End of Layer # -   64 with outPtrs[0] = 0x7facad38536e
    Core 0 Alg Process for Layer # -   65, layer type 12 
    Processing Layer # -   65
    End of Layer # -   65 with outPtrs[0] = 0x7facad3af380
    Core 0 Alg Process for Layer # -   66, layer type 1 
    Processing Layer # -   66
    End of Layer # -   66 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -   68, layer type 1 
    Processing Layer # -   68
    End of Layer # -   68 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -   69, layer type 1 
    Processing Layer # -   69
    End of Layer # -   69 with outPtrs[0] = 0x7facad370280
    Core 0 Alg Process for Layer # -   67, layer type 1 
    Processing Layer # -   67
    End of Layer # -   67 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -   70, layer type 12 
    Processing Layer # -   70
    End of Layer # -   70 with outPtrs[0] = 0x7facad38536e
    Core 0 Alg Process for Layer # -   71, layer type 1 
    Processing Layer # -   71
    End of Layer # -   71 with outPtrs[0] = 0x7facad35b26e
    Core 0 Alg Process for Layer # -   72, layer type 1 
    Processing Layer # -   72
    End of Layer # -   72 with outPtrs[0] = 0x7facad35b26e
    Core 0 Alg Process for Layer # -   73, layer type 21 
    Processing Layer # -   73
    End of Layer # -   73 with outPtrs[0] = 0x7facad37735c
    Core 0 Alg Process for Layer # -   74, layer type 12 
    Processing Layer # -   74
    End of Layer # -   74 with outPtrs[0] = 0x7facad3d3380
    Core 0 Alg Process for Layer # -   75, layer type 1 
    Processing Layer # -   75
    End of Layer # -   75 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   77, layer type 1 
    Processing Layer # -   77
    End of Layer # -   77 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   78, layer type 1 
    Processing Layer # -   78
    End of Layer # -   78 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   76, layer type 1 
    Processing Layer # -   76
    End of Layer # -   76 with outPtrs[0] = 0x7facad377280
    Core 0 Alg Process for Layer # -   79, layer type 12 
    Processing Layer # -   79
    End of Layer # -   79 with outPtrs[0] = 0x7facad3a135c
    Core 0 Alg Process for Layer # -   80, layer type 1 
    Processing Layer # -   80
    End of Layer # -   80 with outPtrs[0] = 0x7facad37785c
    Core 0 Alg Process for Layer # -   81, layer type 1 
    Processing Layer # -   81
    End of Layer # -   81 with outPtrs[0] = 0x7facad3071dc
    Core 0 Alg Process for Layer # -   82, layer type 21 
    Processing Layer # -   82
    End of Layer # -   82 with outPtrs[0] = 0x7facad377338
    Core 0 Alg Process for Layer # -   83, layer type 12 
    Processing Layer # -   83
    End of Layer # -   83 with outPtrs[0] = 0x7facad53a700
    Core 0 Alg Process for Layer # -   84, layer type 1 
    Processing Layer # -   84
    End of Layer # -   84 with outPtrs[0] = 0x7facad265100
    Core 0 Alg Process for Layer # -   86, layer type 1 
    Processing Layer # -   86
    End of Layer # -   86 with outPtrs[0] = 0x7facad265100
    Core 0 Alg Process for Layer # -   87, layer type 1 
    Processing Layer # -   87
    End of Layer # -   87 with outPtrs[0] = 0x7facad265100
    Core 0 Alg Process for Layer # -   85, layer type 1 
    Processing Layer # -   85
    End of Layer # -   85 with outPtrs[0] = 0x7facad377280
    Core 0 Alg Process for Layer # -   88, layer type 12 
    Processing Layer # -   88
    End of Layer # -   88 with outPtrs[0] = 0x7facad3c8300
    Core 0 Alg Process for Layer # -   89, layer type 1 
    Processing Layer # -   89
    End of Layer # -   89 with outPtrs[0] = 0x7facad265100
    Core 0 Alg Process for Layer # -   90, layer type 1 
    Processing Layer # -   90
    End of Layer # -   90 with outPtrs[0] = 0x7facad377280
    Core 0 Alg Process for Layer # -   92, layer type 12 
    Processing Layer # -   92
    End of Layer # -   92 with outPtrs[0] = 0x7facad3a1300
    Core 0 Alg Process for Layer # -   93, layer type 1 
    Processing Layer # -   93
    End of Layer # -   93 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   95, layer type 1 
    Processing Layer # -   95
    End of Layer # -   95 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   96, layer type 1 
    Processing Layer # -   96
    End of Layer # -   96 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   94, layer type 1 
    Processing Layer # -   94
    End of Layer # -   94 with outPtrs[0] = 0x7facad377280
    Core 0 Alg Process for Layer # -   97, layer type 12 
    Processing Layer # -   97
    End of Layer # -   97 with outPtrs[0] = 0x7facad3a1300
    Core 0 Alg Process for Layer # -   98, layer type 1 
    Processing Layer # -   98
    End of Layer # -   98 with outPtrs[0] = 0x7facad307180
    Core 0 Alg Process for Layer # -   99, layer type 1 
    Processing Layer # -   99
    End of Layer # -   99 with outPtrs[0] = 0x7facad40b680
    Core 0 Alg Process for Layer # -  101, layer type 12 
    Processing Layer # -  101
    End of Layer # -  101 with outPtrs[0] = 0x7facad377280
    Core 0 Alg Process for Layer # -  102, layer type 1 
    Processing Layer # -  102
    End of Layer # -  102 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -  104, layer type 1 
    Processing Layer # -  104
    End of Layer # -  104 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -  105, layer type 1 
    Processing Layer # -  105
    End of Layer # -  105 with outPtrs[0] = 0x7facad3af300
    Core 0 Alg Process for Layer # -  103, layer type 1 
    Processing Layer # -  103
    End of Layer # -  103 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -  106, layer type 12 
    Processing Layer # -  106
    End of Layer # -  106 with outPtrs[0] = 0x7facad3703c0
    Core 0 Alg Process for Layer # -  107, layer type 1 
    Processing Layer # -  107
    End of Layer # -  107 with outPtrs[0] = 0x7facad35b200
    Core 0 Alg Process for Layer # -  108, layer type 1 
    Processing Layer # -  108
    End of Layer # -  108 with outPtrs[0] = 0x7facad4cf880
    Core 0 Alg Process for Layer # -  110, layer type 12 
    Processing Layer # -  110
    End of Layer # -  110 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -  111, layer type 1 
    Processing Layer # -  111
    End of Layer # -  111 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -  113, layer type 1 
    Processing Layer # -  113
    End of Layer # -  113 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -  114, layer type 1 
    Processing Layer # -  114
    End of Layer # -  114 with outPtrs[0] = 0x7facad43d700
    Core 0 Alg Process for Layer # -  112, layer type 1 
    Processing Layer # -  112
    End of Layer # -  112 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -  115, layer type 12 
    Processing Layer # -  115
    End of Layer # -  115 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -  116, layer type 1 
    Processing Layer # -  116
    End of Layer # -  116 with outPtrs[0] = 0x7facad39d300
    Core 0 Alg Process for Layer # -  117, layer type 1 
    Processing Layer # -  117
    End of Layer # -  117 with outPtrs[0] = 0x7facad253080
    Core 0 Alg Process for Layer # -   91, layer type 1 
    Processing Layer # -   91
    End of Layer # -   91 with outPtrs[0] = 0x7facad385280
    Core 0 Alg Process for Layer # -  100, layer type 1 
    Processing Layer # -  100
    End of Layer # -  100 with outPtrs[0] = 0x7facad258200
    Core 0 Alg Process for Layer # -  109, layer type 1 
    Processing Layer # -  109
    End of Layer # -  109 with outPtrs[0] = 0x7facad29d580
    Core 0 Alg Process for Layer # -  118, layer type 19 
    Processing Layer # -  118
    End of Layer # -  118 with outPtrs[0] = 0x55f2b495fe00
    TIDL_process is completed with handle : b467fb00 
     T   21190.41 Skipping static gen-set function
     .... ..... ...testvecs/input/1.bmp
    testvecs/input/1.bmp
     .... .....TIDL_deactivate is called with handle : b467fb00 
    PREEMPTION: Removing priroty object with handle = 0x55f2b467fb00 and targetPriority = 0,      Number of obejcts left are = 0, removed object with base  = 0x55f2b4683a00 and size =128
    
    

    j784s4_log_error_faw_best_onnx_net_576.txt

    • first try is to run imported model on board with size 768x768.


    step1:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ mkdir -p testvecs/models/public/onnx
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ mkdir -p testvecs/input
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ mkdir -p testvecs/config/infer/public/onnx
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ mkdir -p testvecs/config/import/public/onnx
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ mkdir -p testvecs/config/tidl_models/onnx/

    step2:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp /opt/1Twork/repository/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test/testvecs/models/public/onnx/best.onnx testvecs/models/public/onnx/
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp /opt/1Twork/repository/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test/testvecs/models/public/onnx/best.prototxt testvecs/models/public/onnx/
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp /opt/1Twork/repository/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test/testvecs/config/import/public/onnx/tidl_import_faw_best_model.txt testvecs/config/import/public/onnx/
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp /opt/1Twork/repository/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test/testvecs/config/det_list_768.txt testvecs/config/
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp /opt/1Twork/repository/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test/testvecs/input/1.bmp testvecs/input/

    step3:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/utils/tidlModelImport$ ./out/tidl_model_import.out ../../test/testvecs/config/import/public/onnx/tidl_import_faw_best_model.txt

    step4:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp testvecs/config/tidl_models/onnx/tidl_import_faw_best_model.txt.qunat_stats_config.txt testvecs/config/infer/public/onnx/tidl_infer_faw_best_model.txt

    step5:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp /opt/1Twork/repository/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test/testvecs/config/config_list.txt testvecs/config/

    step6:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ ./PC_dsp_test_dl_algo.out --debugTraceLevel 2

    see log, j784s4_log_pass_faw_best_onnx_net_PC_Simu_768.txt.

    step7:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/sdk_builder$ make linux_fs_install_sd

    step8:
    root@j784s4-evm:/opt/vision_apps# cd /opt/tidl_test/
    root@j784s4-evm:/opt/tidl_test# export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/usr/lib
    root@j784s4-evm:/opt/tidl_test# ./TI_DEVICE_armv8_test_dl_algo_host_rt.out --debugTraceLevel 2

    see log, j784s4_log_error_faw_best_onnx_net_768.txt.

    • second try is to run new imported model on board with size 576x576.

    step9:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp testvecs/config/det_list_768.txt testvecs/config/det_list_576.txt
    =>testvecs/input/576.bmp

    step10:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp testvecs/config/import/public/onnx/tidl_import_faw_best_model.txt testvecs/config/import/public/onnx/tidl_import_faw_best_model_576.txt
    #preproc
    inWidth = 576
    inHeight = 576
    inData = ../../test/testvecs/config/det_list_576.txt

    step11:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/utils/tidlModelImport$ ./out/tidl_model_import.out ../../test/testvecs/config/import/public/onnx/tidl_import_faw_best_model_576.txt

    step12:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp testvecs/config/tidl_models/onnx/tidl_import_faw_best_model.txt.qunat_stats_config.txt testvecs/config/infer/public/onnx/tidl_infer_faw_best_model.txt


    step13:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ cp /opt/1Twork/repository/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test/testvecs/config/config_list.txt testvecs/config/


    step14:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/c7x-mma-tidl/ti_dl/test$ ./PC_dsp_test_dl_algo.out --debugTraceLevel 2

    see log, j784s4_log_pass_faw_best_onnx_net_PC_Simu_576.txt.

    step15:
    a0224068local@a0224068local-Latitude-5289:/opt/1Twork/repository/ti-processor-sdk-rtos-j784s4-evm-09_01_00_06/sdk_builder$ make linux_fs_install_sd

    step16:
    root@j784s4-evm:/opt/vision_apps# cd /opt/tidl_test/
    root@j784s4-evm:/opt/tidl_test# export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/usr/lib
    root@j784s4-evm:/opt/tidl_test# ./TI_DEVICE_armv8_test_dl_algo_host_rt.out --debugTraceLevel 2

    see log, j784s4_log_error_faw_best_onnx_net_576.txt.

    thanks a lot!

    yong

  • segmentation fault happens whatever the input size is 576x576 and 768x768.

    Here you have stated that seg fault occurring when size is 576x576 ! however from the threads description its stated that,

    By the way, when only input image size is changed to 576*576 and other configurations is same, all things goes well.

    Can you confirm the observations again as they seems like different ?

  • According to the 768-size log from Yong Zhang,could you have any ideas to solve?

  • dumpFolder_had1.3_ti86_mix16_576_q20_1212.zip 576-size could you try again by this?Maybe import wrong onnx and prototxt or config?

  • Hi,

    I couldnot comprehend anything from the last 2 replies.

    dumpFolder_had1.3_ti86_mix16_576_q20_1212.zip 576-size could you try again by this?Maybe import wrong onnx and prototxt or config?

    Can you be specific is this response is to me ? or your co-worker 

    My question still remains same,

    Here you have stated that seg fault occurring when size is 576x576 ! however from the threads description its stated that,

    By the way, when only input image size is changed to 576*576 and other configurations is same, all things goes well.

    Can you confirm the observations again as they seems like different ?

    Thank you.

  • Dear Patrik.

    sorry to make you confused. this is yong, from TI local FAE team.

    yesterday, I tried to reproduce the issue with the model in attached "TI_VH_problem.zip". at that time, segmentation fault happens whatever input size are 576x576 or 768x768.

    customer engineer, songjian, points out that there could be something wrong in my test. and he provided again the model and generated binaries in attached  "dumpFolder_had1.3_ti86_mix16_576_q20_1212.zip", with this, TIDL RT standalone test can pass with input size 576x576. this would be consistent to what they found before. 

    So I ask customer to upload their detail test steps, model and generated binaries, and corresponding logs for your check. they will update those in ticket later.

    thanks a lot!

    yong

  • This is all what i can provide but logs information, we don't have ti evm environment and also can not provide aos environment runing log, could you please help us to provide ti evm relative problem logs  just like what you early replied to the expert since 768 problem had been reproduced?import and infer for 768 or 576.rar

  • Dear Songjian.

    would you please check if there is TDA4VH EVM on your side? better to provide test materials/steps and error log on your own. this would make clear the situation as the conflict has happened between yours and mine before.

    thanks a lot!

    yong

  • If TDA4VH EVM means  run ./TI_DEVICE_xxx_test_dl_algo_host_rt.out --debugTraceLevel 2 on Jacinto7 SoC, we don't have it. But I think this bug maybe exist across versions like this kind of problem before.