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TMS320C6678: In the TMS320C6678, CSL based interrupt

Part Number: TMS320C6678

Hi TI Team,

We interfacing a 4x4 keypad with TMDSEVM6678LE, We want to do interrupt-based keypress scanning. That's why, We follow the CLS API, In this code We want to generate the interrupt while columns are being pressed (as per this C0, C1, C2, and C3). It's the correct code or setup for the interrupt generation on the GPIO(pind). And How to use Interrupt Vector IDs which are mentioned in <ti/csl/soc/c6678/src/cslr_device.h> and <ti/csl/src/intc/csl_intc.h>.

We share the code, Please review it and give us any suggestions. 

Warmest regards,

Krishn Singh Chauhan

CSL_IntcContext             context;
CSL_IntcGlobalEnableState   state;
CSL_IntcEventHandlerRecord  EventRecord[10];
CSL_IntcParam               vectId;
CSL_GpioHandle              hGpio;
CSL_Status                  intStat;
CSL_IntcObj                 intcObj20;
CSL_IntcHandle              hIntc20;
CSL_IntcDropStatus          drop;
CSL_IntcContext             Intcontext;
Uint32                      intrStat;

//for the Column 0, GPIO interrupt 15
void C0_init_interrupt_controllers(){

    CSL_IntcGlobalEnableState state;
    Intcontext.numEvtEntries = 10;
    Intcontext.eventhandlerRecord = EventRecord;
    CSL_intcInit(&Intcontext);
    /* Enable NMIs  */
    CSL_intcGlobalNmiEnable();
    /* Enable Global Interrupts  */
    CSL_intcGlobalEnable(&state);
    /* Initialize the chip level CIC CSL handle. */
    // Opening a handle for the Event 20 at vector id 4
    vectId = CSL_INTC_VECTID_4;
    hIntc20 = CSL_intcOpen (&intcObj20, CSL_GEM_GPINT15, &vectId , NULL);


    if (hIntc20 == 0) {

        printf("Cannot initialize CPINTC\n");
        return;
    }
}

//for the Column 1, GPIO interrupt 14
void C1_init_interrupt_controllers(){

    CSL_IntcGlobalEnableState state;
    Intcontext.numEvtEntries = 10;
    Intcontext.eventhandlerRecord = EventRecord;
    CSL_intcInit(&Intcontext);
    /* Enable NMIs  */
    CSL_intcGlobalNmiEnable();
    /* Enable Global Interrupts  */
    CSL_intcGlobalEnable(&state);
    /* Initialize the chip level CIC CSL handle. */
    // Opening a handle for the Event 20 at vector id 4
    vectId = CSL_INTC_VECTID_4;
    hIntc20 = CSL_intcOpen (&intcObj20, CSL_GEM_GPINT14, &vectId , NULL);


    if (hIntc20 == 0) {

        printf("Cannot initialize CPINTC\n");
        return;
    }
}


//for the Column 2, GPIO interrupt 11
void C2_init_interrupt_controllers(){

    CSL_IntcGlobalEnableState state;
    Intcontext.numEvtEntries = 10;
    Intcontext.eventhandlerRecord = EventRecord;
    CSL_intcInit(&Intcontext);
    /* Enable NMIs  */
    CSL_intcGlobalNmiEnable();
    /* Enable Global Interrupts  */
    CSL_intcGlobalEnable(&state);
    /* Initialize the chip level CIC CSL handle. */
    // Opening a handle for the Event 20 at vector id 4
    vectId = CSL_INTC_VECTID_4;
    hIntc20 = CSL_intcOpen (&intcObj20, CSL_GEM_GPINT11, &vectId , NULL);


    if (hIntc20 == 0) {

        printf("Cannot initialize CPINTC\n");
        return;
    }
}


//for the Column 3, GPIO interrupt 13
void C3_init_interrupt_controllers(){

    CSL_IntcGlobalEnableState state;
    Intcontext.numEvtEntries = 10;
    Intcontext.eventhandlerRecord = EventRecord;
    CSL_intcInit(&Intcontext);
    /* Enable NMIs  */
    CSL_intcGlobalNmiEnable();
    /* Enable Global Interrupts  */
    CSL_intcGlobalEnable(&state);
    /* Initialize the chip level CIC CSL handle. */
    // Opening a handle for the Event 20 at vector id 4
    vectId = CSL_INTC_VECTID_4;
    hIntc20 = CSL_intcOpen (&intcObj20, CSL_GEM_GPINT13, &vectId , NULL);


    if (hIntc20 == 0) {

        printf("Cannot initialize CPINTC\n");
        return;
    }
}

  • Krishn Singh Chauhan,

    ok, sure. Let me look at it and get back.

    Regards

    Shankari G

  • Hi Shankari G, 

    OK, sure We'll be waiting for your response.

    Warmest regards,

    Krishn Singh Chauhan

  • Krishn Singh Chauhan,

    Until I look into your code, look at the following...

    --

    A simple sample code to read the GPIO interrupt is given in hdmi_test.c

    located at "\ti\pdk_c665x_2_0_16\packages\ti\board\diag\hdmi\src".

    --

    static uint32_t check_audiodc_detect(void)
    {
        uint32_t gpioState = 0;

    pinMuxSetMode(21, PADCONFIG_MUX_MODE_QUATERNARY);
    gpioSetDirection(0, 21, GPIO_IN);
    gpioState = gpioReadInput(0, 21);

    return(gpioState);
    }

    --

    In evmc66x_gpio.c:- located at "\ti\pdk_c665x_2_0_16\packages\ti\board\src\flash\platform_flash"

    /**
    * \brief Mux mode selection for pad config registers
    */
    typedef enum _PadCfgMuxMode
    {
        PADCONFIG_MUX_MODE_PRIMARY = 0, /**< Primary pin mux mode */
        PADCONFIG_MUX_MODE_SECONDARY, /**< Secondary pin mux mode */
        PADCONFIG_MUX_MODE_TERTIARY, /**< Tertiary pin mux mode */
        PADCONFIG_MUX_MODE_QUATERNARY, /**< Quaternary pin mux mode */
        PADCONFIG_MUX_MODE_QUINARY, /**< Quinary pin mux mode */
        PADCONFIG_MUX_MODE_SENARY /**< Senary pin mux mode */

    } PadCfgMuxMode;

    /**
     * \brief  This function gets the specified GPIO's pin state
     *
     * The specified GPIO should be configured as input
     *
     * \param   gpioPortNumber [IN]    GPIO port number
     * \param   pinNum         [IN]    GPIO pin number
     *
     * \return
     * \n      uint32_t - Input state of GPIO if success
     * \n				- else GPIO status
     */
    uint32_t gpioReadInput(uint8_t gpioPortNumber, uint8_t pinNum)
    {
        uint8_t  inData = 0;
        uint32_t retVal;
    
        retVal = gpio_ctrl(gpioPortNumber, pinNum, GPIO_CTRL_READ_INPUT, &inData);
    	if(GPIO_RET_OK == retVal)
    	{
    		if( ( inData & GPIO_HIGH ) == GPIO_HIGH )
    		{
    			retVal = GPIO_HIGH;
    		}
    		else
    		{
    			retVal = GPIO_LOW;
    		}
    	}
    
    	return(retVal);
    
    } //gpioReadInput

    Regards

    Shankari G

  • Dear Shankari G, 

    Thanks for your support, We'll do the same per the given information.

    Warmest regards,

    Krishn Singh Chauhan

  • Dear Shankari G,

    Q(1)........

    I  looked at your sample, But we are confused about the DSP GPIO(pin) because this file has 143 GPIO pins in this file  C:\ti\pdk_c667x_2_0_16\packages\ti\board\src\flash\platform_flash\evmc66x_gpio.h.  And, this file  C:\ti\pdk_c667x_2_0_16\packages\ti\platform\evmc6678l\platform_lib\src\evmc66x_gpio.h mentioned only 16 GPIO pins.

    What is the difference between both libraries with the GPIO declaration? And both libraries are suitable for TMDSEVM320C6678LE (Along with the platform_flash's folders' file  ).

    Q(2)......
    What is the use of pad config registers?  
    Please look into this matter and give us a resolution on it.

    Warmest regards,

    Krishn Singh Chauhan

  • Krishn Singh Chauhan,,

    C:\ti\pdk_c667x_2_0_16\packages\ti\platform\evmc6678l\platform_lib\src\evmc66x_gpio.h  is the apt one for our C6678 EVM.

    THE processor SDK 6.3 is a generic software for the series/family of devices.....

    In general, SOCs like K2G, K2H and K2E ( keystone-2 devices ) will have both DSP cores and ARM cores in it.

    The DSP core of all those SOC will be C66x DSP.

    C:\ti\pdk_c667x_2_0_16\packages\ti\board\src\flash\platform_flash\evmc66x_gpio.h ---- > This is a generic one for Keystone 2 EVMS with C66x cores.

    C6657 and C6678 are Keystone-1 devices with just the ( one or more ) DSP cores.

    --

    And PINMUX is the important configuration of GPIO. 

    As the same pin is responsible for multi-functionality, PINMUxing has to be done to configure the pins appropriately to function for GPIO peripheral. 

    --

    Just for the code flow, I referenced you that code.

    --

    OK, Ignore all. Use the  following code-flow as a reference for GPIO interrupt for C6678

    Please note:  YOU HAVE TO MODIFY FOLLOWING CODE FOR C6678.

    GPIO interrupt source code location in the Processor SDK 6.3 : - C:\ti\pdk_c667x_2_0_16\packages\ti\csl\example\gpio\gpio_interrupt

    /*
     *  Copyright (C) 2013-2017 Texas Instruments Incorporated
     *
     *  Redistribution and use in source and binary forms, with or without
     *  modification, are permitted provided that the following conditions
     *  are met:
     *
     *    Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     *    Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the
     *    distribution.
     *
     *    Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     */
    
    /**
     *  \file   main.c
     *
     */
    
    /* ========================================================================== */
    /*                             Include Files                                  */
    /* ========================================================================== */
    #include <stdint.h>
    #include <string.h>
    #include <ti/csl/csl_gpio.h>
    #if defined (SOC_AM574x) || defined (SOC_AM572x) || defined (SOC_AM571x)
    #include <ti/board/board.h>
    #endif
    #include <ti/csl/example/utils/uart_console/inc/uartConfig.h>
    #include <ti/csl/arch/csl_arch.h>
    #include <ti/csl/soc.h>
    #include <ti/csl/hw_types.h>
    
    /* ========================================================================== */
    /*                                 Macros                                     */
    /* ========================================================================== */
    /* None */
    
    /* ========================================================================== */
    /*                            Global Variables                                */
    /* ========================================================================== */
    char     uartOutput[100];
    
    /*To use UARTConfigPuts(uartBaseAddr, function for prints*/
    /*To use UARTConfigPuts function for prints*/
    #if defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_DRA75x)
    uint32_t uartBaseAddr = SOC_UART1_BASE;
    #endif
    #if defined (SOC_TDA3XX) || defined (SOC_DRA78x)
    uint32_t uartBaseAddr = SOC_UART3_BASE;
    #endif
    
    #if defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_DRA75x)
    uint32_t gpio_base_address = SOC_GPIO1_BASE;
    uint32_t gpio_pin          = 14;
    uint32_t interrupt_num     = 29;
    uint32_t xbar_cfg_required = 0;
    #endif
    #if defined (SOC_TDA3XX) || defined (SOC_DRA78x)
    uint32_t gpio_base_address = SOC_GPIO4_BASE;
    uint32_t gpio_pin          = 10;
    uint32_t interrupt_num     = 51;
    #define IRQ_XBAR_CFG_REQUIRED 1
    #define IRQ_XBAR_CPU_ID       CSL_XBAR_IRQ_CPU_ID_IPU1
    #define IRQ_XBAR_INST_NO      CSL_XBAR_INST_IPU1_IRQ_51
    #define IRQ_XBAR_INDEX        CSL_XBAR_GPIO4_IRQ_1
    #endif
    
    /* ========================================================================== */
    /*                          Function Definitions                              */
    /* ========================================================================== */
    void padconfig_PrcmEnable()
    {
    #if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_DRA75x)
        /*Pad configurations */
        HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART1_RXD,0x00040000);
        HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_UART1_TXD,0x00040000);
        HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_DCAN1_TX,0x0006000E);
        /*Enable GPIO clock*/
        HW_WR_REG32(SOC_L4PER_CM_CORE_BASE+CM_L4PER_GPIO2_CLKCTRL,0x102);
        while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE+CM_L4PER_GPIO2_CLKCTRL) & (0x00030000U)) != 0x0)
            {
                ;
            }
        HW_WR_REG32(SOC_L4PER_CM_CORE_BASE+CM_L4PER_GPIO3_CLKCTRL,0x102);
        while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE+CM_L4PER_GPIO3_CLKCTRL) & (0x00030000U)) != 0x0)
            {
                ;
            }
        HW_WR_REG32(SOC_L4PER_CM_CORE_BASE+CM_L4PER_GPIO4_CLKCTRL,0x102);
        while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE+CM_L4PER_GPIO4_CLKCTRL) & (0x00030000U)) != 0x0)
            {
                ;
            }
        /* Set the UART Parameters */
        UARTConfigInit(uartBaseAddr, BAUD_RATE_115200, UART_WORD_LENGTH_8, UART_STOP_BIT_1, UART_NO_PARITY,
                       UART_16x_MODE);
    #endif
    #if defined (SOC_TDA3XX) || defined (SOC_DRA78x)
        HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_SCLK,0x00040001);
        HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_SPI1_CS0,0x00000001);
        HW_WR_REG32(SOC_CORE_PAD_IO_REGISTERS_BASE+CTRL_CORE_PAD_IO_DCAN1_RX,0x0006000E);
        /* Set the access to the GPMC registers - Enable GPMC Clock */
        HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_GPIO2_CLKCTRL, 0x102);
        while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE +
                        CM_L4PER_GPIO2_CLKCTRL) & (0x00030000U)) != 0x0)
           {
                ;
           }
       HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_GPIO3_CLKCTRL, 0x102);
       while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE +
                        CM_L4PER_GPIO2_CLKCTRL) & (0x00030000U)) != 0x0)
           {
                ;
           }
       HW_WR_REG32(SOC_L4PER_CM_CORE_BASE + CM_L4PER_GPIO4_CLKCTRL, 0x102);
       while ((HW_RD_REG32(SOC_L4PER_CM_CORE_BASE +
                        CM_L4PER_GPIO2_CLKCTRL) & (0x00030000U)) != 0x0)
           {
                ;
           }
        /* Set the UART Parameters */
        UARTConfigInit(uartBaseAddr, BAUD_RATE_115200, UART_WORD_LENGTH_8, UART_STOP_BIT_1, UART_NO_PARITY,
                       UART_16x_MODE);
    #endif
    }
    
    void gpioIsr(void *arg)
    {
        volatile uint32_t gpio_pin_value = 0;
    
        /*Disable interrupt*/
        GPIOPinIntDisable(gpio_base_address, GPIO_INT_LINE_1, gpio_pin);
    
        /*Read pin*/
        gpio_pin_value = GPIOPinRead(gpio_base_address, gpio_pin);
    
        UARTConfigPuts(uartBaseAddr, uartOutput, -1);
        UARTConfigPutHexNum(uartBaseAddr, (gpio_pin_value & (0x1U << gpio_pin)) >> gpio_pin);
    
        GPIOPinIntClear(gpio_base_address, GPIO_INT_LINE_1, gpio_pin);
    
        /*Enable interrupt interrupt*/
        GPIOPinIntEnable(gpio_base_address, GPIO_INT_LINE_1, gpio_pin);
    }
    
    void configurGpioInterrupt()
    {
    #if IRQ_XBAR_CFG_REQUIRED
        /* XBar configuration */
        CSL_xbarIrqConfigure(IRQ_XBAR_CPU_ID,IRQ_XBAR_INST_NO,IRQ_XBAR_INDEX);
    #endif
        Intc_Init();
        Intc_IntEnable(interrupt_num);
    
        Intc_IntRegister(interrupt_num, (IntrFuncPtr) gpioIsr, (void *) 0);
        Intc_IntPrioritySet(interrupt_num, 1, 0);
        Intc_SystemEnable(interrupt_num);
    }
    
    int main(void)
    {
        volatile uint32_t waitForGpioInput = 1;
        char testType = 0;
    
        padconfig_PrcmEnable();
    	
        UARTConfigPuts(uartBaseAddr, "\r\nGPIO Input interrupt App", -1);
        UARTConfigPuts(uartBaseAddr, "\r\nGenerate interrupt based on input value on GPIO pin", -1);
    #if defined (SOC_TDA2XX) || defined (SOC_TDA2PX) || defined (SOC_TDA2EX) || defined (SOC_DRA72x) || defined (SOC_DRA75x)
        UARTConfigPuts(uartBaseAddr, "\r\nUse GPIO1 pin 14 on JP2 connector - pin 1 on EVM.", -1);
    #endif
    #if defined (SOC_TDA3XX) || defined (SOC_DRA78x)
        UARTConfigPuts(uartBaseAddr, "\r\nUse GPIO4 pin 10 on J6108 connector - pin 2 on EVM", -1);
    #endif
        UARTConfigPuts(uartBaseAddr, "\r\nTo Drive the value on pin to LOW connect to ground", -1);
        UARTConfigPuts(uartBaseAddr, "\r\nDefault value on the pin is High", -1);
    
        /* User Interface*/
        UARTConfigPuts(uartBaseAddr, "\r\nEnter type of test", -1);
        UARTConfigPuts(uartBaseAddr, "\r\n1. GPIO_INT_TYPE_LEVEL_LOW", -1);
        UARTConfigPuts(uartBaseAddr, "\r\n2. GPIO_INT_TYPE_LEVEL_HIGH ", -1);
        UARTConfigPuts(uartBaseAddr, "\r\n3. GPIO_INT_TYPE_FALL_EDGE", -1);
        UARTConfigPuts(uartBaseAddr, "\r\n4. GPIO_INT_TYPE_RISE_EDGE ", -1);
        UARTConfigPuts(uartBaseAddr, "\r\nEnter value(1, 2, 3 or 4) : ", -1);
        UARTConfigGets(uartBaseAddr, &testType, 1);
    
        /*Configure interrupt controller*/
        configurGpioInterrupt();
    
        /*Reset GPIO*/
        GPIOModuleReset(gpio_base_address);
    
        /*Enable GPIO*/
        GPIOModuleEnable(gpio_base_address);
    
        /*Configure and enable debouncing feature*/
        GPIODebounceTimeConfig(gpio_base_address, 0xFF);
    
        GPIODebounceFuncControl(gpio_base_address, gpio_pin,
                                GPIO_DEBOUNCE_FUNC_ENABLE);
    
        if ('1' == testType)
        {
            GPIOIntTypeSet(gpio_base_address, gpio_pin,
                           GPIO_INT_TYPE_LEVEL_LOW);
            strcpy(uartOutput, "\r\nGPIO: Low  Level detected. Pin value = ");
        }
        else if ('2' == testType)
        {
            GPIOIntTypeSet(gpio_base_address, gpio_pin,
                           GPIO_INT_TYPE_LEVEL_HIGH);
            strcpy(uartOutput, "\r\nGPIO: Default High Level detected. Pin value = ");
        }
        else if ('3' == testType)
        {
            GPIOIntTypeSet(gpio_base_address, gpio_pin,
                           GPIO_INT_TYPE_FALL_EDGE);
            strcpy(uartOutput, "\r\nGPIO: Falling edge detected. Pin value = ");
        }
        else
        {
            GPIOIntTypeSet(gpio_base_address, gpio_pin,
                           GPIO_INT_TYPE_RISE_EDGE);
            strcpy(uartOutput, "\r\nGPIO: Rising edge detected. Pin value = ");
        }
    
        /* Set pin direction as input*/
        GPIODirModeSet(gpio_base_address, gpio_pin, GPIO_DIR_INPUT);
    
        /*Clear interrupt*/
        GPIOPinIntDisable(gpio_base_address, GPIO_INT_LINE_1, gpio_pin);
        GPIOPinIntClear(gpio_base_address, GPIO_INT_LINE_1, gpio_pin);
    
        /*Enable interrupt*/
        GPIOPinIntEnable(gpio_base_address, GPIO_INT_LINE_1, gpio_pin);
    
        while (waitForGpioInput)
        {
            /*Keep while busy*/
            waitForGpioInput++;
            waitForGpioInput--;
        }
        return 0;
    }

    Regards

    Shankari G

  • Hi Shankari G,

    FYI,

    We observed various overwritten and syntex error due to same syntex typedef issues faced, if We use both of file's libraries in same project libraries  (1)__C:\ti\pdk_c667x_2_0_16\packages\ti\board\src\flash\platform_flash\evmc66x_gpio.h.  And  (2)__C:\ti\pdk_c667x_2_0_16\packages\ti\platform\evmc6678l\platform_lib\src\evmc66x_gpio.h 

    Maybe errors due to similarity of syntex. We are not recommended this file's libraries  (1)__C:\ti\pdk_c667x_2_0_16\packages\ti\board\src\flash\platform_flash\evmc66x_gpio.h if you are using this  (2)__C:\ti\pdk_c667x_2_0_16\packages\ti\platform\evmc6678l\platform_lib\src\evmc66x_gpio.h for your applicarion.

    That's why We ignored \ti\board\src\flash\platform_flash\evmc66x_gpio.h,  because of we are using this file's libraries  \ti\platform\evmc6678l\platform_lib\src\evmc66x_gpio.h

    Thanks for your support kindly close this thread.

    Warmest regards, 

    Krishn Singh Chauhan