Is a external calibration resistor required for DDR on DRA76xP or is this managed internally if so how?
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Is a external calibration resistor required for DDR on DRA76xP or is this managed internally if so how?
Hi,
Section 7.6.3 of the datasheet provides layout and routing guidelines for the DDR3 interface. Specifically, schematic connections are shown in section 7.6.3.4. Can you please review this section and see if it answers your question?
https://www.ti.com/lit/gpn/dra76p
Additionally, you may find the schematic of the reference design useful: https://www.ti.com/lit/pdf/sprr314
Regards,
Kevin