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SK-AM64: booting linux on each core

prasanth S
Prodigy 75 points

Part Number: SK-AM64

Hi ,

              I'm new to linux trying to experiment i have am64x-sk which have dual core cortex-A53 by default processor sdk linux using Two cores ,So is it possible to run two linux OS each core with each different linux at the same time ?Please help to figure out

Thanks

S Prasanth

  • 0
    TI__Guru* 97860 points

    Hello Prasanth,

    What are you trying to accomplish with two different Linux instances?

    Keep in mind that you can also isolate the cores so that there is only one Linux instance running, but each core is dedicated to processing specific tasks. But this will also limit the computing power that can used on each task.

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    Prodigy 75 points

    Hi ,

                             I'm trying to learn deep dive in linux kernels in am64x .If we run 2 linux instance latency increase  and computing power will be limited So to over come this can we use type 1 hypervisor for am64x?

  • 0 in reply to prasanth S
    TI__Guru**** 164051 points

    Hi Prasanth,

    Can you please explain your use case and why you would need to run a Linux on each A53 or use type 1 hypervisor?

  • 0 in reply to Bin Liu
    Prodigy 75 points

    Hi ,

                                     We are developing an time sensitive networking application(TSN) with low latency here linux OS communicates with R5f cores through an IPC .On am64x-sk have 2 port Ethernet i want to dedicate  the these ethernet ports on each kernel so that one linux kernel will communicates with rtos and other kernel configured as backup or  security  purpose. Not sure how can i achieve this  looking for some suggestions.

    Thanks,

    S Prasanth

  • 0 in reply to prasanth S
    TI__Mastermind 26890 points

    We don't have an example hypervisor support on AM64x, but we do support running docker containers, if you want to try to run something in a vitualized environment. The A53s run one Linux SMP instance, by default sharing the two cores and from HW perspective also sharing the coherent L2 cache. Running two full operating systems is a quite heavy tool, and architecting this so one is backup will be complex. I would recommend starting with one Linux and perhaps if normal SMP is not sufficient using core isolation, affinity, cpu sets, type tools to partition something to one core. For security I would recommend relying on Linux and OP-TEE.

    Also note multiple operating systems and virtualization will have severe adverse effects on worst case latency.

  • 0
    TI__Guru* 97860 points

    Hello Prasanth,

    This discussion of what kind of "real time" performance you can expect from each of the cores on the AM64x might be helpful for you in your system design:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1085663/faq-sitara-multicore-system-design-how-to-ensure-computations-occur-within-a-set-cycle-time

    Regards,

    Nick

  • 0 in reply to Pekka Varis
    Prodigy 75 points

    Hi , ,

           I'm attaching my use case please view it  provide some suggestions  to solve this problem statement. Do we have any SDK to support this development or any other reference  please provide.

    Thanks,

    Prasanth S

  • 0 in reply to prasanth S
    TI__Guru 69002 points

    Hi Prasanth,

    we don't have anything ready-to-go for what you are asking. In addition to the comments/pointers Pekka provided earlier, you could perhaps do your own port of the Jailhouse Hypervisor to AM64. We don't offer this as part of the AM64x SDK but do have this for other somewhat similar SoCs like AM62x, see here: https://software-dl.ti.com/processor-sdk-linux/esd/AM62X/09_01_00_08/exports/docs/linux/Foundational_Components/Hypervisor/Jailhouse.html?highlight=jailhouse So the approach could be as follows:

    1. Use an AM62x device to prototype your system with a Jailhouse-based solution, this is available today

    2. Then later, if (1) can be made work in a satisfactory manner, go ahead and port Jailhouse youself from AM62x to AM64x. While this is not something we support the task itself should not be overly difficult I think given that you would just need to model after an existing platform (AM62x). All the core support/infrastructure should already be there.

    Regards, Andreas

  • 0 in reply to Andreas Dannenberg
    TI__Guru 69002 points

    Hi Prasanth,

    also one of my colleagues has had another idea / alternative approach that I wanted to share here for completeness sake:

    If the requirement is to control 2 independent Ethernet ports you could use regular SMP Linux and have the CPSW network task assigned to the Cortex-A cores, and use then use ICSSG_PRU based Ethernet controlled from one of the MCU Cortex-R5F cores. While this would only give you one instance of Linux, it should allow for more isolation between the two sides.

    But from one of your earlier posts on this thread it looks like you already planning on using Coretex-R5F core(s) for other activities, so that may not be an option.

    Lastly, you could also consider having two single-core AM64x variants side-by-side?

    Regards, Andreas

  • 0 in reply to Andreas Dannenberg
    Prodigy 75 points

    Hi ,

                   Thanks for suggestions appreciate it .i'll try both the approaches you have mentioned .Just curious to know When we run 2 linux instances simultaneously one things is it leads to increase the latency and sharing HW resources  gets complicated correct my if i'm wrong . Also using AM64x single core devices  side by side can we establish communication between these devices? 

  • +1 in reply to prasanth S
    TI__Guru 69002 points
    prasanth S said:
    When we run 2 linux instances simultaneously one things is it leads to increase the latenc

    Yes, one of the biggest items probably being the shared L2 cache.

    prasanth S said:
    sharing HW resources  gets complicated correct my if i'm wrong

    The way the Jailhouse hypervisor works you'd be statically allocate certain peripherals to specific cores. If there's one peripheral you would like to "share" this is when things would get a bit more complicated, as it would need to get assigned to one of the cores. You could still use it from another core by using some kind of application-level communication channel and manage that way.

    prasanth S said:
    Also using AM64x single core devices  side by side can we establish communication between these devices? 

    You could use any of the peripheral interfaces for this. If high speed is a concern you could actually use PCIe to link the two together (operating one AM64x as  PCIe RC, and one as an EP).

    Regards, Andreas