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[FAQ] How do I enable MAC Port based broadcast/multicast rate limiting?

How to I enable MAC Port based broadcast/multicast rate limiting? and configuration?

  • CPSW supports Port based Broadcast/Multicast rate liming uing ALE Port specific control register and ALE control register (for limit of Tx or Rx packets).

    Note:
    If rate limiting is enabled for Tx, then it will be applicable for all Ports, means if Tx is enabled then in one Port you can’t limit Rx traffic you can only limit Tx traffic.

    Sample code snip for ENET_IOCTL based rate limiting configuration.

    Enet_Handle hEnet = Enet_getHandle(gEthAppObj.enetType, 0U /* instId */);
    // Receiving port
    inArgs.rateLimitAtTxPort = FALSE;
    inArgs.numPorts = 1;
    
    inArgs.portPrms[0].portNum = CPSW_ALE_HOST_PORT_NUM;
    inArgs.portPrms[0].bcastRateLimitForPortEn = TRUE; //Broadcast Rate Limiting
    inArgs.portPrms[0].mcastRateLimitForPortEn = TRUE; //Multicast Rate Limiting.
    inArgs.portPrms[0].bcastLimitNumPktsPerSec = 10000;
    inArgs.portPrms[0].mcastLimitNumPktsPerSec = 10000;
    
    ENET_IOCTL_SET_IN_ARGS(&prms, &inArgs);
    status = Enet_ioctl(hEnet, gEthAppObj.coreId, CPSW_ALE_IOCTL_SET_BCAST_MCAST_LIMIT, &prms);
    if (status != ENET_SOK)
    {
        appLogPrintf("%s failed CPSW_ALE_IOCTL_SET_BCAST_MCAST_LIMIT ioctl failed: %d\n\n", __func__, status);
    }
    else
    {
        appLogPrintf("CPSW_ALE_IOCTL_SET_BCAST_MCAST_LIMIT ioctl successful\n\n");
    }
    

    The behavior of rate liming will be based on the Loader counter & Presale counter.

    Please refer to TRM from SOC page for more details about the registers like Iy_REG_Py_BCAST_LIMIT and Iy_REG_Py_MCAST_LIMIT .

    If you look at the register Description in TRM, above register value will be loaded for every Pre-scale pulse on to the rate limiter i.e. within the Pre-scale period you can transmit/receive of the packets of count mentioned in above register. So, per second we can transmit/receive maximum of "counter_value * (CPPI frequency / Pre-scale)" as this register value loaded into counter for every Pre-scale period.

    By default, Pre-scale counter is set to 250000, and setting of above register dependent on CPPI Port frequency (350MHz) and Pre-scale as described in below.

    Max packet count limit will be:
    255 * (350000000/250000) = 357000 packets.

    Min Packet count limit will be:
    1 * (350000000/250000) = 1400 packets.

    If we adjust Pre-scale Counter (20bit) we can limit even lower packets per second.

    Pre-scale Max: 1048575
    CPP clock is: 350000000
    Min packets: 1* (350000000/1048575) = 333 packets.

    When we configure 100 then value of above limiter register will be (100/1400) = 0 (roundoff integer) : So, Rate Limiting will not be applied here as limit counter value is 0.
    when we configure 10000 then the value of above limiter will be (10000/1400) = 7 (roundoff integer) so max 7 * 1400 packets per second  = 9800 packets per second.

    Best Regards,
    Sudheer