PROCESSOR-SDK-AM64X: Booting up multiple R cores right after the 1st R core is booted up

Hi Zaki,

The SBLs in the MCU+ SDK already supports booting all the R5F cores if the corresponding core's RPRC image is present in the appimage. Please refer to the IPC_NOTIFY_ECHO system example which creates one appimage consisting of different core's RPRC images.

https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/08_05_00_24/exports/docs/api_guide_am64x/EXAMPLES_DRIVERS_IPC_NOTIFY_ECHO.html

At run time, the SBL parses the appimage and load/run the different core's executables.

There is one E2E as well more or less related to your query

SK-AM64: SKAM64 -A (multiple core loading) - Processors forum - Processors - TI E2E support forums

Regards,

Prashant

Hello Prashant,

Thanks for the reply. I will try out this example (IPC_NOTIFY_ECHO) on the EVM board soon. By the way, I was going through the 'makefile' in this project and saw that it created multicore image only using r5fss0-0 RPRC file (not able to see other cores included), or am I missing something here? Please suggest.

Hello Zaki,

I think you are looking at the individual core example. There is a system level example available that makes use of these individual core examples to generate the final appimage.

Regards,

Prashant

I am bit confused here. I can see that we can combine multi core app to single image using the multiCoreImageGen script or specify different address location under sbl.cfg file:

# Here, we flash each application to different sections or partitions within the flash, so that each can be updated indepedantly
--file=../../examples/drivers/ipc/ipc_notify_echo/am64x-evm/r5fss0-0_freertos/ti-arm-clang/ipc_notify_echo.release.appimage.hs_fs --operation=flash --flash-offset=0x080000
--file=../../examples/drivers/ipc/ipc_notify_echo/am64x-evm/r5fss0-1_nortos/ti-arm-clang/ipc_notify_echo.release.appimage.hs_fs --operation=flash --flash-offset=0x100000
--file=../../examples/drivers/ipc/ipc_notify_echo/am64x-evm/r5fss1-0_nortos/ti-arm-clang/ipc_notify_echo.release.appimage.hs_fs --operation=flash --flash-offset=0x180000
--file=../../examples/drivers/ipc/ipc_notify_echo/am64x-evm/r5fss1-1_nortos/ti-arm-clang/ipc_notify_echo.release.appimage.hs_fs --operation=flash --flash-offset=0x200000
--file=../../examples/drivers/ipc/ipc_notify_echo/am64x-evm/m4fss0-0_nortos/ti-arm-clang/ipc_notify_echo.release.appimage.hs_fs --operation=flash --flash-offset=0x280000
--file=../../examples/drivers/ipc/ipc_notify_echo/am64x-evm/a53ss0-0_nortos/gcc-aarch64/ipc_notify_echo.release.appimage.hs_fs --operation=flash --flash-offset=0x300000

Are there 2 different methods? if we combine the images (app) into one, how the SBL knows the memory section of different cores? please suggest.

And how to know if the Cores are booted up already ? Can we only boot up selected cores?

Zaki Ryne said:

Are there 2 different methods? if we combine the images (app) into one, how the SBL knows the memory section of different cores? please suggest.

Yes. There are two different SBLs: SBL_OSPI and SBL_OSPI_MULTI_PARTITION.

The former expects a single appimage, which may have one or more different cores rprc images, flashed at a certain offset while the latter expects multiple appimages, with each appimage containing only one core rprc image, flashed at different offsets.

You can use any method to boot multiple cores.

Zaki Ryne said:

And how to know if the Cores are booted up already ?

That's up to you. You can have the UART logs enabled in the images you are booting so if the UART logs are coming you know they are booted.

Zaki Ryne said:

Can we only boot up selected cores?

Yes. In case of SBL_OSPI, you need to only included the selected cores rprc images. In case of SBL_OSPI_MULTI_PARTITION, you only need to flash the selected cores appimages.

Thanks Prashant.

just another query. I am trying to bootup R0_0 and R_1_0 cores. They both will have the same App. Now to generate the specific .appimage do I use makefile_ccs_bootimage_gen file to change the core here (bold):

BOOTIMAGE_CORE_ID_a53ss0-0 = 0
BOOTIMAGE_CORE_ID_r5fss0-0 = 4
BOOTIMAGE_CORE_ID_r5fss0-1 = 5
BOOTIMAGE_CORE_ID_r5fss1-0 = 6
BOOTIMAGE_CORE_ID_r5fss1-1 = 7
BOOTIMAGE_CORE_ID_m4fss0-0 = 14
SBL_RUN_ADDRESS=0x70000000
SBL_DEV_ID=55

MULTI_CORE_IMAGE_GEN = $(CCS_NODE) $(MCU_PLUS_SDK_PATH)/tools/boot/multicoreImageGen/multicoreImageGen.js
OUTRPRC_CMD = $(CCS_NODE) $(MCU_PLUS_SDK_PATH)/tools/boot/out2rprc/elf2rprc.js

ifeq ($(OS),Windows_NT)
XIPGEN_CMD=$(MCU_PLUS_SDK_PATH)/tools/boot/xipGen/xipGen.exe
else
XIPGEN_CMD=$(MCU_PLUS_SDK_PATH)/tools/boot/xipGen/xipGen.out
endif

MULTI_CORE_IMAGE_PARAMS = \
$(BOOTIMAGE_RPRC_NAME)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \

MULTI_CORE_IMAGE_PARAMS_XIP = \
$(BOOTIMAGE_RPRC_NAME_XIP)@$(BOOTIMAGE_CORE_ID_r5fss0-0) \

then build the app and combine them with the multoCoreImageGen tool ? I need to make sure my process is ok...

So does it confirm that all the R cores are booted up and running now?