Hi,
We are performing SI analysis for a design which is having processor "AM4376BZDND30S" which supports DDR3L operating at 1.35V. Our requirement is to perform the timing analysis for DDR3L. We would like to get the timing parameters like, (tACCSkew) Output delay skew from CK falling to Addr/Cmd/Ctl, (tCKDQS) Output delay skew from CK rising to DQS rising, (tDQSDQQ) Output delay skew from DQS to DQ and tDS,tDH which is not available in the datasheet.
Please guide where will I able to get the parameters.
