AM625: Does the Multichannel Serial Peripheral Interface (MCSPI) of AM6254 support 2bit SPI mode?

Part Number: AM625

Hi Expert,

Does the Multichannel Serial Peripheral Interface (MCSPI) of AM6254 support 2bit SPI mode?

Is there a document description how to set it up for software?

Thanks

Daniel

  • Hi Daniel,

    Thank you for reaching out on the TI E2E Support Forum.

    I have few questions.

    Does the Multichannel Serial Peripheral Interface (MCSPI) of AM6254 support 2bit SPI mode?

    Is this in context of MCU PLUS SDK? 

    Are you working on the latest SDK release?

    Can you please explain a little more about the 2bit SPI Mode? And how is it different from the conventional SDK offering? Is this about one of the four modes of SPI which has a variation in CPOL and CPHA values?

    Looking forward to your response.

    Regards,

    Vaibhav

  • Hi Vaibhav

               Maybe  I should  ask if the AM6254 support  “dual SPI mode “?

               The explanation regarding dual SPI mode as follows .

               

    Thanks

    Daniel

  • Hi Daniel,

    Thanks for your clarification.

    Allow me sometime to go through the same.

    Regards,

    Vaibhav

  • Hi Vaibhav

    ere is the SDK version we use.

    ti-processor-sdk-linux-am62xx-evm-09.00.00.03

     

    Let me explain our requirement more detail.

     

    We hope to set the working mode of MCSPI SPI2 to 2 bit data SPI Master Mode, that is, D0 and D1 of SPI are used as Output (MOSI) working mode to output different data.

    I read the TRM, and we see the AM62x can support setting both D0 and D1 as DATA output, but I am not sure if setting both D0 and D1 as DATA output can output different Data Bits data at the same time.

    We want to output different data at the same time when setting both D0 and D1 as outputs. Is this feasible?

     

    As the block diagram, the Shift Register is connected to both D0 and D1. But we are not sure the number of  Shift Register. If D0 and D1 can get data from different data path(Shift Register).

    I think that can meet our requirement, and we want to know how to setup the software to let D0 and D1 use different data during transmission.

     

    A simple word is, we want to double the transmission bandwidth of MCSPI SPI2.

    Thanks

    Daniel

  • Hi Daniel,

    Thanks for mentioning the SDK version, I see you are using Linux SDK. I am going to assign this to the correct expert.

    But before I do that, I would like you to know that there was a similar question asked here, but it was based of MCU PLUS SDK: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1268780/phytc-3p-kit-am64-mcspi-communication-tx-only-mode-using-both-data-lines-for-tx-to-send-different-data

    Here the customer had a requirement of sending different data over two lines using one synchronized clock.

    I know you want to send it from one MCSPI Controller itself.

    I would let the new expert comment on the same.

    Regards,

    Vaibhav

  • Daniel,

    I need to work through a critical assignment before I can spend time to look into this here closer, so it won't be until next week before I can get back. Thanks for your patience.

    Regards, Andreas