Other Parts Discussed in Thread: AM3357
In our implementation we leverage a single port (Port 0) of the RMII interface and MDIO of the AM3357 to communicate via EtherCAT through the PRU-ICSS and a DP83826 PHY. To do so, we bootstrap the DP83826 with LED1 output on pin 31 as per the pin strap recommendations in How and Why to Use the DP83826 for EtherCAT® Applications (Rev. C). We also use some of the pinmux-able PR1_MII1_* pins for other purposes, mainly configured as GPIOs.
When implementing the polarity of link0 and link1 through the 'TIESC_LINK0_POL' and 'TIESC_LINK1_POL' macros (see Ethernet PHY Configuration Using MDIO for Industrial Applications) in the PRU EtherCAT Slave application I'm noticing that I can only select 'TIESC_LINK_POL_ACTIVE_HIGH' for link1 even though the pinmux of pin GPMC_BEn1 is muxxed to GPIO1_28. If I use 'TIESC_LINK_POL_ACTIVE_LOW' the slave is no longer detected via the Acontis EC-Engineer application. Would you be able to help me understand why this is the case? I've tried disabling enhanced link detection for port 1 via the 'MDIO_enableLinkInterrupt()' routine which sets bit 7 (LINKSEL) of the MDIOUSERPHYSEL1 register (offset 0x8C) to 0 to fall back to the MDIO state machine as recommended the previous link. This results in the same behavior: an undetectable slave.
From a general sense, what's the appropriate way to configure the PRU-ICSS EtherCAT slave firmware so that I can operate with enhanced link detection only on MII port 0?
Thanks in advance!