Tool/software:
Hello TI,
We have a TDA4AH GP SoC on a custom board and we are currently trying to boot from a NOR Flash through the OSPI (In simple-SPI) interface. The custom .tiimage loaded in Flash is a combined TI-compatible image (i.e. a bootable blob+TIFS+data).
Bootmodes are set like so : SPI MCU Only PLL at 25MHz (MCU_BOOT[7:0] : 0111 0011, BOOT: xxxx xxx1).
The problem encountered is as follows:
- [On custom board] The RBL loads our code and executes it in MCU_OCRAM and seems to launch TIFS (When using a debugger connected to the M4, we are located @PC:0x470EE, but we never get the LSB written in MCU_SA3_SS0_IPCSS_SEC_PROXY_CFG_RT_BASE++0x5000 (Thread 5 for M4_SMS_ROM).
- [On J784s4 EVM] This same .tiimage works ONLY if MCU_Only pin = 0 and TIFS loads fine, however it doesn't work when MCU_ONLY is Up (with this binary or any other for that matter).
All this leads to the following questions :
- Are there any HW integration constraints to take into account concerning the pinout (which is the only possible thing that changes for RBL or TIFS between a custom board and the EVM) or clocking for a custom board ? This is never mentioned in any documentation that I'm aware of.
- Why is the TIFS behavior different when using MCU_Only = 1 (concerning the Secure Proxy writing) compared to MCU_Only = 0 ?
- [EDIT] Could you please provide documentation or references relating to the MCU_BOOTMODE[7] OVRD pin that apparently has to be taken into account when dealing with HS devices ?
Thanks in advance for your time and answer.
Kind Regards