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Original question:

SK-AM62A-LP: Edge AI Compile custom model

SK-AM69: How to generate allowedNode.txt

rei
Mastermind 6155 points
Part Number: SK-AM69

Tool/software:


Hi Experts,


I want to use a custom model in TensorflowLite with SK-AM69.

compile_options = {
'tidl_tools_path' : os.environ['TIDL_TOOLS_PATH'],
'artifacts_folder' : output_dir,
'tensor_bits' : num_bits,
'accuracy_level' : accuracy,
'debug_level' : 1,
'deny_list' : "1",
}

I compiled own tflite model, but it didn't generate allowedNode.txt after running. Could you please help me?

The following files are generated and I can do inference on ARM, but I can't use DSP.

149_tidl_io_1.bin
149_tidl_net.bin.layer_info.txt
149_tidl_net.bin_netLog.txt
149_tidl_net.bin
149_tidl_net.bin.svg
graphvizInfo.txt

*Environment
SK-AM69
SD boot (tisdk-edgeai-image-j784s4-evm.wic.xz)
Version: 09.02.00.05

----------------Inference log--------------------------------------------------

root@am69a-sk:~/tflite-test# python3 infer-test.py

******** WARNING ******* : Could not open /home/root/tflite-test/resnet//allowedNode.txt for reading... Entire model will run on ARM without any delegation to TIDL !

Number of subgraphs:1 , 0 nodes delegated out of 66 nodes

INFO: Created TensorFlow Lite XNNPACK delegate for CPU.
(680, 416)
infer time: 0.3435549736022949
{'ts:run_start': 15496595226687, 'ts:run_end': 15496938064560, 'ddr:read_start': 0, 'ddr:read_end': 18446744073709551615, 'ddr:write_start': 0, 'ddr:write_end': 0}

Best regards,
Rei

  • 0
    TI__Genius 10170 points

    Hi Rei,

    Can you provide the compilation log when compiling for C7x offload with the debug_level = 2? Looking at the model artifact files you say are being generated, there seems to be some error in the compilation process. Also what version of edgeai-tidl-tools are you using?

    Best,

    Asha

  • 0 in reply to Asha Bhandarkar
    Mastermind 6155 points

    Hi Asha,

    Thank you for your reply. This is message with the debug_level = 2.

    compile-message.log 
    tidl_tools_path                                 = /home/root/tidl_tools 
artifacts_folder                                = /home/root/tflite-test/outputs 
tidl_tensor_bits                                = 8 
debug_level                                     = 2 
num_tidl_subgraphs                              = 16 
tidl_denylist                                   = 1   
tidl_denylist_layer_name                        = 
tidl_denylist_layer_type                         = 
tidl_allowlist_layer_name                        = 
model_type                                      =  
tidl_calibration_accuracy_level                 = 7 
tidl_calibration_options:num_frames_calibration = 20 
tidl_calibration_options:bias_calibration_iterations = 50 
mixed_precision_factor = -1.000000 
model_group_id = 0 
power_of_2_quantization                         = 2 
ONNX QDQ Enabled                                = 0 
enable_high_resolution_optimization             = 0 
pre_batchnorm_fold                              = 1 
add_data_convert_ops                            = 1 
output_feature_16bit_names_list                 =  
m_params_16bit_names_list                       =  
m_single_core_layers_names_list                    =  
reserved_compile_constraints_flag               = 1601 
ti_internal_reserved_1                          = 


 ****** WARNING : Network not identified as Object Detection network : (1) Ignore if network is not Object Detection network (2) If network is Object Detection network, please specify "model_type":"OD" as part of OSRT compilation options******

Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6/Relu6;model/tf.math.add/Add;model/conv2d_11/Conv2D;model/conv2d/Conv2D;model/tf.math.add/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_1/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_1/Relu6;model/tf.math.add_1/Add;model/conv2d_11/Conv2D;model/depthwise_conv2d/depthwise;model/tf.math.add_1/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_2/Add;model/conv2d_1/Conv2D;model/tf.math.add_2/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_2/Relu6;model/tf.math.add_3/Add;model/conv2d_25/Conv2D;model/conv2d_2/Conv2D;model/tf.math.add_3/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_2/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_3/Relu6;model/tf.math.add_4/Add;model/conv2d_25/Conv2D;model/depthwise_conv2d_1/depthwise;model/tf.math.add_4/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_5/Add;model/conv2d_5/Conv2D;model/conv2d_3/Conv2D;model/tf.math.add_5/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_4/Relu6;model/tf.math.add_6/Add;model/depthwise_conv2d_3/depthwise;model/conv2d_4/Conv2D;model/tf.math.add_6/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_3/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_5/Relu6;model/tf.math.add_7/Add;model/depthwise_conv2d_3/depthwise;model/depthwise_conv2d_2/depthwise;model/tf.math.add_7/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_8/Add;model/conv2d_5/Conv2D;model/tf.math.add_8/Add/y 
Supported TIDL layer type --- 5 Tflite layer type --- 0 layer output name--- model/tf.math.add_9/Add 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_6/Relu6;model/tf.math.add_10/Add;model/depthwise_conv2d_3/depthwise;model/conv2d_6/Conv2D;model/tf.math.add_10/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_4/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_7/Relu6;model/tf.math.add_11/Add;model/depthwise_conv2d_3/depthwise;model/tf.math.add_11/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_12/Add;model/conv2d_11/Conv2D;model/conv2d_7/Conv2D;model/tf.math.add_12/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_8/Relu6;model/tf.math.add_13/Add;model/depthwise_conv2d_6/depthwise;model/conv2d_8/Conv2D;model/tf.math.add_13/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_5/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_9/Relu6;model/tf.math.add_14/Add;model/depthwise_conv2d_6/depthwise;model/depthwise_conv2d_4/depthwise;model/tf.math.add_14/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_15/Add;model/conv2d_11/Conv2D;model/conv2d_9/Conv2D;model/tf.math.add_15/Add/y 
Supported TIDL layer type --- 5 Tflite layer type --- 0 layer output name--- model/tf.math.add_16/Add 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_10/Relu6;model/tf.math.add_17/Add;model/depthwise_conv2d_6/depthwise;model/conv2d_10/Conv2D;model/tf.math.add_17/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_6/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_11/Relu6;model/tf.math.add_18/Add;model/depthwise_conv2d_6/depthwise;model/depthwise_conv2d_5/depthwise;model/tf.math.add_18/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_19/Add;model/conv2d_11/Conv2D;model/tf.math.add_19/Add/y 
Supported TIDL layer type --- 5 Tflite layer type --- 0 layer output name--- model/tf.math.add_20/Add 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_12/Relu6;model/tf.math.add_21/Add;model/depthwise_conv2d_6/depthwise;model/conv2d_12/Conv2D;model/tf.math.add_21/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_7/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_13/Relu6;model/tf.math.add_22/Add;model/depthwise_conv2d_6/depthwise;model/tf.math.add_22/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_23/Add;model/conv2d_19/Conv2D;model/conv2d_13/Conv2D;model/tf.math.add_23/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_14/Relu6;model/tf.math.add_24/Add;model/depthwise_conv2d_10/depthwise;model/conv2d_14/Conv2D;model/tf.math.add_24/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_8/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_15/Relu6;model/tf.math.add_25/Add;model/depthwise_conv2d_10/depthwise;model/depthwise_conv2d_7/depthwise;model/tf.math.add_25/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_26/Add;model/conv2d_19/Conv2D;model/conv2d_15/Conv2D;model/tf.math.add_26/Add/y 
Supported TIDL layer type --- 5 Tflite layer type --- 0 layer output name--- model/tf.math.add_27/Add 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_16/Relu6;model/tf.math.add_28/Add;model/depthwise_conv2d_10/depthwise;model/conv2d_16/Conv2D;model/tf.math.add_28/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_9/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_17/Relu6;model/tf.math.add_29/Add;model/depthwise_conv2d_10/depthwise;model/depthwise_conv2d_8/depthwise;model/tf.math.add_29/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_30/Add;model/conv2d_19/Conv2D;model/conv2d_17/Conv2D;model/tf.math.add_30/Add/y 
Supported TIDL layer type --- 5 Tflite layer type --- 0 layer output name--- model/tf.math.add_31/Add 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_18/Relu6;model/tf.math.add_32/Add;model/depthwise_conv2d_10/depthwise;model/conv2d_18/Conv2D;model/tf.math.add_32/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_10/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_19/Relu6;model/tf.math.add_33/Add;model/depthwise_conv2d_10/depthwise;model/depthwise_conv2d_9/depthwise;model/tf.math.add_33/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_34/Add;model/conv2d_19/Conv2D;model/tf.math.add_34/Add/y 
Supported TIDL layer type --- 5 Tflite layer type --- 0 layer output name--- model/tf.math.add_35/Add 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_20/Relu6;model/tf.math.add_36/Add;model/depthwise_conv2d_10/depthwise;model/conv2d_20/Conv2D;model/tf.math.add_36/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_11/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_21/Relu6;model/tf.math.add_37/Add;model/depthwise_conv2d_10/depthwise;model/tf.math.add_37/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_38/Add;model/conv2d_25/Conv2D;model/conv2d_21/Conv2D;model/tf.math.add_38/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_22/Relu6;model/tf.math.add_39/Add;model/depthwise_conv2d_12/depthwise;model/conv2d_22/Conv2D;model/tf.math.add_39/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_12/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_23/Relu6;model/tf.math.add_40/Add;model/depthwise_conv2d_12/depthwise;model/depthwise_conv2d_11/depthwise;model/tf.math.add_40/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_41/Add;model/conv2d_25/Conv2D;model/conv2d_23/Conv2D;model/tf.math.add_41/Add/y 
Supported TIDL layer type --- 5 Tflite layer type --- 0 layer output name--- model/tf.math.add_42/Add 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.nn.relu6_24/Relu6;model/tf.math.add_43/Add;model/depthwise_conv2d_12/depthwise;model/conv2d_24/Conv2D;model/tf.math.add_43/Add/y 
Supported TIDL layer type --- 26 Tflite layer type --- 34 layer output name--- model/zero_padding2d_13/Pad 
Supported TIDL layer type --- 1 Tflite layer type --- 4 layer output name--- model/tf.nn.relu6_25/Relu6;model/tf.math.add_44/Add;model/depthwise_conv2d_12/depthwise;model/tf.math.add_44/Add/y 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_45/Add;model/conv2d_25/Conv2D;model/tf.math.add_45/Add/y 
Supported TIDL layer type --- 5 Tflite layer type --- 0 layer output name--- model/tf.math.add_46/Add 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- StatefulPartitionedCall:11 
Supported TIDL layer type --- 29 Tflite layer type --- 6 layer output name--- StatefulPartitionedCall:1 
Supported TIDL layer type --- 1 Tflite layer type --- 3 layer output name--- model/tf.math.add_48/Add;model/conv2d_27/Conv2D;model/tf.math.add_48/Add/y 
Supported TIDL layer type --- 25 Tflite layer type --- 14 layer output name--- StatefulPartitionedCall:01 
Supported TIDL layer type --- 29 Tflite layer type --- 6 layer output name--- StatefulPartitionedCall:0 

 Preliminary number of subgraphs:1 , 66 nodes delegated out of 66 nodes 
 
In TIDL_tfliteRtImportInit subgraph_id=149
Layer 0, subgraph id 149, name=StatefulPartitionedCall:1
Layer 1, subgraph id 149, name=StatefulPartitionedCall:0
Layer 2, subgraph id 149, name=serving_default_input_1:0
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 5   Tflite builtin code type 0 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 5   Tflite builtin code type 0 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 5   Tflite builtin code type 0 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 5   Tflite builtin code type 0 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 5   Tflite builtin code type 0 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 5   Tflite builtin code type 0 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 5   Tflite builtin code type 0 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 26   Tflite builtin code type 34 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 4 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 5   Tflite builtin code type 0 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 29   Tflite builtin code type 6 
In TIDL_tfliteRtImportNode  TIDL Layer type 1   Tflite builtin code type 3 
In TIDL_tfliteRtImportNode  TIDL Layer type 25   Tflite builtin code type 14 
In TIDL_tfliteRtImportNode  TIDL Layer type 29   Tflite builtin code type 6 
In TIDL_runtimesOptimizeNet: LayerIndex = 69, dataIndex = 67 

 ************** Frame index 1 : Running float import ************* 
In TIDL_runtimesPostProcessNet 
In TIDL_runtimesPostProcessNet 1
In TIDL_runtimesPostProcessNet 2
In TIDL_runtimesPostProcessNet 3
****************************************************
**                ALL MODEL CHECK PASSED          **
****************************************************

In TIDL_runtimesPostProcessNet 4
************ in TIDL_subgraphRtCreate ************ 
 The soft limit is 2048
The hard limit is 2048
MEM: Init ... !!!
MEM: Init ... Done !!!
 0.0s:  VX_ZONE_INIT:Enabled
 0.8s:  VX_ZONE_ERROR:Enabled
 0.9s:  VX_ZONE_WARNING:Enabled
 0.5358s:  VX_ZONE_INIT:[tivxInit:185] Initialization Done !!!

--------------------------------------------
TIDL Memory size requiement (record wise):
MemRecNum   , Space               , Attribute   , Alignment   , Size(KBytes), BasePtr     
0           , DDR Cacheable       , Persistent  ,  128, 19.65   , 0x00000000
1           , DDR Cacheable       , Persistent  ,  128, 0.64    , 0x00000000
2           , DDR Cacheable       , Scratch     ,  128, 16.00   , 0x00000000
3           , DDR Cacheable       , Scratch     ,  128, 4.00    , 0x00000000
4           , DDR Cacheable       , Scratch     ,  128, 56.00   , 0x00000000
5           , DDR Cacheable       , Persistent  ,  128, 337.90  , 0x00000000
6           , DDR Cacheable       , Scratch     ,  128, 108621.63, 0x00000000
7           , DDR Cacheable       , Scratch     ,  128, 0.12    , 0x00000000
8           , DDR Cacheable       , Scratch     ,  128, 40472.62, 0x00000000
9           , DDR Cacheable       , Scratch     ,  128, 53966.25, 0x00000000
10          , DDR Cacheable       , Persistent  ,  128, 747.55  , 0x00000000
11          , DDR Cacheable       , Scratch     ,  128, 512.25  , 0x00000000
12          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0x00000000
13          , DDR Cacheable       , Persistent  ,  128, 24646.94, 0x00000000
14          , DDR Cacheable       , Persistent  ,  128, 0.00    , 0x00000000
--------------------------------------------
Total memory size requirement (space wise):
Mem Space , Size(KBytes)
DDR Cacheable, 229401.69
--------------------------------------------
NOTE: Memory requirement in host emulation can be different from the same on EVM
      To get the actual TIDL memory requirement make sure to run on EVM with 
      debugTraceLevel = 2

--------------------------------------------
TIDL init call from ivision API 

--------------------------------------------
TIDL Memory size requiement (record wise):
MemRecNum   , Space               , Attribute   , Alignment   , Size(KBytes), BasePtr     
0           , DDR Cacheable       , Persistent  ,  128, 19.65   , 0x509c6000
1           , DDR Cacheable       , Persistent  ,  128, 0.64    , 0x5323b000
2           , DDR Cacheable       , Scratch     ,  128, 16.00   , 0x509c2000
3           , DDR Cacheable       , Scratch     ,  128, 4.00    , 0x52bbe000
4           , DDR Cacheable       , Scratch     ,  128, 56.00   , 0x5023d000
5           , DDR Cacheable       , Persistent  ,  128, 337.90  , 0xfb073000
6           , DDR Cacheable       , Scratch     ,  128, 108621.63, 0xed5ec000
7           , DDR Cacheable       , Scratch     ,  128, 0.12    , 0x52bbd000
8           , DDR Cacheable       , Scratch     ,  128, 40472.62, 0xf88ec000
9           , DDR Cacheable       , Scratch     ,  128, 53966.25, 0xea138000
10          , DDR Cacheable       , Persistent  ,  128, 747.55  , 0xf8831000
11          , DDR Cacheable       , Scratch     ,  128, 512.25  , 0xf87b0000
12          , DDR Cacheable       , Persistent  ,  128, 0.12    , 0x509fa000
13          , DDR Cacheable       , Persistent  ,  128, 24646.94, 0xe8926000
14          , DDR Cacheable       , Persistent  ,  128, 0.00    , 0x509f9000
--------------------------------------------
Total memory size requirement (space wise):
Mem Space , Size(KBytes)
DDR Cacheable, 229401.69
--------------------------------------------
NOTE: Memory requirement in host emulation can be different from the same on EVM
      To get the actual TIDL memory requirement make sure to run on EVM with 
      debugTraceLevel = 2

--------------------------------------------
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PREEMPTION: Adding a new priority object for targetPriority = 0, handle = 0x7fdb509c6000
PREEMPTION: Now total number of priority objects = 1 at priorityId = 0,    with new memRec of base = 0x7fdb509fa000 and size = 128
PREEMPTION: Requesting context memory addr for handle 0x7fdb509c6000, return Addr = 0x7fdb357f84b8
************ TIDL_subgraphRtCreate done ************ 
 ************ in TIDL_subgraphRtDelete ************ 
 PREEMPTION: Removing priroty object with handle = 0x7fdb509c6000 and targetPriority = 0,      Number of obejcts left are = 0, removed object with base  = 0x7fdb509fa000 and size =128
MEM: Deinit ... !!!
MEM: Alloc's: 26 alloc's of 264667029 bytes 
MEM: Free's : 26 free's  of 264667029 bytes 
MEM: Open's : 0 allocs  of 0 bytes 
MEM: Deinit ... Done !!!

    I'm using edgeai-tidl-tools 09_02_07_00 tag and docker environment. It is maybe right, I checked Github "compaible SDK version"!

    Best reagards,

    Rei

  • 0 in reply to rei
    Mastermind 6155 points

    Hi Asha,

    Do you get anything from this?

    Best regards,

    Rei

  • 0 in reply to rei
    TI__Genius 10170 points

    Hi Rei, 

    Sorry for not getting back to you on this issue earlier. Unfortunately, I am not seeing errors or warnings in your compilation log that would indicate why the allowedNode file is not getting built. Can you ensure that your tidl_tools directory is properly set up? Maybe try running one of the default tflite models within edgeai-tidl-tools and see if you are seeing the same behavior?

    rei said:

    I'm using edgeai-tidl-tools 09_02_07_00 tag and docker environment. It is maybe right, I checked Github "compaible SDK version"!

    Best reagards,

    Yes, if you have a 9.2 wic image on your SD card, using a 9.2 tag from the github is correct.

    Best,

    Asha

  • 0 in reply to Asha Bhandarkar
    Mastermind 6155 points

    Hi Asha,

    Thank you for your reply. I checked my tidl_tools directory. It is no problem.

    I used default tflite models, but it is the same behavior, the allowedNode file is not getting built.

    Could you please check it?

    I tried default tflite models:

    edgeai-tidl-tools/models/public/deeplabv3_mnv2_ade20k_float.tflite

    edgeai-tidl-tools/models/public/mobilenet_v1_1.0_224.tflite

    Best regards,

    Rei

  • 0 in reply to rei
    TI__Genius 10170 points

    Hi Rei,

    I am seeing that all files (allowedNode.txt included) are getting built when I compile the default models that you mention. When you compiled the default models did you use the tflrt_delegate.py script that comes with the package to do so? 

    If you believe your setup is correct, can you please provide the exact instructions you are using to compile one of the default models and what you are getting in the model-artifacts folder? 

    Could you also share what the contents of your tidl_tools folder is just to make sure? You can also re-download it by unsetting your TIDL_TOOLS_PATH, deleting the folder, and running the setup.sh script to see if that changes anything. 

    Best,

    Asha