AM69: QSPI not working properly in QUAD mode.

Parth Pancholi

Part Number: AM69

Tool/software:

We have custom board based on AM69 SOC and trying to use mcu-ospi0 in a QUAD mode with a flash memory MX25U25645GXDI00. When trying to use MX25U25645GXDI00 in QUAD mode, observed below warning message in a kernel logs.

[    2.863502] spi spi0.0: setup: ignoring unsupported mode bits 200
[    2.869857] spi-nor spi0.0: mx25u25635f (32768 Kbytes)

Questions :

Is QSPI QUAD mode supported in current AM69 base SDK ? (from spi-cadence-quadspi.c or something else) ?
In addition, memory could not work at all at desired frequency of 66 MHz as per the part's datasheet. Any reasons/hints for such a failure ?

pinctrl and DT snippets:

&wkup_pmx0 {
    pinctrl_mcu_ospi0_4bit: mcu-ospi0-4bit-default-pins {
        pinctrl-single,pins = <
            J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK  */ /* AQUILA B65 */
            J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0)  /* (B33) MCU_OSPI0_D0   */ /* AQUILA B68 */
            J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0)  /* (B32) MCU_OSPI0_D1   */ /* AQUILA B67 */
            J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0)  /* (C33) MCU_OSPI0_D2   */ /* AQUILA B61 */
            J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0)  /* (C35) MCU_OSPI0_D3   */ /* AQUILA B60 */
            J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0)  /* (C34) MCU_OSPI0_DQS  */ /* AQUILA B63 */
        >;
    }; 

    pinctrl_mcu_ospi0_cs0: mcu-ospi0-cs0-default-pins {
        pinctrl-single,pins = <
            J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */ /* AQUILA B66 */
        >;
    };
    ...
};

&ospi0 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_mcu_ospi0_4bit>, <&pinctrl_mcu_ospi0_cs0>;
    status = "okay";

    flash@0 {
        compatible = "jedec,spi-nor";
        reg = <0x0>;
        spi-max-frequency = <50000000>;
        spi-rx-bus-width = <4>;
        spi-tx-bus-width = <4>;
        cdns,read-delay = <0>;
        cdns,tchsh-ns = <3>;
        cdns,tsd2d-ns = <10>;
        cdns,tshsl-ns = <30>;
        cdns,tslch-ns = <8>;
    };  
};

We are running everything latest and greatest from 09.02.00.010 tag from SW side.

Regards,
Parth P

2 months ago

0 Parth Pancholi 2 months ago

Prodigy 210 points

Hello TI experts,

Noticed that from spi-cadence-quadspi.c driver, QUAD mode is not supported. 'master->mode_bits = SPI_RX_QUAD | SPI_RX_DUAL;'

static int cqspi_probe(struct platform_device *pdev)
{
    const struct cqspi_driver_platdata *ddata;
    struct reset_control *rstc, *rstc_ocp;
    struct device *dev = &pdev->dev;
    ...
    ...
    master->mode_bits = SPI_RX_QUAD | SPI_RX_DUAL;
    master->mem_ops = &cqspi_mem_ops;
    master->mem_caps = &cqspi_mem_caps;
    master->dev.of_node = pdev->dev.of_node;
    ...
}

Any reasons/limitations for not supporting QSPI QUAD mode ?

Thanks.

Regards,

Parth P

0 Keerthy J 2 months ago in reply to Parth Pancholi

TI__Guru*** 141690 points

Hi Parth,

AM69 only has the OSPI part:

We support the OSPI par default in the SDK.

There is no way for us to validate a QSPI part in AM69 as the board is not having any QSPI part.

- Keerthy

0 fd 2 months ago in reply to Keerthy J

Intellectual 615 points

Hello Keerthy J

I would like to explicitly write that TI AM69, according to your reference manual, supports "single, dual, quad (QSPI mode)".

Keerthy J said:
There is no way for us to validate a QSPI part in AM69 as the board is not having any QSPI part.

What's the plan forward given that? We have this functionality on our board and we plan to use it. Can I assume that your reference manual is correct?

0 Keerthy J 2 months ago in reply to fd

TI__Guru*** 141690 points

Hi,

What I meant is that AM69 does not have a QSPI part connected. We have QSPI present on the EVM.
So One thing that we got hint from your traces is that QUAD mode for TX is not supported.

"[ 2.863502] spi spi0.0: setup: ignoring unsupported mode bits 200"

0x200 aka BIT[9].

On the other hand The RX QUAD mode is supported.

" master->mode_bits = SPI_RX_QUAD | SPI_RX_DUAL;"

Refer: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts?h=ti-linux-6.1.y#n835

So try similar settings on your custom board. That should work.

- Keerthy

0 fd 2 months ago in reply to Keerthy J

Intellectual 615 points

Yes, `spi-tx-bus-width = <1>;` works, and this is what happens implicitly when we get this error message from the SPI driver.

Said that having the SPI flash work in 1-bit mode (the tx side, at least) is not what we aim for, we'll look into the changes required in the driver and test those.

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AM69: QSPI not working properly in QUAD mode.