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TDA4AP-Q1: ESM Module Integration Theory

Kevin Peng
Expert 3037 points
Part Number: TDA4AP-Q1

Tool/software:

Hi TI Experts,

Customer is working on TDA4AP SDK9.2.

Question 1: They want to know the meaning of the below two ESM error.

MCU ESM error bit 95: SDLR_MCU_ESM0_ESM_LVL_EVENT_GLUELOGIC_ESM_MAIN_ERR_GLUE_ERR_I_N_0

WKUP ESM error bit 63: SDLR_WKUP_ESM0_ESM_LVL_EVENT_GLUELOGIC_ESM_MCU_ERR_GLUE_ERROR_N_0

Question 2: Seeing from the J784S4 TRM page 400, customer also wants to know the condition of enabling the red arrow shown below. For example, do we need to configure the above MCU ESM error bit 95, so that the below red arrow could be enabled? Or do we need any other configurations to enable it?

Customer actually did some experiments before asking the above two questions, let me summarize it below.

Experiment 1: Trigger a SOC ESM error (only 1), and configure MCU ESM bit 95, but not configure WKUP ESM bit 63

Results: Only SOC_SAFETY_ERRORn will occur a low level signal, but MCU_SAFETY_ERRORn is always at high level signal.

Comments: Customer expects both SOC_SAFETY_ERRORn & MCU_SAFETY_ERRORn should have low level signal without configuring WKUP ESM bit 63.

Experiment 2: Trigger a SOC ESM error (only 1), and configure MCU ESM bit 95, and also configure WKUP ESM bit 63

Results: Both SOC_SAFETY_ERRORn & MCU_SAFETY_ERRORn will occur a low level signal, the sequence of occurring low level signal is from MCU_SAFETY_ERRORn to SOC_SAFETY_ERRORn.

Comments: Customer expects the sequence of occurring low level signal should be from SOC_SAFETY_ERRORn to MCU_SAFETY_ERRORn instead.

Experiment 3: Trigger a SOC ESM error (only 1), and configure WKUP ESM bit 63, but not configure MCU ESM bit 95

Results: Both SOC_SAFETY_ERRORn & MCU_SAFETY_ERRORn will occur a low level signal, the sequence of occurring low level signal is from MCU_SAFETY_ERRORn to SOC_SAFETY_ERRORn.

Comments: Customer expects only SOC_SAFETY_ERRORn should have low level signal, because we did not configure MCU ESM bit 95.

In summary, the corresponding comment of the above 3 experiments is all different with customer's expectations.

Hence, customer reaches to us to ask the above 2 questions and hope we could help them better understand the theory behind it.

Thanks a lot,

Kevin

  • +1
    TI__Mastermind 24335 points

    Hi Kevin,

    Thanks for your detailed question. What is the SOC ESM error that the customer is triggering? Is it a MAIN, MCU or WKUP event?

    Please refer to the section 5.5.14.2 ESM Integration Details in the TRM, that has the following information -

    For a Main ESM error event to trigger an MCU error notification, you need to also enable the MAIN event going into the MCU ESM. If you wish to enable the WKUP ESM, then also configure the MCU event in the WKUP ESM to trigger the output pin.
     
    So you would enable event 95 in MCU ESM and event 63 in WKUP ESM, if required:
    Regards,
    Josiitaa
  • 0 in reply to Josiitaa RL
    TI__Expert 3037 points

    Hi Josiitaa,

    Thanks for your timely reply, your explanation matches customer's experiment results.

    Thanks,

    Kevin