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TDA4VH-Q1: DQS P N inverted in IBIS

Part Number: TDA4VH-Q1

Tool/software:

Customer said In the IBIS model, differential signals like DDR DQS P/N are all inverted, please help to confirm, and if it impact simulation result?

 

  • Hi Tony,

    Can the customer please replace lines 1511-1530 within the IBIS model with the following?

    AC1	AB2	NA	NA	NA	NA	||	DDR0_CKP	&	DDR0_CKN
    U1	V1	NA	NA	NA	NA	||	DDR0_DQS0P	&	DDR0_DQS0N
    AA1	Y1	NA	NA	NA	NA	||	DDR0_DQS1P	&	DDR0_DQS1N
    AF1	AE1	NA	NA	NA	NA	||	DDR0_DQS2P	&	DDR0_DQS2N
    AJ1	AH1	NA	NA	NA	NA	||	DDR0_DQS3P	&	DDR0_DQS3N
    B10	A11	NA	NA	NA	NA	||	DDR1_CKP	&	DDR1_CKN
    A16	A17	NA	NA	NA	NA	||	DDR1_DQS0P	&	DDR1_DQS0N
    A13	A14	NA	NA	NA	NA	||	DDR1_DQS1P	&	DDR1_DQS1N
    A8	A9	NA	NA	NA	NA	||	DDR1_DQS2P	&	DDR1_DQS2N
    A3	A4	NA	NA	NA	NA	||	DDR1_DQS3P	&	DDR1_DQS3N
    L2	K1	NA	NA	NA	NA	||	DDR2_CKP	&	DDR2_CKN
    T1	R1	NA	NA	NA	NA	||	DDR2_DQS0P	&	DDR2_DQS0N
    N1	M1	NA	NA	NA	NA	||	DDR2_DQS1P	&	DDR2_DQS1N
    H1	G1	NA	NA	NA	NA	||	DDR2_DQS2P	&	DDR2_DQS2N
    E1	D1	NA	NA	NA	NA	||	DDR2_DQS3P	&	DDR2_DQS3N
    A24	B25	NA	NA	NA	NA	||	DDR3_CKP	&	DDR3_CKN
    A18	A19	NA	NA	NA	NA	||	DDR3_DQS0P	&	DDR3_DQS0N
    A21	A22	NA	NA	NA	NA	||	DDR3_DQS1P	&	DDR3_DQS1N
    A26	A27	NA	NA	NA	NA	||	DDR3_DQS2P	&	DDR3_DQS2N
    A29	A30	NA	NA	NA	NA	||	DDR3_DQS3P	&	DDR3_DQS3N

    This will flip the differential pairs.

    Regards,
    Mark

  • Hi Mark,

    Customer manually changed it. Would you update the on line ibis file?

  • Hi Tony,

    I'll make an internal note to update it. Marking this thread as resolved.

    Thanks and regards,
    Mark