[FAQ] TLV62585: Input voltage vs Output voltage - AM64x AM62x Discrete power architecture

Part Number: TLV62585

Tool/software:

Hi Experts, 

I am reviewing a customer schematic.

Customer is using TLV62585DRLR

the input is 4.2V and could be switched to 3V.

The output is 3.3V.

Do you have any concern with the TLV62585DRLR providing output or 3.3V with 3.3V input.

In case the 4.2V is switched to 3.3V during operation, do you expect the 3.3V output to glitch. is there a concern with this configuration.

Thank you for the support.

Regards,

Sreenivasa

  • Hi Sreenivasa,

    The TLV62585 has 100% duty cycle mode, so it would be able to support 3.3V input to 3.3V output. However, there will be a voltage drop across the high side FET on resistance and the DCR of the inductor. So the output voltage will be 3.3V minus these drops. If VIN falls below 3.3V, it will still stay in 100% mode, but the output will be VIN minus the drops.

    There should be no significant glitch with a fast input line transient.

    Best regards,

    Varun

  • Hello Varun,

    Thank you.

    I see the line regulation graph in the data sheet.

    Would this be valid for the above condition that i described.

    regards,

    Sreenivasa

  • Hi Sreenivasa,

    The line regulation graph in figure 10 in the datasheet is the DC line reg curve. 

    I've added a scope shot from validation data for a fast (1V/us) input change from 5.5V to 3.8V. There will be a small undershoot/ overshoot in VOUT with the fast line step. The slew rate of VIN will influence the results.

    Best regards,

    Varun

  • Hello Varun,

    Thank you for the inputs.

    I suspect the step could be similar for input voltage change from 3V to 4.2V and 4.2V to 3.3V.

    Regards,

    Sreenivasa