AM5718-HIREL: How to change the device tree and driver program when using RGMII interface to connect DP83822 with spsw?

I found the following code about phy in the device tree:

phy_sel: cpsw-phy-sel@4a002554 {
compatible = "ti,dra7xx-cpsw-phy-sel";
reg= <0x4a002554 0x4>;
reg-names = "gmii-sel";
};

But I don't know how to adjust it

Hi,

Can you please share the device-tree and boot logs for the issue.

Regards,
Tanmay

hello，Tanmay，

      The attachments are bootlog and device tree files related to these two Ethernet networks。

      What's different from the first question is that I made adjustments, hoping to achieve RGMII interface recognition and application of dp83822 by changing the modules of&mac,&csw_emac0,&csw_emac1, and&davinciumdio. According to the bootlog, two phy channels were recognized, but it couldn't be linked when the Ethernet cable was inserted.
      I hope you can help me implement link and enable Ethernet communication.

U-Boot SPL 2017.01-00458-g32d3fcd-dirty (Sep 30 2024 - 11:16:56)
DRA722-GP ES2.0
Trying to boot from MMC1
reading u-boot.img
reading u-boot.img
reading u-boot.img
reading u-boot.img


U-Boot 2017.01-00458-g32d3fcd-dirty (Sep 30 2024 - 11:16:56 +0800)

CPU  : DRA722-GP ES2.0
Model: TI AM5718 IDK
Board: AM571x IDK, For JRU REV 
DRAM:  1 GiB
MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
SF: Detected s25fl256s_64k with page size 256 Bytes, erase size 64 KiB, total 32 MiB, mapped at 5c000000
Warning: fastboot.board_rev: unknown board revision
Card did not respond to voltage select!
ERROR: invalid mmc device

at ../arch/arm/mach-omap2/utils.c:95/omap_mmc_get_part_size()
SCSI:  SATA link 0 timeout.
AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst 
scanning bus for devices...
Found 0 device(s).
Net:   Could not get PHY for ethernet@48484000: addr 0

Warning: ethernet@48484000 MAC addresses don't match:
Address in SROM is         88:01:f9:d3:a0:bc
Address in environment is  c0:27:b9:14:00:10
eth0: ethernet@48484000
Hit any key to stop autoboot:  0 
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
reading boot.scr
** Unable to read file boot.scr **
reading uEnv.txt
** Unable to read file uEnv.txt **
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
3762752 bytes read in 170 ms (21.1 MiB/s)
102819 bytes read in 13 ms (7.5 MiB/s)
## Flattened Device Tree blob at 88000000
   Booting using the fdt blob at 0x88000000
   Loading Device Tree to 8ffe3000, end 8ffff1a2 ... OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.9.69-g9ce43c71ae (cys@cys) (gcc version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #15 SMP PREEMPT Fri Sep 27 12:25:12 CST 2024
[    0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d
[    0.000000] CPU: div instructions available: patching division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[    0.000000] OF: fdt:Machine model: TI AM5718 IDK
[    0.000000] efi: Getting EFI parameters from FDT:
[    0.000000] efi: UEFI not found.
[    0.000000] Reserved memory: created CMA memory pool at 0x0000000095800000, size 56 MiB
[    0.000000] OF: reserved mem: initialized node ipu2_cma@95800000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created CMA memory pool at 0x0000000099000000, size 64 MiB
[    0.000000] OF: reserved mem: initialized node dsp1_cma@99000000, compatible id shared-dma-pool
[    0.000000] Reserved memory: created CMA memory pool at 0x000000009d000000, size 32 MiB
[    0.000000] OF: reserved mem: initialized node ipu1_cma@9d000000, compatible id shared-dma-pool
[    0.000000] cma: Reserved 24 MiB at 0x00000000be400000
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] OMAP4: Map 0x00000000bfd00000 to fe600000 for dram barrier
[    0.000000] DRA722 ES2.0
[    0.000000] percpu: Embedded 13 pages/cpu @ef646000 s22028 r8192 d23028 u53248
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 210496
[    0.000000] Kernel command line: console=ttyO2,115200n8 root=PARTUUID=d1c2b0af-02 rw rootfstype=ext4 rootwait
[    0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[    0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[    0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[    0.000000] Memory: 644572K/848896K available (8192K kernel code, 317K rwdata, 2440K rodata, 2048K init, 304K bss, 24100K reserved, 180224K cma-reserved, 234496K highmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xf0000000   ( 768 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc0a00000   (10208 kB)
[    0.000000]       .init : 0xc0e00000 - 0xc1000000   (2048 kB)
[    0.000000]       .data : 0xc1000000 - 0xc104f608   ( 318 kB)
[    0.000000]        .bss : 0xc1051000 - 0xc109d1b0   ( 305 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] Preemptible hierarchical RCU implementation.
[    0.000000]  Build-time adjustment of leaf fanout to 32.
[    0.000000]  RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=1
[    0.000000] NR_IRQS:16 nr_irqs:16 16
[    0.000000] OMAP clockevent source: timer1 at 32786 Hz
[    0.000000] arm_arch_timer: Architected cp15 timer(s) running at 6.14MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x16af5adb9, max_idle_ns: 440795202250 ns
[    0.000005] sched_clock: 56 bits at 6MHz, resolution 162ns, wraps every 4398046511023ns
[    0.000016] Switching to timer-based delay loop, resolution 162ns
[    0.000324] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 58327039986419 ns
[    0.000332] OMAP clocksource: 32k_counter at 32768 Hz
[    0.000747] Console: colour dummy device 80x30
[    0.000763] WARNING: Your 'console=ttyO2' has been replaced by 'ttyS2'
[    0.000770] This ensures that you still see kernel messages. Please
[    0.000776] update your kernel commandline.
[    0.000792] Calibrating delay loop (skipped), value calculated using timer frequency.. 12.29 BogoMIPS (lpj=61475)
[    0.000805] pid_max: default: 32768 minimum: 301
[    0.000907] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[    0.000917] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[    0.001537] CPU: Testing write buffer coherency: ok
[    0.001748] /cpus/cpu@0 missing clock-frequency property
[    0.001761] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.001775] Setting up static identity map for 0x80200000 - 0x80200060
[    0.080042] EFI services will not be available.
[    0.099925] Brought up 1 CPUs
[    0.099935] SMP: Total of 1 processors activated (12.29 BogoMIPS).
[    0.099943] CPU: All CPU(s) started in HYP mode.
[    0.099949] CPU: Virtualization extensions available.
[    0.100329] devtmpfs: initialized
[    0.130079] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0
[    0.130330] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.130347] futex hash table entries: 256 (order: 2, 16384 bytes)
[    0.133707] pinctrl core: initialized pinctrl subsystem
[    0.134566] NET: Registered protocol family 16
[    0.135447] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.136419] omap_hwmod: l3_main_2 using broken dt data from ocp
[    0.244195] omap_hwmod: dcan1: _wait_target_disable failed
[    0.370298] cpuidle: using governor ladder
[    0.400323] cpuidle: using governor menu
[    0.409919] OMAP GPIO hardware version 0.1
[    0.425095] irq: no irq domain found for /ocp/l4@4a000000/scm@2000/pinmux@1400 !
[    0.449351] No ATAGs?
[    0.449371] hw-breakpoint: found 5 (+1 reserved) breakpoint and 4 watchpoint registers.
[    0.449381] hw-breakpoint: maximum watchpoint size is 8 bytes.
[    0.449768] omap4_sram_init:Unable to allocate sram needed to handle errata I688
[    0.449778] omap4_sram_init:Unable to get sram pool needed to handle errata I688
[    0.450327] OMAP DMA hardware revision 0.0
[    0.531048] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported)
[    0.532363] edma 43300000.edma: memcpy is disabled
[    0.537134] edma 43300000.edma: TI EDMA DMA engine driver
[    0.538223] vtt_fixed: supplied by V3_3D
[    0.541127] omap-iommu 40d01000.mmu: 40d01000.mmu registered
[    0.541307] omap-iommu 40d02000.mmu: 40d02000.mmu registered
[    0.541467] omap-iommu 58882000.mmu: 58882000.mmu registered
[    0.541622] omap-iommu 55082000.mmu: 55082000.mmu registered
[    0.544208] palmas 0-0058: Irq flag is 0x00000008
[    0.572946] palmas 0-0058: Muxing GPIO 2b, PWM 0, LED 0
[    0.575970] SMPS3: supplied by VMAIN
[    0.579218] SMPS6: supplied by VMAIN
[    0.580619] SMPS7: supplied by VMAIN
[    0.582054] SMPS8: supplied by VMAIN
[    0.583332] SMPS9: supplied by VMAIN
[    0.584024] LDO1: supplied by VMAIN5V5
[    0.591460] LDO2: supplied by VMAIN5V5
[    0.591715] random: fast init done
[    0.601321] LDO3: supplied by VMAIN
[    0.611344] LDO4: supplied by VMAIN
[    0.623480] LDO9: supplied by VMAIN
[    0.631428] LDOLN: supplied by VMAIN
[    0.641463] LDOUSB: supplied by VMAIN5V5
[    0.653465] omap_i2c 48070000.i2c: bus 0 rev0.12 at 400 kHz
[    0.654073] omap_i2c 48072000.i2c: bus 1 rev0.12 at 400 kHz
[    0.654719] omap_i2c 4807a000.i2c: bus 3 rev0.12 at 400 kHz
[    0.654889] media: Linux media interface: v0.10
[    0.654937] Linux video capture interface: v2.00
[    0.654976] pps_core: LinuxPPS API ver. 1 registered
[    0.654984] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.655004] PTP clock support registered
[    0.655034] EDAC MC: Ver: 3.0.0
[    0.661563] omap-mailbox 4883c000.mailbox: omap mailbox rev 0x400
[    0.661854] omap-mailbox 4883e000.mailbox: omap mailbox rev 0x400
[    0.662143] omap-mailbox 48840000.mailbox: omap mailbox rev 0x400
[    0.662336] omap-mailbox 48842000.mailbox: omap mailbox rev 0x400
[    0.662659] Advanced Linux Sound Architecture Driver Initialized.
[    0.670956] clocksource: Switched to clocksource arch_sys_counter
[    0.680626] NET: Registered protocol family 2
[    0.681187] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
[    0.681251] TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
[    0.681376] TCP: Hash tables configured (established 8192 bind 8192)
[    0.681428] UDP hash table entries: 512 (order: 2, 16384 bytes)
[    0.681459] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[    0.681587] NET: Registered protocol family 1
[    0.701993] RPC: Registered named UNIX socket transport module.
[    0.702003] RPC: Registered udp transport module.
[    0.702010] RPC: Registered tcp transport module.
[    0.702017] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.702964] hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
[    0.715671] workingset: timestamp_bits=14 max_order=18 bucket_order=4
[    0.723160] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.733906] NFS: Registering the id_resolver key type
[    0.733932] Key type id_resolver registered
[    0.733940] Key type id_legacy registered
[    0.733983] ntfs: driver 2.1.32 [Flags: R/O].
[    0.735386] bounce: pool size: 64 pages
[    0.735542] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
[    0.735552] io scheduler noop registered
[    0.735560] io scheduler deadline registered
[    0.735690] io scheduler cfq registered (default)
[    0.740746] pinctrl-single 4a003400.pinmux: 282 pins at pa fc003400 size 1128
[    0.740815] pinctrl-single 4a002e8c.pinmux: please update dts to use #pinctrl-cells = <1>
[    0.740894] pinctrl-single 4a002e8c.pinmux: initialized with no interrupts
[    0.740905] pinctrl-single 4a002e8c.pinmux: 1 pins at pa fc002e8c size 4
[    0.810152] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled
[    0.813558] 4806a000.serial: ttyS0 at MMIO 0x4806a000 (irq = 299, base_baud = 3000000) is a 8250
[    0.814552] 48020000.serial: ttyS2 at MMIO 0x48020000 (irq = 300, base_baud = 3000000) is a 8250
[    1.715037] console [ttyS2] enabled
[    1.719408] 48422000.serial: ttyS7 at MMIO 0x48422000 (irq = 301, base_baud = 3000000) is a 8250
[    1.729089] 48424000.serial: ttyS8 at MMIO 0x48424000 (irq = 302, base_baud = 3000000) is a 8250
[    1.738764] 4ae2b000.serial: ttyS9 at MMIO 0x4ae2b000 (irq = 303, base_baud = 3000000) is a 8250
[    1.749456] omap_rng 48090000.rng: OMAP Random Number Generator ver. 20
[    1.756251] [drm] Initialized
[    1.931832] brd: module loaded
[    2.020207] loop: module loaded
[    2.028356] m25p80 spi0.0: s25fl256s1 (32768 Kbytes)
[    2.033451] 7 ofpart partitions found on MTD device spi0.0
[    2.038960] Creating 7 MTD partitions on "spi0.0":
[    2.043791] 0x000000000000-0x000000040000 : "QSPI.SPL"
[    2.059949] 0x000000040000-0x000000140000 : "QSPI.u-boot"
[    2.076316] 0x000000140000-0x0000001c0000 : "QSPI.u-boot-spl-os"
[    2.093383] 0x0000001c0000-0x0000001d0000 : "QSPI.u-boot-env"
[    2.110098] 0x0000001d0000-0x0000001e0000 : "QSPI.u-boot-env.backup1"
[    2.127528] 0x0000001e0000-0x0000009e0000 : "QSPI.kernel"
[    2.143906] 0x0000009e0000-0x000002000000 : "QSPI.file-system"
[    2.161341] libphy: Fixed MDIO Bus: probed
[    2.220994] davinci_mdio 48485000.mdio: davinci mdio revision 1.6
[    2.227119] libphy: 48485000.mdio: probed
[    2.242609] davinci_mdio 48485000.mdio: phy[1]: device 48485000.mdio:01, driver TI DP83822 10/100 Mbps PHY
[    2.252361] davinci_mdio 48485000.mdio: phy[2]: device 48485000.mdio:02, driver TI DP83822 10/100 Mbps PHY
[    2.262729] cpsw 48484000.ethernet: Detected MACID = c0:27:b9:14:00:10
[    2.269327] dma_params.desc_mem_size:8192,data->bd_ram_size:8192
[    2.275457] pool->num_desc:256,pool->mem_size:8192,pool->desc_size:32
[    2.282076] cpsw 48484000.ethernet: device node lookup for pps timer failed
[    2.289105] cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies)
[    2.297310] cpsw 48484000.ethernet: cpsw: Detected MACID = c0:27:b9:14:00:11
[    2.305873] mousedev: PS/2 mouse device common for all mice
[    2.311814] i2c /dev entries driver
[    2.322755] omap_hsmmc 4809c000.mmc: Got CD GPIO
[    2.391262] omap_hsmmc 480b4000.mmc: Cannot get pinctrl
[    2.397253] ledtrig-cpu: registered to indicate activity on CPUs
[    2.411385] omap-gpmc 50000000.gpmc: GPMC revision 6.0
[    2.416545] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000
[    2.431238] gpmc_cs_remap-$$$$$$$$$$$$$$$$$&&&&&&&&&&&&&&************-___________-------the cs is:0 and the base is:33554432
[    2.461286] gpmc_cs_remap-$$$$$$$$$$$$$$$$$&&&&&&&&&&&&&&************-___________-------the cs is:3 and the base is:134217728
[    2.481187] fram modules is installed
[    2.484862] register myfram driver ok!
[    2.502020] NET: Registered protocol family 10
[    2.517137] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    2.531339] NET: Registered protocol family 17
[    2.535946] Key type dns_resolver registered
[    2.540321] omap_voltage_late_init: Voltage driver support not added
[    2.561033] Power Management for TI OMAP4+ devices.
[    2.566108] Registering SWP/SWPB emulation handler
[    2.591501] my_irq request irq success: 212
[    2.595750] my_irq request irq success: 217
[    2.600021] gpio(5_6)->output,value :0!
[    2.604350] dmm 4e000000.dmm: workaround for errata i878 in use
[    2.614457] dmm 4e000000.dmm: initialized all PAT entries
[    2.620448] hctosys: unable to open rtc device (rtc0)
[    2.626083] fixed-supply: disabling
[    2.629748] ldousb: disabling
[    2.632990] ALSA device list:
[    2.635966]   No soundcards found.
[    2.639959] Waiting for root device PARTUUID=d1c2b0af-02...
[    2.739706] mmc0: host does not support reading read-only switch, assuming write-enable
[    2.754331] mmc0: new ultra high speed SDR104 SDHC card at address aaaa
[    2.771362] mmcblk0: mmc0:aaaa SD32G 29.7 GiB 
[    2.776763]  mmcblk0: p1 p2
[    3.008437] EXT4-fs (mmcblk0p2): recovery complete
[    3.014054] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[    3.022222] VFS: Mounted root (ext4 filesystem) on device 179:2.
[    3.028817] devtmpfs: mounted
[    3.032913] Freeing unused kernel memory: 2048K
[    3.114996] systemd[1]: System time before build time, advancing clock.
[    3.131371] systemd[1]: systemd 230 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN)
[    3.149875] systemd[1]: Detected architecture arm.

Welcome to Arago 2017.12!

[    3.181583] systemd[1]: Set hostname to <am57xx-evm>.
[    3.316331] systemd[1]: Configuration file /lib/systemd/system/serial-getty@.service is marked executable. Please remove executable permission bits. Proceeding anyway.
[    3.332269] systemd[1]: Configuration file /lib/systemd/system/serial-getty@.service is marked world-writable. Please remove world writability permission bits. Proceeding anyway.
[    3.409889] systemd[1]: Listening on udev Kernel Socket.
[  OK  ] Listening on udev Kernel Socket.
[    3.441181] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe.
[  OK  ] Listening on /dev/initctl Compatibility Named Pipe.
[    3.481219] systemd[1]: Listening on Network Service Netlink Socket.
[  OK  ] Listening on Network Service Netlink Socket.
[    3.523100] systemd[1]: Created slice User and Session Slice.
[  OK  ] Created slice User and Session Slice.
[    3.551080] systemd[1]: Reached target Remote File Systems.
[  OK  ] Reached target Remote File Systems.
[  OK  ] Started Forward Password Requests to Wall Directory Watch.
[  OK  ] Listening on Journal Socket.
[  OK  ] Listening on udev Control Socket.
[  OK  ] Started Dispatch Password Requests to Console Directory Watch.
[  OK  ] Reached target Paths.
[  OK  ] Listening on Journal Socket (/dev/log).
[  OK  ] Created slice System Slice.
[  OK  ] Created slice system-serial\x2dgetty.slice.
         Starting Remount Root and Kernel File Systems...
[    3.846048] EXT4-fs (mmcblk0p2): re-mounted. Opts: (null)
         Starting Load Kernel Modules...
[    3.878725] cryptodev: loading out-of-tree module taints kernel.
[  OK  ] Created slice system-getty.slice.
[    3.896984] cryptodev: driver 1.8 loaded.
[  OK  ] Reached target Slices.
         Mounting POSIX Message Queue File System...
         Starting Setup Virtual Console...
         Starting Create Static Device Nodes in /dev...
         Mounting Debug File System...
[  OK  ] Reached target Swap.
         Mounting Temporary Directory...
[  OK  ] Listening on Process Core Dump Socket.
[  OK  ] Listening on Syslog Socket.
         Starting Journal Service...
[  OK  ] Mounted Debug File System.
[  OK  ] Mounted POSIX Message Queue File System.
[  OK  ] Mounted Temporary Directory.
[  OK  ] Started Journal Service.
[  OK  ] Started Remount Root and Kernel File Systems.
[  OK  ] Started Load Kernel Modules.
[  OK  ] Started Setup Virtual Console.
[  OK  ] Started Create Static Device Nodes in /dev.
         Starting udev Kernel Device Manager...
         Starting Apply Kernel Variables...
         Mounting Configuration File System...
[  OK  ] Reached target Local File Systems (Pre).
         Mounting /media/ram...
         Mounting /var/volatile...
         Starting udev Coldplug all Devices...
         Starting Flush Journal to Persistent Storage...
[  OK  ] Mounted Configuration File System.
[  OK  ] Mounted /var/volatile.
[  OK  ] Mounted /media/ram.
[  OK  ] Started udev Kernel Device Manager.
[  OK  ] Started Apply Kernel Variables.
[    4.861097] systemd-journald[118]: Received request to flush runtime journal from PID 1
[  OK  ] Started Flush Journal to Persistent Storage.
         Starting Load/Save Random Seed...
[  OK  ] Reached target Local File Systems.
         Starting Create Volatile Files and Directories...
[  OK  ] Started Load/Save Random Seed.
[  OK  ] Started Create Volatile Files and Directories.
         Starting Network Time Synchronization...
         Starting Update UTMP about System Boot/Shutdown...
[  OK  ] Started Update UTMP about System Boot/Shutdown.
[  OK  ] Started Network Time Synchronization.
[  OK  ] Reached target System Time Synchronized.
[  OK  ] Started udev Coldplug all Devices.
[  OK  ] Reached target System Initialization.
[  OK  ] Started Daily Cleanup of Temporary Directories.
[  OK  ] Reached target Timers.
[  OK  ] Listening on D-Bus System Message Bus Socket.
[  OK  ] Listening on RPCbind Server Activation Socket.
[  OK  ] Reached target Sockets.
[  OK  ] Reached target Basic System.
         Starting tiipclad-daemon.service...
[  OK  ] Started Kernel Logging Service.
[  OK  ] Started D-Bus System Message Bus.
[    5.891300] omap-des 480a5000.des: OMAP DES hw accel rev: 2.2
[    5.943419] adxl34x 3-0053: no IRQ?
[    5.968451] omap-des 480a5000.des: will run requests pump with realtime priority
[    6.030403] CAN device driver interface
[  OK  ] Started Job spooling tools.
[    6.131254] c_can_platform 4ae3c000.can: c_can_platform device registered (regs=fce3c000, irq=357)
[  OK  ] Started Periodic Command Scheduler.
         Starting telnetd.service...
[  OK  ] Started System Logging Service.
         Starting Print notice about GPLv3 packages...
[    6.234116] c_can_platform 48480000.can: c_can_platform device registered (regs=fa480000, irq=358)
         Starting Network Service...
[    6.358520] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin
[    6.391998] vpe 489d0000.vpe: Device registered as /dev/video0
         Starting Login Service...
[    6.488853] net eth1: initializing cpsw version 1.15 (0)
[[    6.539546] cpsw 48484000.ethernet: initialized cpsw ale version 1.4
  OK  ] Started Network Service.
[  OK  ] Started tiipclad-daemon.service.
[  OK  ] Started telnetd.service.
[  OK  ] Found device /dev/ttyS2.
[    6.604615] cpsw 48484000.ethernet: ALE Table size 1024
[    6.722964] SCSI subsystem initialized
[  OK  ] Started Login Service.
         Starting thttpd.service...
[  OK  ] Reached target Network.
         Starting Permit User Sessions...
         Starting Network Name Resolution...
[    6.842465] TI DP83822 10/100 Mbps PHY 48485000.mdio:02: attached PHY driver [TI DP83822 10/100 Mbps PHY] (mii_bus:phy_addr=48485000.mdio:02, irq=169)
[    6.882147] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
[    6.894947] ahci 4a140000.sata: SSS flag set, parallel bus scan disabled
[    6.894965] ahci 4a140000.sata: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode
[    6.894971] ahci 4a140000.sata: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part ccc apst 
[    6.944795] scsi host0: ahci
[    6.945057] ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a1410ff] port 0x100 irq 349
[    6.959936] omap-sham 4b101000.sham: hw accel on OMAP rev 4.3
[    7.043000] omap-aes 4b500000.aes: OMAP AES hw accel rev: 3.3
[    7.052695] omap-aes 4b500000.aes: will run requests pump with realtime priority
[    7.105409] omap-aes 4b700000.aes: OMAP AES hw accel rev: 3.3
[    7.110089] omap-aes 4b700000.aes: will run requests pump with realtime priority
[    7.112518] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
[    7.272573] ata1: SATA link down (SStatus 0 SControl 300)
[    7.445159] omap-rproc 58820000.ipu: assigned reserved memory node ipu1_cma@9d000000
[    7.445236] remoteproc remoteproc0: 58820000.ipu is available
[    7.445329] remoteproc remoteproc0: Direct firmware load for dra7-ipu1-fw.xem4 failed with error -2
[    7.445334] remoteproc remoteproc0: powering up 58820000.ipu
***************************************************************
***************************************************************
NOTICE: This file system contains the following GPLv3 packages:
        binutils
        cifs-utils
        cpio
        dosfstools
        gawk
        gzip
        libreadline6
        m4
        which

If you do not wish to distribute GPLv3 components please remove
the above packages prior to distribution.  This can be done using
[    7.445354] remoteproc remoteproc0: Direct firmware load for dra7-ipu1-fw.xem4 failed with error -2

    opkg remove <package>
Where <package> is the name printed in the list above

NOTE: If the package is a dependency of another package you
      will be notified of the dependent packages.  You should
      use the --force-removal-of-dependent-packages option to
      also remove the dependent packages as well
***************************************************************
***************************************************************
[    7.445358] remoteproc remoteproc0: request_firmware failed: -2
[    7.445499] omap-rproc 55020000.ipu: assigned reserved memory node ipu2_cma@95800000
[    7.445566] remoteproc remoteproc1: 55020000.ipu is available
[    7.445634] remoteproc remoteproc1: Direct firmware load for dra7-ipu2-fw.xem4 failed with error -2
[    7.445639] remoteproc remoteproc1: powering up 55020000.ipu
[    7.445657] remoteproc remoteproc1: Direct firmware load for dra7-ipu2-fw.xem4 failed with error -2
[    7.445661] remoteproc remoteproc1: request_firmware failed: -2
[    7.657125] ti-pruss 4b200000.pruss: creating PRU cores and other child platform devices
[    7.710990] davinci_mdio 4b232400.mdio: davinci mdio revision 1.6
[    7.710994] libphy: 4b232400.mdio: probed
[    7.771534] davinci_mdio 4b232400.mdio: phy[3]: device 4b232400.mdio:03, driver TI DP83822 10/100 Mbps PHY
[    7.771539] davinci_mdio 4b232400.mdio: phy[4]: device 4b232400.mdio:04, driver TI DP83822 10/100 Mbps PHY
[    7.771666] ti-pruss 4b280000.pruss: creating PRU cores and other child platform devices
[    7.831002] davinci_mdio 4b2b2400.mdio: davinci mdio revision 1.6
[    7.831006] libphy: 4b2b2400.mdio: probed
[    7.834059] remoteproc remoteproc2: 4b234000.pru0 is available
[    7.834101] pru-rproc 4b234000.pru0: PRU rproc node /ocp/pruss_soc_bus@4b226000/pruss@4b200000/pru@4b234000 probed successfully
[    7.834430] remoteproc remoteproc3: 4b238000.pru1 is available
[    7.834462] pru-rproc 4b238000.pru1: PRU rproc node /ocp/pruss_soc_bus@4b226000/pruss@4b200000/pru@4b238000 probed successfully
[    7.834650] remoteproc remoteproc4: 4b2b4000.pru0 is available
[    7.834679] pru-rproc 4b2b4000.pru0: PRU rproc node /ocp/pruss_soc_bus@4b2a6000/pruss@4b280000/pru@4b2b4000 probed successfully
[    7.834851] remoteproc remoteproc5: 4b2b8000.pru1 is available
[    7.834880] pru-rproc 4b2b8000.pru1: PRU rproc node /ocp/pruss_soc_bus@4b2a6000/pruss@4b280000/pru@4b2b8000 probed successfully
[    7.844214] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    7.844437] prueth pruss2_eth: port 1: using random MAC addr: fe:82:49:a4:76:86
[    7.844629] prueth pruss1_eth: pruss MC Mask 0:0:0:0:0:0
[    8.043082] prueth pruss1_eth: request for sync latch pins failed: -19
[    9.027884] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.028005] prueth pruss2_eth: port 1: using random MAC addr: 1e:78:ae:92:8e:5b
[    9.028856] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.028961] prueth pruss2_eth: port 1: using random MAC addr: 6a:9a:8d:ad:98:88
[    9.228698] usbcore: registered new interface driver usbfs
[    9.229221] usbcore: registered new interface driver hub
[    9.229770] usbcore: registered new device driver usb
[    9.270262] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[    9.270281] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
[    9.271340] xhci-hcd xhci-hcd.0.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x02010010
[    9.271380] xhci-hcd xhci-hcd.0.auto: irq 436, io mem 0x48890000
[    9.272449] hub 1-0:1.0: USB hub found
[    9.272473] hub 1-0:1.0: 1 port detected
[    9.273046] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.273173] prueth pruss2_eth: port 1: using random MAC addr: 7e:c7:e9:aa:1e:1f
[    9.273609] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.273710] prueth pruss2_eth: port 1: using random MAC addr: f2:07:a1:d7:5c:5f
[    9.273829] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[    9.273841] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
[    9.273900] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[    9.274899] hub 2-0:1.0: USB hub found
[    9.274922] hub 2-0:1.0: 1 port detected
[    9.275372] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.275479] prueth pruss2_eth: port 1: using random MAC addr: de:ce:8a:30:37:65
[    9.275742] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
[    9.275759] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 3
[    9.276104] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.276206] prueth pruss2_eth: port 1: using random MAC addr: d6:1b:53:df:72:44
[    9.276422] xhci-hcd xhci-hcd.1.auto: hcc params 0x0220f04c hci version 0x100 quirks 0x02010010
[    9.276458] xhci-hcd xhci-hcd.1.auto: irq 437, io mem 0x488d0000
[    9.282588] hub 3-0:1.0: USB hub found
[    9.282612] hub 3-0:1.0: 1 port detected
[    9.283078] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.283186] prueth pruss2_eth: port 1: using random MAC addr: 1a:6d:f2:fb:8d:e0
[    9.283365] xhci-hcd xhci-hcd.1.auto: xHCI Host Controller
[    9.283376] xhci-hcd xhci-hcd.1.auto: new USB bus registered, assigned bus number 4
[    9.283684] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.283783] prueth pruss2_eth: port 1: using random MAC addr: 42:8b:e4:73:01:e6
[    9.283861] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
[    9.284814] hub 4-0:1.0: USB hub found
[    9.284837] hub 4-0:1.0: 1 port detected
[    9.285259] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.285364] prueth pruss2_eth: port 1: using random MAC addr: 8a:3c:eb:fb:10:ab
[    9.286496] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.286606] prueth pruss2_eth: port 1: using random MAC addr: 5e:59:6c:11:6b:dc
[  OK  ] Started Permit User Sessions.
[    9.557528] ------rgmii sel 8
[[    9.583484] ------slave 1
  OK  ] Started Print notice about GPLv3 packages.
[    9.592890] cpts ptp bc clkid 0
[    9.600669] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready
[    9.634984] prueth pruss1_eth: TI PRU ethernet (type 0) driver initialized
[    9.675180] net eth0: initializing cpsw version 1.15 (0)
[  OK  ] Started Network Name Resolution.
[    9.734819] prueth pruss2_eth: pruss MC Mask 0:0:0:0:0:0
[    9.773048] TI DP83822 10/100 Mbps PHY 48485000.mdio:01: attached PHY driver [TI DP83822 10/100 Mbps PHY] (mii_bus:phy_addr=48485000.mdio:01, irq=168)
[    9.773134] ------rgmii sel 8
[    9.773136] ------slave 0
[    9.798521] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[    9.863591] remoteproc remoteproc2: powering up 4b234000.pru0
[    9.866138] remoteproc remoteproc2: Booting fw image ti-pruss/am57xx-pru0-prueth-fw.elf, size 5028
[    9.866252] ti-pruss 4b200000.pruss: configured system_events = 0x0000060000500000 intr_channels = 0x00000095 host_intr = 0x00000115
[    9.866258] remoteproc remoteproc2: remote processor 4b234000.pru0 is now up
[    9.866276] net eth2: started
[    9.866742] IPv6: ADDRCONF(NETDEV_UP): eth2: link is not ready
[    9.887199] remoteproc remoteproc3: powering up 4b238000.pru1
[    9.893813] remoteproc remoteproc3: Booting fw image ti-pruss/am57xx-pru1-prueth-fw.elf, size 5060
[    9.893929] ti-pruss 4b200000.pruss: configured system_events = 0x0060000000a00000 intr_channels = 0x0000012a host_intr = 0x0000022a
[    9.893933] remoteproc remoteproc3: remote processor 4b238000.pru1 is now up
[    9.893953] net eth3: started
[    9.894169] IPv6: ADDRCONF(NETDEV_UP): eth3: link is not ready
[  OK  ] Started thttpd.service.
[    9.995882] prueth pruss2_eth: port 1: using random MAC addr: e6:8d:66:23:e4:99
[  OK  ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch.
         Starting rng-tools.service...
[   10.456104] random: crng init done
[  OK  ] Started Getty on tty1.
[  OK  ] Started Serial Getty on ttyS2.
[  OK  ] Reached target Login Prompts.
         Starting Synchronize System and HW clocks...
[  OK  ] Started rng-tools.service.
[FAILED] Failed to start Synchronize System and HW clocks.
See 'systemctl status sync-clocks.service' for details.
         Starting thermal-zone-init.service...
[  OK  ] Started thermal-zone-init.service.
[  OK  ] Reached target Multi-User System.
         Starting Update UTMP about System Runlevel Changes...
[  OK  ] Started Update UTMP about System Runlevel Changes.

 _____                    _____           _         _   
|  _  |___ ___ ___ ___   |  _  |___ ___  |_|___ ___| |_ 
|     |  _| .'| . | . |  |   __|  _| . | | | -_|  _|  _|
|__|__|_| |__,|_  |___|  |__|  |_| |___|_| |___|___|_|  
              |___|                    |___|            

Arago Project http://arago-project.org am57xx-evm ttyS2

Arago 2017.12 am57xx-evm ttyS2

am57xx-evm login: root (automatic login)

Thu Jan  1 01:00:00 UTC 1970

Current version is V1.0.11.0!
[   11.395265] This the ds60_dpram driver.
Start to write board online flag!
Start to write 0x44 flag!
start to wait 0xCC and read unit/task param!
[   11.741704] cpsw 48484000.ethernet eth1: Link is Up - 100Mbps/Full - flow control rx/tx
[   11.750172] cpsw 48484000.ethernet eth1: Link is Up - 100Mbps/Full - flow control rx/tx
[   11.760185] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
[   12.552883] cpsw 48484000.ethernet eth1: Link is Down
[   12.558446] cpsw 48484000.ethernet eth1: Link is Down
[   13.101555] prueth pruss1_eth eth2: Link is Up - 100Mbps/Full - flow control rx/tx
[   13.109684] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready
[   13.150367] prueth pruss1_eth eth3: Link is Up - 100Mbps/Full - flow control rx/tx
[   13.159842] IPv6: ADDRCONF(NETDEV_CHANGE): eth3: link becomes ready
[   13.201063] NOHZ: local_softirq_pending 08
[   13.351057] NOHZ: local_softirq_pending 08
[   13.421041] NOHZ: local_softirq_pending 08
[   14.081060] NOHZ: local_softirq_pending 08
[   14.161068] NOHZ: local_softirq_pending 08
[   14.408801] NOHZ: local_softirq_pending 08
[   14.465664] NOHZ: local_softirq_pending 08
[   14.741043] NOHZ: local_softirq_pending 08
[   15.361866] NOHZ: local_softirq_pending 08
[   15.366551] NOHZ: local_softirq_pending 08
root@am57xx-evm:~# ethtool eth0
Settings for eth0:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full 
                                100baseT/Half 100baseT/Full 
        Supported pause frame use: No
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full 
                                100baseT/Half 100baseT/Full 
        Advertised pause frame use: No
        Advertised auto-negotiation: Yes
        Speed: Unknown!
        Duplex: Unknown! (255)
        Port: MII
        PHYAD: 1
        Transceiver: external
        Auto-negotiation: on
        Supports Wake-on: d
        Wake-on: d
        Current message level: 0x00000000 (0)
                               
        Link detected: no
root@am57xx-evm:~# ethtool eth1
Settings for eth1:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full 
                                100baseT/Half 100baseT/Full 
        Supported pause frame use: No
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full 
                                100baseT/Half 100baseT/Full 
        Advertised pause frame use: No
        Advertised auto-negotiation: Yes
        Speed: 10Mb/s
        Duplex: Half
        Port: MII
        PHYAD: 2
        Transceiver: external
        Auto-negotiation: on
        Supports Wake-on: d
        Wake-on: d
        Current message level: 0x00000000 (0)
                               
        Link detected: no
root@am57xx-evm:~# ethtool eth2
Settings for eth2:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full 
                                100baseT/Half 100baseT/Full 
        Supported pause frame use: No
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full 
                                100baseT/Half 100baseT/Full 
        Advertised pause frame use: No
        Advertised auto-negotiation: Yes
        Link partner advertised link modes:  10baseT/Half 10baseT/Full 
                                             100baseT/Half 100baseT/Full 
        Link partner advertised pause frame use: Symmetric Receive-only
        Link partner advertised auto-negotiation: Yes
        Speed: 100Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 3
        Transceiver: external
        Auto-negotiation: on
        Link detected: yes
root@am57xx-evm:~# ethtool eth3
Settings for eth3:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full 
                                100baseT/Half 100baseT/Full 
        Supported pause frame use: No
        Supports auto-negotiation: Yes
        Advertised link modes:  10baseT/Half 10baseT/Full 
                                100baseT/Half 100baseT/Full 
        Advertised pause frame use: No
        Advertised auto-negotiation: Yes
        Link partner advertised link modes:  10baseT/Half 10baseT/Full 
                                             100baseT/Half 100baseT/Full 
        Link partner advertised pause frame use: Symmetric Receive-only
        Link partner advertised auto-negotiation: Yes
        Speed: 100Mb/s
        Duplex: Full
        Port: MII
        PHYAD: 4
        Transceiver: external
        Auto-negotiation: on
        Link detected: yes
root@am57xx-evm:~# 

/*
 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "dra72x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "am57xx-idk-common.dtsi"
#include "dra72x-mmc-iodelay.dtsi"
#include <dt-bindings/net/ti-dp83867.h>

/ {
	model = "TI AM5718 IDK";
	compatible = "ti,am5718-idk", "ti,am5718", "ti,dra7";

	aliases {
		ethernet2 = &pruss1_emac0;
		ethernet3 = &pruss1_emac1;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x40000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		ipu2_cma_pool: ipu2_cma@95800000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x95800000 0x0 0x3800000>;
			reusable;
			status = "okay";
		};

		dsp1_cma_pool: dsp1_cma@99000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x99000000 0x0 0x4000000>;
			reusable;
			status = "okay";
		};

		ipu1_cma_pool: ipu1_cma@9d000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9d000000 0x0 0x2000000>;
			reusable;
			status = "okay";
		};
	};

	leds {
		status = "okay";
		compatible = "gpio-leds";	

/*
		led0 {
			label = "led518";
			gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
			//linux,default-trigger = "heartbeat";
			default-state = "on";
		};

		led1 {
			label = "led519";
			gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
			
			default-state = "on";
		};
		led2 {
			label = "led511";
			gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>;
			//linux,default-trigger = "heartbeat";
			default-state = "on";
		};
*/
/*
		led2 {
			label = "led2_grn";
			gpios = <&gpio8 18 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "on";
		};
*/
		/*led3 {
			label = "led2_red";
			gpios = <&gpio8 11 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};*/

/*		led4 {
			label = "led3_grn";
			gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "on";
		};

		led5 {
			label = "led3_red";
			gpios = <&gpio8 12 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};

		led6 {
			label = "led4_grn";
			gpios = <&gpio8 13 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "on";
		};

		led7 {
			label = "led4_red";
			gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};

		led8 {
			label = "led5_grn";
			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "on";
		};

		led9 {
			label = "led5_red";
			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
*/
		/*led10 {
			label = "led6_grn";
			gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "on";
		};*/

		led11 {
			label = "led6_red";
			gpios = <&gpio8 15 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};

		/*led12 {
			label = "led7_grn";
			gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "on";
		};

		led13 {
			label = "uS2";
			gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};*/
	
		/*led14 {
			label = "chip_wd";
			gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>;
			
			default-state = "on";
		};*/

		led15 {
			label = "cpld_wd";
			gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
			/*linux,default-trigger = "heartbeat";*/
			default-state = "on";
		};
		/*led16 {
			label = "NORM";
			gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led17 {
			label = "uTST";
			gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led18 {
			label = "dTST";
			gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led19 {
			label = "uS1";
			gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led20 {
			label = "dS1";
			gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led21 {
			label = "dS2";
			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led22 {
			label = "UNORM";
			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};*/
		/*led23 {
			label = "aTX";
			gpios = <&gpio8 0 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led24 {
			label = "bTX";
			gpios = <&gpio8 1 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led25 {
			label = "aRX";
			gpios = <&gpio8 2 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led26 {
			label = "bRX";
			gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led27 {
			label = "cTX";
			gpios = <&gpio8 4 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led28 {
			label = "dTX";
			gpios = <&gpio8 5 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led29 {
			label = "cRX";
			gpios = <&gpio8 6 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led30 {
			label = "dRX";
			gpios = <&gpio8 7 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};*/
		/*led31 {
			label = "uSYN";
			gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};
		led32 {
			label = "dSYN";
			gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
			
			default-state = "off";
		};*/  
		/*
		led33 {
			label = "FPGA1_RST";
			gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
		led34 {
			label = "FPGA2_RST";
			gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
		*/		
	};

	adc_vref:fixedregulator{
		compatible="regulator-fixed";
		regulator-name="fixed-supply";
		regulator-min-microvolt=<5000000>;
		regulator-max-microvolt=<5000000>;
	};

	/* Dual mac ethernet application node on icss2 */
	pruss1_eth: pruss1_eth {
		//status = "disabled";
		compatible = "ti,am57-prueth";
		pruss = <&pruss1>;
		sram = <&ocmcram1>;
		interrupt-parent = <&pruss1_intc>;

		pruss1_emac0: ethernet-mii0 {
			phy-handle = <&pruss1_eth0_phy>;
			phy-mode = "mii";
			interrupts = <20>, <22>, <23>;
			interrupt-names = "rx", "tx", "ptp_tx";
			//Filled in by bootloader //
			local-mac-address = [00 00 00 00 00 00];
		};

		pruss1_emac1: ethernet-mii1 {
			phy-handle = <&pruss1_eth1_phy>;
			phy-mode = "mii";
			interrupts = <21>, <23>, <24>;
			interrupt-names = "rx", "tx", "ptp_tx";
			// Filled in by bootloader //
			local-mac-address = [00 00 00 00 00 00];
		};
	};

};

&mmc1 {
	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
	pinctrl-0 = <&mmc1_pins_default>;
	pinctrl-1 = <&mmc1_pins_hs>;
	pinctrl-2 = <&mmc1_pins_sdr12>;
	pinctrl-3 = <&mmc1_pins_sdr25>;
	pinctrl-4 = <&mmc1_pins_sdr50>;
	pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
};

/*&mmc2 {
	pinctrl-names = "default", "hs", "ddr_1_8v";
	pinctrl-0 = <&mmc2_pins_default>;
	pinctrl-1 = <&mmc2_pins_hs>;
	pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
};*/

&omap_dwc3_2 {
	extcon = <&extcon_usb2>;
};
/*
&extcon_usb2 {
	id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
	vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>;
};
*/
&cpu0 {
	vdd-supply = <&smps12_reg>;
};
/*
&ov2659_1 {
	remote-endpoint = <&vin1b>;
};
*/
&vin1b {
	status = "disabled";

	endpoint@2 {
		slave-mode;
		remote-endpoint = <&ov2659_1>;
	};
};

&vip1 {
	status = "disabled";
};

&mailbox5 {
	status = "okay";
	mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
		status = "okay";
	};
	mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
		status = "okay";
	};
};

&mailbox6 {
	status = "okay";
	mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
		status = "okay";
	};
};

&mmu0_dsp1 {
	status = "okay";
};

&mmu1_dsp1 {
	status = "okay";
};

&mmu_ipu1 {
	status = "okay";
};

&mmu_ipu2 {
	status = "okay";
};

&ipu2 {
	status = "okay";
	memory-region = <&ipu2_cma_pool>;
	mboxes = <&mailbox6 &mbox_ipu2_ipc3x>;
	timers = <&timer3>;
	watchdog-timers = <&timer4>, <&timer9>;
};

&ipu1 {
	status = "okay";
	memory-region = <&ipu1_cma_pool>;
	mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;
	timers = <&timer11>;
	watchdog-timers = <&timer7>, <&timer8>;
};

&dsp1 {
	status = "disabled";
	memory-region = <&dsp1_cma_pool>;
	mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
	timers = <&timer5>;
	watchdog-timers = <&timer10>;
};

&pcie1_rc {
	status = "disabled";
	gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
};

&pcie1_ep {
	/*
	 * To enable PCIe EP functionality, set the status of
	 * this node to "okay" and the status of pcie1_rc node
	 * above to "disabled".
	 */
	status = "disabled";
	gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
};
//add ljb 2024-09-29

&mac {
	status = "okay";
	dual_emac;
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <1>;
	phy-mode = "rgmii-id";
	dual_emac_res_vlan = <1>;
};
	
&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <2>;
	phy-mode = "rgmii-id";
	dual_emac_res_vlan = <2>;
};

&davinci_mdio{
	dp83822_0: ethernet-phy@0 {
		reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
		reset-delay-us = <20>;   
		reg = <1>;
		interrupt-parent = <&gpio5>;
		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
	};
	dp83822_1: ethernet-phy@1 {
		reset-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
		reset-delay-us = <20>;   
		reg = <2>;
		interrupt-parent = <&gpio5>;
		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
	};
};


//add end 
&pruss1_mdio {
	/*status = "disabled";*/
	reset-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
	reset-delay-us = <20>;   /* PHY datasheet states 10uS min */
	pruss1_eth0_phy: ethernet-phy@0 {
		reg = <3>;
		interrupt-parent = <&gpio4>;
		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
	};

	pruss1_eth1_phy: ethernet-phy@1 { 
		reg = <4>;
		interrupt-parent = <&gpio3>;
		interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
	};
};

&pruss2_mdio {
	reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;   // PHY datasheet states 1uS min //

	pruss2_eth0_phy: ethernet-phy@0 {
		reg = <3>;
		//interrupt-parent = <&gpio3>;//
		//interrupts = <28 IRQ_TYPE_EDGE_FALLING>;//
	};

	pruss2_eth1_phy: ethernet-phy@1 {
		reg = <4>;
		//interrupt-parent = <&gpio3>;//
		//interrupts = <29 IRQ_TYPE_EDGE_FALLING>;//
	};

};

&pru1_0 {
	ti,pruss-gp-mux-sel = <4>;	/* MII2, needed for PRUSS1_MII1 */
};

&pru1_1 {
	ti,pruss-gp-mux-sel = <4>;	/* MII2, needed for PRUSS1_MII1 */
};

&pru2_0 {
	ti,pruss-gp-mux-sel = <4>;	/* MII2, needed for PRUSS1_MII0 */
};

&pru2_1 {
	ti,pruss-gp-mux-sel = <4>;	/* MII2, needed for PRUSS1_MII1 */
};

&qspi {
	spi-max-frequency = <76800000>;
	m25p80@0 {
		spi-max-frequency = <76800000>;
	};
};

&i2c2 {
	clock-frequency = <400000>;
	status = "okay";
	
	adc081c021@54{
		compatible="ti,adc121c";
		reg=<0x54>;
		vref-supply=<&adc_vref>;
	};

};

&i2c4 {
	clock-frequency = <400000>;
	status = "okay";
	
	hdc1080@40{
		compatible="ti,hdc1080";
		reg=<0x40>;
	};

	adxl345@53{
		compatible="adi,adxl34x";
		reg=<0x53>;
/*
		interrupt-parent=<&gpio5>;
		interrupts=<4 4>;
*/
	};

};

&uart1 {
	status = "okay";
};

&uart8 {
	status = "okay";
};

&uart9 {
	status = "okay";
};

&uart10 {
	status = "okay";
};

&mcspi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins_default>;
	ti,pindir-d0-out-d1-in;
	#ti,spi-num-cs = <1>;

	spidev1_1{		
		status = "okay";
		compatible="rohm,dh2228fv";
		reg = <1>;
		spi-max-frequency = <20000000>; 
	};
};

/*&mcspi3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi3_pins_default>;
	ti,pindir-d0-out-d1-in;
	#ti,spi-num-cs = <1>;

	spidev3_0{
		status = "okay";
		compatible="rohm,dh2228fv";
		reg = <0>;
		spi-max-frequency = <20000000>; 
	};
};*/

&gpmc {
	pinctrl-names="default";
	pinctrl-0=<&gpmc_pins_cfg>;
	ranges = <0 0 0x02000000 0x01000000>,<3 0 0x08000000 0x01000000>;
	status = "okay"; 
	
	gpmc-sram0@0,0 {
		compatible = "samsung,k6f1616u6a", "mtd-ram";
		linux,mtd-name= "crsc,dru-fpga";			
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0 0 0x01000000>;
		bank-width = <1>;//2023-07-27  --2to1//
		//gpmc,sync-read;
		//gpmc,sync-write;
		gpmc,num-waitpins = <0>;
		gpmc,wait-pin = <0>;
		//gpmc,sync-clk-ps = <10000>;
		gpmc,mux-add-data = <0>;//2023-07-27  --2to0//
		gpmc,device-width = <1>;//2023-07-27  --2to1//
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <100>;
		gpmc,cs-wr-off-ns = <100>;
		gpmc,adv-on-ns = <3>;
		gpmc,adv-rd-off-ns = <25>;
		gpmc,adv-wr-off-ns = <25>;
		gpmc,oe-on-ns = <30>;
		gpmc,oe-off-ns = <90>;
		gpmc,we-on-ns = <30>;
		gpmc,we-off-ns = <90>;
		gpmc,rd-cycle-ns = <108>;
		gpmc,wr-cycle-ns = <108>;
		gpmc,access-ns = <75>;
		//gpmc,wr-access-ns = <40>;
		gpmc,bus-turnaround-ns = <30>;
		gpmc,cycle2cycle-delay-ns = <30>;
		gpmc,wr-data-mux-bus-ns = <30>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-diffcsen;		
	};
	gpmc-sram3@3,0 {
		compatible = "samsung,k6f1616u6a", "mtd-ram";
		linux,mtd-name= "crsc,dru-fpga";			
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <3 0 0x01000000>;
		bank-width = <1>;//2023-07-27  --2to1//
		//gpmc,sync-read;
		//gpmc,sync-write;
		gpmc,num-waitpins = <0>;
		gpmc,wait-pin = <0>;
		//gpmc,sync-clk-ps = <10000>;
		gpmc,mux-add-data = <0>;//2023-07-27  --2to0//
		gpmc,device-width = <1>;//2023-07-27  --2to1//
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <100>;
		gpmc,cs-wr-off-ns = <100>;
		gpmc,adv-on-ns = <3>;
		gpmc,adv-rd-off-ns = <25>;
		gpmc,adv-wr-off-ns = <25>;
		gpmc,oe-on-ns = <30>;
		gpmc,oe-off-ns = <90>;
		gpmc,we-on-ns = <30>;
		gpmc,we-off-ns = <90>;
		gpmc,rd-cycle-ns = <108>;
		gpmc,wr-cycle-ns = <108>;
		gpmc,access-ns = <75>;
		//gpmc,wr-access-ns = <40>;
		gpmc,bus-turnaround-ns = <30>;
		gpmc,cycle2cycle-delay-ns = <30>;
		gpmc,wr-data-mux-bus-ns = <30>;
		gpmc,cycle2cycle-samecsen;
		gpmc,cycle2cycle-diffcsen;		
	};
};
/*
&mac {
	status = "okay";
	dual_emac;
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <1>;
	phy-mode = "rgmii-id";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <2>;
	phy-mode = "rgmii-id";
	dual_emac_res_vlan = <2>;
};

&davinci_mdio {
	dp83867_0: ethernet-phy@1 {
		reg = <1>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
		interrupt-parent = <&gpio5>;
		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
		ti,min-output-impedance;
		ti,dp83867-rxctrl-strap-quirk;
	};

	dp83867_1: ethernet-phy@2 {
		reg = <2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
		interrupt-parent = <&gpio5>;
		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
		ti,min-output-impedance;
		ti,dp83867-rxctrl-strap-quirk;
	};
};
*/

#include "am57xx-evm-cmem-am571x.dtsi"

/*
 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 * Based on "omap4.dtsi"
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/dra.h>

#define MAX_SOURCES 400

/ {
	#address-cells = <2>;
	#size-cells = <2>;

	compatible = "ti,dra7xx";
	interrupt-parent = <&crossbar_mpu>;
	chosen { };

	aliases {
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
		i2c3 = &i2c4;
		i2c4 = &i2c5;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		serial5 = &uart6;
		serial6 = &uart7;
		serial7 = &uart8;
		serial8 = &uart9;
		serial9 = &uart10;
		ethernet0 = &cpsw_emac0;
		ethernet1 = &cpsw_emac1;
		d_can0 = &dcan1;
		d_can1 = &dcan2;
		spi0 = &qspi;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
		interrupt-parent = <&gic>;
	};

	gic: interrupt-controller@48211000 {
		compatible = "arm,cortex-a15-gic";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0x0 0x48211000 0x0 0x1000>,
		      <0x0 0x48212000 0x0 0x1000>,
		      <0x0 0x48214000 0x0 0x2000>,
		      <0x0 0x48216000 0x0 0x2000>;
		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
		interrupt-parent = <&gic>;
	};

	wakeupgen: interrupt-controller@48281000 {
		compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0x0 0x48281000 0x0 0x1000>;
		interrupt-parent = <&gic>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0>;

			operating-points-v2 = <&cpu0_opp_table>;

			clocks = <&dpll_mpu_ck>;
			clock-names = "cpu";

			clock-latency = <300000>; /* From omap-cpufreq driver */

			/* cooling options */
			cooling-min-level = <0>;
			cooling-max-level = <2>;
			#cooling-cells = <2>; /* min followed by max */

			vbb-supply = <&abb_mpu>;
		};
	};

	cpu0_opp_table: opp_table0 {
		compatible = "operating-points-v2-ti-cpu";
		ti,syscon-efuse = <&scm_wkup 0x20c 0xf80000 19>;
		ti,syscon-rev = <&scm_wkup 0x204>;

		opp_nom@1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <1060000 850000 1150000>,
					<1060000 850000 1150000>;
			opp-supported-hw = <0xFF 0x01>;
			opp-suspend;
		};

		opp_od@1176000000 {
			opp-hz = /bits/ 64 <1176000000>;
			opp-microvolt = <1160000 885000 1160000>,
					<1160000 885000 1160000>;

			opp-supported-hw = <0xFF 0x02>;
		};

		opp_high@1500000000 {
			opp-hz = /bits/ 64 <1500000000>;
			opp-microvolt = <1210000 950000 1250000>,
					<1210000 950000 1250000>;
			opp-supported-hw = <0xFF 0x04>;
		};
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap5-mpu";
			ti,hwmods = "mpu";
		};
	};

	/*
	 * XXX: Use a flat representation of the SOC interconnect.
	 * The real OMAP interconnect network is quite complex.
	 * Since it will not bring real advantage to represent that in DT for
	 * the moment, just use a fake OCP bus entry to represent the whole bus
	 * hierarchy.
	 */
	ocp {
		compatible = "ti,dra7-l3-noc", "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x0 0xc0000000>;
		ti,hwmods = "l3_main_1", "l3_main_2";
		reg = <0x0 0x44000000 0x0 0x1000000>,
		      <0x0 0x45000000 0x0 0x1000>;
		interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
				      <&wakeupgen GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

		l4_cfg: l4@4a000000 {
			compatible = "ti,dra7-l4-cfg", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x4a000000 0x22c000>;

			scm: scm@2000 {
				compatible = "ti,dra7-scm-core", "simple-bus";
				reg = <0x2000 0x2000>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x2000 0x2000>;

				scm_conf: scm_conf@0 {
					compatible = "syscon", "simple-bus";
					reg = <0x0 0x1400>;
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0x0 0x1400>;

					pbias_regulator: pbias_regulator@e00 {
						compatible = "ti,pbias-dra7", "ti,pbias-omap";
						reg = <0xe00 0x4>;
						syscon = <&scm_conf>;
						pbias_mmc_reg: pbias_mmc_omap5 {
							regulator-name = "pbias_mmc_omap5";
							regulator-min-microvolt = <1800000>;
							regulator-max-microvolt = <3300000>;
						};
					};

					scm_conf_clocks: clocks {
						#address-cells = <1>;
						#size-cells = <0>;
					};
				};

				dra7_pmx_core: pinmux@1400 {
					compatible = "ti,dra7-padconf",
						     "pinctrl-single";
					reg = <0x1400 0x0468>;
					#address-cells = <1>;
					#size-cells = <0>;
					#pinctrl-cells = <1>;
					#interrupt-cells = <1>;
					interrupt-controller;
					pinctrl-single,register-width = <32>;
					pinctrl-single,function-mask = <0x3fffffff>;
				};

				scm_conf1: scm_conf@1c04 {
					compatible = "syscon";
					reg = <0x1c04 0x0020>;
				};

				scm_conf_pcie: scm_conf@1c24 {
					compatible = "syscon";
					reg = <0x1c24 0x0024>;
				};

				sdma_xbar: dma-router@b78 {
					compatible = "ti,dra7-dma-crossbar";
					reg = <0xb78 0xfc>;
					#dma-cells = <1>;
					dma-requests = <205>;
					ti,dma-safe-map = <0>;
					dma-masters = <&sdma>;
				};

				edma_xbar: dma-router@c78 {
					compatible = "ti,dra7-dma-crossbar";
					reg = <0xc78 0x7c>;
					#dma-cells = <2>;
					dma-requests = <204>;
					ti,dma-safe-map = <0>;
					dma-masters = <&edma>;
				};
			};

			cm_core_aon: cm_core_aon@5000 {
				compatible = "ti,dra7-cm-core-aon";
				reg = <0x5000 0x2000>;

				cm_core_aon_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				cm_core_aon_clockdomains: clockdomains {
				};
			};

			cm_core: cm_core@8000 {
				compatible = "ti,dra7-cm-core";
				reg = <0x8000 0x3000>;

				cm_core_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				cm_core_clockdomains: clockdomains {
				};
			};
		};

		l4_wkup: l4@4ae00000 {
			compatible = "ti,dra7-l4-wkup", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x4ae00000 0x3f000>;

			counter32k: counter@4000 {
				compatible = "ti,omap-counter32k";
				reg = <0x4000 0x40>;
				ti,hwmods = "counter_32k";
			};

			prm: prm@6000 {
				compatible = "ti,dra7-prm";
				reg = <0x6000 0x3000>;
				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

				prm_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				prm_clockdomains: clockdomains {
				};
			};

			scm_wkup: scm_conf@c000 {
				compatible = "syscon";
				reg = <0xc000 0x1000>;
			};
		};

		axi@0 {
			compatible = "simple-bus";
			#size-cells = <1>;
			#address-cells = <1>;
			ranges = <0x51000000 0x51000000 0x3000
				  0x0	     0x20000000 0x10000000>;
			/**
			 * To enable PCI endpoint mode, disable the pcie1_rc
			 * node and enable pcie1_ep mode.
			 */
			pcie1_rc: pcie@51000000 {
				reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
				reg-names = "rc_dbics", "ti_conf", "config";
				interrupts = <0 232 0x4>, <0 233 0x4>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				ranges = <0x81000000 0 0          0x03000 0 0x00010000
					  0x82000000 0 0x20013000 0x13000 0 0xffed000>;
				#interrupt-cells = <1>;
				num-lanes = <1>;
				linux,pci-domain = <0>;
				ti,hwmods = "pcie1";
				phys = <&pcie1_phy>;
				phy-names = "pcie-phy0";
				syscon-lane-conf = <&scm_conf 0x558>;
				syscon-lane-sel = <&scm_conf_pcie 0x18>;
				interrupt-map-mask = <0 0 0 7>;
				interrupt-map = <0 0 0 1 &pcie1_intc 1>,
						<0 0 0 2 &pcie1_intc 2>,
						<0 0 0 3 &pcie1_intc 3>,
						<0 0 0 4 &pcie1_intc 4>;
				status = "disabled";
				pcie1_intc: interrupt-controller {
					interrupt-controller;
					#address-cells = <0>;
					#interrupt-cells = <1>;
				};
			};

			pcie1_ep: pcie_ep@51000000 {
				reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
				reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
				interrupts = <0 232 0x4>;
				num-lanes = <1>;
				num-ib-windows = <4>;
				num-ob-windows = <16>;
				ti,hwmods = "pcie1";
				phys = <&pcie1_phy>;
				phy-names = "pcie-phy0";
				syscon-legacy-mode = <&scm_conf1 0x14 2>;
				status = "disabled";
			};
		};

		axi@1 {
			compatible = "simple-bus";
			#size-cells = <1>;
			#address-cells = <1>;
			ranges = <0x51800000 0x51800000 0x3000
				  0x0	     0x30000000 0x10000000>;
			status = "disabled";
			pcie2_rc: pcie@51800000 {
				reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
				reg-names = "rc_dbics", "ti_conf", "config";
				interrupts = <0 355 0x4>, <0 356 0x4>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				ranges = <0x81000000 0 0          0x03000 0 0x00010000
					  0x82000000 0 0x30013000 0x13000 0 0xffed000>;
				#interrupt-cells = <1>;
				num-lanes = <1>;
				linux,pci-domain = <1>;
				ti,hwmods = "pcie2";
				phys = <&pcie2_phy>;
				phy-names = "pcie-phy0";
				interrupt-map-mask = <0 0 0 7>;
				interrupt-map = <0 0 0 1 &pcie2_intc 1>,
						<0 0 0 2 &pcie2_intc 2>,
						<0 0 0 3 &pcie2_intc 3>,
						<0 0 0 4 &pcie2_intc 4>;
				pcie2_intc: interrupt-controller {
					interrupt-controller;
					#address-cells = <0>;
					#interrupt-cells = <1>;
				};
			};
		};

		ocmcram1: ocmcram@40300000 {
			compatible = "mmio-sram";
			reg = <0x40300000 0x80000>;
			ranges = <0x0 0x40300000 0x80000>;
			#address-cells = <1>;
			#size-cells = <1>;
			/*
			 * This is a placeholder for an optional reserved
			 * region for use by secure software. The size
			 * of this region is not known until runtime so it
			 * is set as zero to either be updated to reserve
			 * space or left unchanged to leave all SRAM for use.
			 * On HS parts that that require the reserved region
			 * either the bootloader can update the size to
			 * the required amount or the node can be overridden
			 * from the board dts file for the secure platform.
			 */
			sram-hs@0 {
				compatible = "ti,secure-ram";
				reg = <0x0 0x0>;
			};
		};

		/*
		 * NOTE: ocmcram2 and ocmcram3 are not available on all
		 * DRA7xx and AM57xx variants. Confirm availability in
		 * the data manual for the exact part number in use
		 * before enabling these nodes in the board dts file.
		 */
		ocmcram2: ocmcram@40400000 {
			status = "disabled";
			compatible = "mmio-sram";
			reg = <0x40400000 0x100000>;
			ranges = <0x0 0x40400000 0x100000>;
			#address-cells = <1>;
			#size-cells = <1>;
		};

		ocmcram3: ocmcram@40500000 {
			status = "disabled";
			compatible = "mmio-sram";
			reg = <0x40500000 0x100000>;
			ranges = <0x0 0x40500000 0x100000>;
			#address-cells = <1>;
			#size-cells = <1>;
		};

		bandgap: bandgap@4a0021e0 {
			reg = <0x4a0021e0 0xc
				0x4a00232c 0xc
				0x4a002380 0x2c
				0x4a0023C0 0x3c
				0x4a002564 0x8
				0x4a002574 0x50>;
				compatible = "ti,dra752-bandgap";
				interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
				#thermal-sensor-cells = <1>;
		};

		dsp1_system: dsp_system@40d00000 {
			compatible = "syscon";
			reg = <0x40d00000 0x100>;
		};

		dra7_iodelay_core: padconf@4844a000 {
			compatible = "ti,dra7-iodelay";
			reg = <0x4844a000 0x0d1c>;
			#address-cells = <1>;
			#size-cells = <0>;
			#pinctrl-cells = <2>;
		};

		sdma: dma-controller@4a056000 {
			compatible = "ti,omap4430-sdma";
			reg = <0x4a056000 0x1000>;
			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
			#dma-cells = <1>;
			dma-channels = <32>;
			dma-requests = <127>;
		};

		edma: edma@43300000 {
			compatible = "ti,edma3-tpcc";
			ti,hwmods = "tpcc";
			reg = <0x43300000 0x100000>;
			reg-names = "edma3_cc";
			interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "edma3_ccint", "edma3_mperr",
					  "edma3_ccerrint";
			dma-requests = <64>;
			#dma-cells = <2>;

			ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 0>;

			/*
			 * memcpy is disabled, can be enabled with:
			 * ti,edma-memcpy-channels = <20 21>;
			 * for example. Note that these channels need to be
			 * masked in the xbar as well.
			 */
		};

		edma_tptc0: tptc@43400000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc0";
			reg =	<0x43400000 0x100000>;
			interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc1: tptc@43500000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc1";
			reg =	<0x43500000 0x100000>;
			interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "edma3_tcerrint";
		};

		gpio1: gpio@4ae10000 {
			compatible = "ti,omap4-gpio";
			reg = <0x4ae10000 0x200>;
			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio2: gpio@48055000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48055000 0x200>;
			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio3: gpio@48057000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48057000 0x200>;
			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio4: gpio@48059000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48059000 0x200>;
			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio5: gpio@4805b000 {
			compatible = "ti,omap4-gpio";
			reg = <0x4805b000 0x200>;
			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "gpio5";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio6: gpio@4805d000 {
			compatible = "ti,omap4-gpio";
			reg = <0x4805d000 0x200>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "gpio6";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio7: gpio@48051000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48051000 0x200>;
			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "gpio7";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio8: gpio@48053000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48053000 0x200>;
			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "gpio8";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		uart1: serial@4806a000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x4806a000 0x100>;
			interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart1";
			clock-frequency = <48000000>;
			status = "disabled";
			dmas = <&sdma_xbar 49>, <&sdma_xbar 50>;
			dma-names = "tx", "rx";
		};

		uart2: serial@4806c000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x4806c000 0x100>;
			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart2";
			clock-frequency = <48000000>;
			status = "disabled";
			dmas = <&sdma_xbar 51>, <&sdma_xbar 52>;
			dma-names = "tx", "rx";
		};

		uart3: serial@48020000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48020000 0x100>;
			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart3";
			clock-frequency = <48000000>;
			status = "disabled";
			dmas = <&sdma_xbar 53>, <&sdma_xbar 54>;
			dma-names = "tx", "rx";
		};

		uart4: serial@4806e000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x4806e000 0x100>;
			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart4";
			clock-frequency = <48000000>;
                        status = "disabled";
			dmas = <&sdma_xbar 55>, <&sdma_xbar 56>;
			dma-names = "tx", "rx";
		};

		uart5: serial@48066000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48066000 0x100>;
			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart5";
			clock-frequency = <48000000>;
			status = "disabled";
			dmas = <&sdma_xbar 63>, <&sdma_xbar 64>;
			dma-names = "tx", "rx";
		};

		uart6: serial@48068000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48068000 0x100>;
			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart6";
			clock-frequency = <48000000>;
			status = "disabled";
			dmas = <&sdma_xbar 79>, <&sdma_xbar 80>;
			dma-names = "tx", "rx";
		};

		uart7: serial@48420000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48420000 0x100>;
			interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart7";
			clock-frequency = <48000000>;
			status = "disabled";
		};

		uart8: serial@48422000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48422000 0x100>;
			interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart8";
			clock-frequency = <48000000>;
			status = "disabled";
		};

		uart9: serial@48424000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48424000 0x100>;
			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart9";
			clock-frequency = <48000000>;
			status = "disabled";
		};

		uart10: serial@4ae2b000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x4ae2b000 0x100>;
			interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "uart10";
			clock-frequency = <48000000>;
			status = "disabled";
		};

		mailbox1: mailbox@4a0f4000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4a0f4000 0x200>;
			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox1";
			#mbox-cells = <1>;
			ti,mbox-num-users = <3>;
			ti,mbox-num-fifos = <8>;
			status = "disabled";
		};

		mailbox2: mailbox@4883a000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4883a000 0x200>;
			interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox2";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox3: mailbox@4883c000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4883c000 0x200>;
			interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox3";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox4: mailbox@4883e000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4883e000 0x200>;
			interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox4";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox5: mailbox@48840000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48840000 0x200>;
			interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox5";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox6: mailbox@48842000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48842000 0x200>;
			interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox6";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox7: mailbox@48844000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48844000 0x200>;
			interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox7";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox8: mailbox@48846000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48846000 0x200>;
			interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox8";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox9: mailbox@4885e000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4885e000 0x200>;
			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox9";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox10: mailbox@48860000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48860000 0x200>;
			interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox10";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox11: mailbox@48862000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48862000 0x200>;
			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox11";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox12: mailbox@48864000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48864000 0x200>;
			interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox12";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		mailbox13: mailbox@48802000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48802000 0x200>;
			interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mailbox13";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			status = "disabled";
		};

		timer1: timer@4ae18000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4ae18000 0x80>;
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48032000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48032000 0x80>;
			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48034000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48034000 0x80>;
			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48036000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48036000 0x80>;
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer4";
		};

		timer5: timer@48820000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48820000 0x80>;
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer5";
		};

		timer6: timer@48822000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48822000 0x80>;
			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer6";
		};

		timer7: timer@48824000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48824000 0x80>;
			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer7";
		};

		timer8: timer@48826000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48826000 0x80>;
			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer8";
		};

		timer9: timer@4803e000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4803e000 0x80>;
			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer9";
		};

		timer10: timer@48086000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48086000 0x80>;
			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer10";
		};

		timer11: timer@48088000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48088000 0x80>;
			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer11";
		};

		timer12: timer@4ae20000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4ae20000 0x80>;
			interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer12";
			ti,timer-alwon;
			ti,timer-secure;
		};

		timer13: timer@48828000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48828000 0x80>;
			interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer13";
		};

		timer14: timer@4882a000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4882a000 0x80>;
			interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer14";
		};

		timer15: timer@4882c000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4882c000 0x80>;
			interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer15";
		};

		timer16: timer@4882e000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4882e000 0x80>;
			interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "timer16";
		};

		wdt2: wdt@4ae14000 {
			compatible = "ti,omap3-wdt";
			reg = <0x4ae14000 0x80>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "wd_timer2";
		};

		hwspinlock: spinlock@4a0f6000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x4a0f6000 0x1000>;
			ti,hwmods = "spinlock";
			#hwlock-cells = <1>;
		};

		dmm@4e000000 {
			compatible = "ti,dra7-dmm", "ti,omap5-dmm";
			reg = <0x4e000000 0x800>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "dmm";
		};

		ipu1: ipu@58820000 {
			compatible = "ti,dra7-ipu";
			reg = <0x58820000 0x10000>;
			reg-names = "l2ram";
			ti,hwmods = "ipu1";
			iommus = <&mmu_ipu1>;
			ti,rproc-standby-info = <0x4a005520>;
			status = "disabled";
		};

		ipu2: ipu@55020000 {
			compatible = "ti,dra7-ipu";
			reg = <0x55020000 0x10000>;
			reg-names = "l2ram";
			ti,hwmods = "ipu2";
			iommus = <&mmu_ipu2>;
			ti,rproc-standby-info = <0x4a008920>;
			status = "disabled";
		};

		dsp1: dsp@40800000 {
			compatible = "ti,dra7-dsp";
			reg = <0x40800000 0x48000>,
			      <0x40e00000 0x8000>,
			      <0x40f00000 0x8000>;
			reg-names = "l2ram", "l1pram", "l1dram";
			ti,hwmods = "dsp1";
			syscon-bootreg = <&scm_conf 0x55c>;
			iommus = <&mmu0_dsp1>, <&mmu1_dsp1>;
			ti,rproc-standby-info = <0x4a005420>;
			status = "disabled";
		};

		i2c1: i2c@48070000 {
			compatible = "ti,omap4-i2c";
			reg = <0x48070000 0x100>;
			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c1";
			status = "disabled";
		};

		i2c2: i2c@48072000 {
			compatible = "ti,omap4-i2c";
			reg = <0x48072000 0x100>;
			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c2";
			status = "disabled";
		};

		i2c3: i2c@48060000 {
			compatible = "ti,omap4-i2c";
			reg = <0x48060000 0x100>;
			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c3";
			status = "disabled";
		};

		i2c4: i2c@4807a000 {
			compatible = "ti,omap4-i2c";
			reg = <0x4807a000 0x100>;
			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c4";
			status = "disabled";
		};

		i2c5: i2c@4807c000 {
			compatible = "ti,omap4-i2c";
			reg = <0x4807c000 0x100>;
			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c5";
			status = "disabled";
		};

		mmc1: mmc@4809c000 {
			compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
			reg = <0x4809c000 0x400>;
			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mmc1";
			ti,dual-volt;
			ti,needs-special-reset;
			dmas = <&sdma_xbar 61>, <&sdma_xbar 62>;
			dma-names = "tx", "rx";
			status = "disabled";
			pbias-supply = <&pbias_mmc_reg>;
			max-frequency = <192000000>;
			sd-uhs-sdr104;
			sd-uhs-sdr50;
			sd-uhs-ddr50;
			sd-uhs-sdr25;
			sd-uhs-sdr12;
		};

		mmc2: mmc@480b4000 {
			compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
			reg = <0x480b4000 0x400>;
			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mmc2";
			ti,needs-special-reset;
			dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
			dma-names = "tx", "rx";
			status = "disabled";
			max-frequency = <192000000>;
			sd-uhs-sdr25;
			sd-uhs-sdr12;
			mmc-hs200-1_8v;
			mmc-ddr-1_8v;
		};

		mmc3: mmc@480ad000 {
			compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
			reg = <0x480ad000 0x400>;
			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mmc3";
			ti,needs-special-reset;
			dmas = <&sdma_xbar 77>, <&sdma_xbar 78>;
			dma-names = "tx", "rx";
			status = "disabled";
			/* Errata i887 limits max-frequency of MMC3 to 64 MHz */
			max-frequency = <64000000>;
			sd-uhs-sdr12;
			sd-uhs-sdr25;
			sd-uhs-sdr50;
		};

		mmc4: mmc@480d1000 {
			compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
			reg = <0x480d1000 0x400>;
			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mmc4";
			ti,needs-special-reset;
			dmas = <&sdma_xbar 57>, <&sdma_xbar 58>;
			dma-names = "tx", "rx";
			status = "disabled";
			max-frequency = <192000000>;
			sd-uhs-sdr12;
			sd-uhs-sdr25;
		};

		mmu0_dsp1: mmu@40d01000 {
			compatible = "ti,dra7-dsp-iommu";
			reg = <0x40d01000 0x100>;
			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mmu0_dsp1";
			#iommu-cells = <0>;
			ti,syscon-mmuconfig = <&dsp1_system 0x0>;
			status = "disabled";
		};

		mmu1_dsp1: mmu@40d02000 {
			compatible = "ti,dra7-dsp-iommu";
			reg = <0x40d02000 0x100>;
			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mmu1_dsp1";
			#iommu-cells = <0>;
			ti,syscon-mmuconfig = <&dsp1_system 0x1>;
			status = "disabled";
		};

		mmu_ipu1: mmu@58882000 {
			compatible = "ti,dra7-iommu";
			reg = <0x58882000 0x100>;
			interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mmu_ipu1";
			#iommu-cells = <0>;
			ti,iommu-bus-err-back;
			status = "disabled";
		};

		mmu_ipu2: mmu@55082000 {
			compatible = "ti,dra7-iommu";
			reg = <0x55082000 0x100>;
			interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "mmu_ipu2";
			#iommu-cells = <0>;
			ti,iommu-bus-err-back;
			status = "disabled";
		};

		pruss_soc_bus1: pruss_soc_bus@4b226000 {
			compatible = "ti,am5728-pruss-soc-bus";
			reg = <0x4b226000 0x2000>;
			ti,hwmods = "pruss1";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			status = "disabled";

			pruss1: pruss@4b200000 {
				compatible = "ti,am5728-pruss";
				reg = <0x4b200000 0x2000>,
				      <0x4b202000 0x2000>,
				      <0x4b210000 0x8000>,
				      <0x4b226000 0x2000>,
				      <0x4b22e000 0x31c>,
				      <0x4b232000 0x58>;
				reg-names = "dram0", "dram1", "shrdram2", "cfg",
					    "iep", "mii_rt";
				#address-cells = <1>;
				#size-cells = <1>;
				ranges;
				status = "disabled";

				pruss1_intc: intc@4b220000 {
					compatible = "ti,am5728-pruss-intc";
					reg = <0x4b220000 0x2000>;
					reg-names = "intc";
					interrupts =
					     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
					interrupt-names = "host2", "host3",
							  "host4", "host5",
							  "host6", "host7",
							  "host8", "host9";
					interrupt-controller;
					#interrupt-cells = <1>;
				};

				pru1_0: pru@4b234000 {
					compatible = "ti,am5728-pru";
					reg = <0x4b234000 0x3000>,
					      <0x4b222000 0x400>,
					      <0x4b222400 0x100>;
					reg-names = "iram", "control", "debug";
					label = "pru0";
					status = "disabled";
				};

				pru1_1: pru@4b238000 {
					compatible = "ti,am5728-pru";
					reg = <0x4b238000 0x3000>,
					      <0x4b224000 0x400>,
					      <0x4b224400 0x100>;
					reg-names = "iram", "control", "debug";
					label = "pru1";
					status = "disabled";
				};

				pruss1_mdio: mdio@4b232400 {
					compatible = "ti,davinci_mdio";
					#address-cells = <1>;
					#size-cells = <0>;
					clocks = <&dpll_gmac_h13x2_ck>;
					clock-names = "fck";
					bus_freq = <1000000>;
					reg = <0x4b232400 0x90>;
					status = "disabled";
				};
			};
		};

		pruss_soc_bus2: pruss_soc_bus@4b2a6000 {
			compatible = "ti,am5728-pruss-soc-bus";
			reg = <0x4b2a6000 0x2000>;
			ti,hwmods = "pruss2";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			status = "disabled";

			pruss2: pruss@4b280000 {
				compatible = "ti,am5728-pruss";
				reg = <0x4b280000 0x2000>,
				      <0x4b282000 0x2000>,
				      <0x4b290000 0x8000>,
				      <0x4b2a6000 0x2000>,
				      <0x4b2ae000 0x31c>,
				      <0x4b2b2000 0x58>;
				reg-names = "dram0", "dram1", "shrdram2", "cfg",
					    "iep", "mii_rt";
				#address-cells = <1>;
				#size-cells = <1>;
				ranges;
				status = "disabled";

				pruss2_intc: intc@4b2a0000 {
					compatible = "ti,am5728-pruss-intc";
					reg = <0x4b2a0000 0x2000>;
					reg-names = "intc";
					interrupts =
					     <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
					interrupt-names = "host2", "host3",
							  "host4", "host5",
							  "host6", "host7",
							  "host8", "host9";
					interrupt-controller;
					#interrupt-cells = <1>;
				};

				pru2_0: pru@4b2b4000 {
					compatible = "ti,am5728-pru";
					reg = <0x4b2b4000 0x3000>,
					      <0x4b2a2000 0x400>,
					      <0x4b2a2400 0x100>;
					reg-names = "iram", "control", "debug";
					label = "pru0";
					status = "disabled";
				};

				pru2_1: pru@4b2b8000 {
					compatible = "ti,am5728-pru";
					reg = <0x4b2b8000 0x3000>,
					      <0x4b2a4000 0x400>,
					      <0x4b2a4400 0x100>;
					reg-names = "iram", "control", "debug";
					label = "pru1";
					status = "disabled";
				};

				pruss2_mdio: mdio@4b2b2400 {
					compatible = "ti,davinci_mdio";
					#address-cells = <1>;
					#size-cells = <0>;
					clocks = <&dpll_gmac_h13x2_ck>;
					clock-names = "fck";
					bus_freq = <1000000>;
					reg = <0x4b2b2400 0x90>;
					status = "disabled";
				};
			};
		};

		abb_mpu: regulator-abb-mpu {
			compatible = "ti,abb-v3";
			regulator-name = "abb_mpu";
			#address-cells = <0>;
			#size-cells = <0>;
			clocks = <&sys_clkin1>;
			ti,settling-time = <50>;
			ti,clock-cycles = <16>;

			reg = <0x4ae07ddc 0x4>, <0x4ae07de0 0x4>,
			      <0x4ae06014 0x4>, <0x4a003b20 0xc>,
			      <0x4ae0c158 0x4>;
			reg-names = "setup-address", "control-address",
				    "int-address", "efuse-address",
				    "ldo-address";
			ti,tranxdone-status-mask = <0x80>;
			/* LDOVBBMPU_FBB_MUX_CTRL */
			ti,ldovbb-override-mask = <0x400>;
			/* LDOVBBMPU_FBB_VSET_OUT */
			ti,ldovbb-vset-mask = <0x1F>;

			/*
			 * NOTE: only FBB mode used but actual vset will
			 * determine final biasing
			 */
			ti,abb_info = <
			/*uV		ABB	efuse	rbb_m fbb_m	vset_m*/
			1060000		0	0x0	0 0x02000000 0x01F00000
			1160000		0	0x4	0 0x02000000 0x01F00000
			1210000		0	0x8	0 0x02000000 0x01F00000
			>;
		};

		abb_ivahd: regulator-abb-ivahd {
			compatible = "ti,abb-v3";
			regulator-name = "abb_ivahd";
			#address-cells = <0>;
			#size-cells = <0>;
			clocks = <&sys_clkin1>;
			ti,settling-time = <50>;
			ti,clock-cycles = <16>;

			reg = <0x4ae07e34 0x4>, <0x4ae07e24 0x4>,
			      <0x4ae06010 0x4>, <0x4a0025cc 0xc>,
			      <0x4a002470 0x4>;
			reg-names = "setup-address", "control-address",
				    "int-address", "efuse-address",
				    "ldo-address";
			ti,tranxdone-status-mask = <0x40000000>;
			/* LDOVBBIVA_FBB_MUX_CTRL */
			ti,ldovbb-override-mask = <0x400>;
			/* LDOVBBIVA_FBB_VSET_OUT */
			ti,ldovbb-vset-mask = <0x1F>;

			/*
			 * NOTE: only FBB mode used but actual vset will
			 * determine final biasing
			 */
			ti,abb_info = <
			/*uV		ABB	efuse	rbb_m fbb_m	vset_m*/
			1055000		0	0x0	0 0x02000000 0x01F00000
			1150000		0	0x4	0 0x02000000 0x01F00000
			1250000		0	0x8	0 0x02000000 0x01F00000
			>;
		};

		abb_dspeve: regulator-abb-dspeve {
			compatible = "ti,abb-v3";
			regulator-name = "abb_dspeve";
			#address-cells = <0>;
			#size-cells = <0>;
			clocks = <&sys_clkin1>;
			ti,settling-time = <50>;
			ti,clock-cycles = <16>;

			reg = <0x4ae07e30 0x4>, <0x4ae07e20 0x4>,
			      <0x4ae06010 0x4>, <0x4a0025e0 0xc>,
			      <0x4a00246c 0x4>;
			reg-names = "setup-address", "control-address",
				    "int-address", "efuse-address",
				    "ldo-address";
			ti,tranxdone-status-mask = <0x20000000>;
			/* LDOVBBDSPEVE_FBB_MUX_CTRL */
			ti,ldovbb-override-mask = <0x400>;
			/* LDOVBBDSPEVE_FBB_VSET_OUT */
			ti,ldovbb-vset-mask = <0x1F>;

			/*
			 * NOTE: only FBB mode used but actual vset will
			 * determine final biasing
			 */
			ti,abb_info = <
			/*uV		ABB	efuse	rbb_m fbb_m	vset_m*/
			1055000		0	0x0	0 0x02000000 0x01F00000
			1150000		0	0x4	0 0x02000000 0x01F00000
			1250000		0	0x8	0 0x02000000 0x01F00000
			>;
		};

		abb_gpu: regulator-abb-gpu {
			compatible = "ti,abb-v3";
			regulator-name = "abb_gpu";
			#address-cells = <0>;
			#size-cells = <0>;
			clocks = <&sys_clkin1>;
			ti,settling-time = <50>;
			ti,clock-cycles = <16>;

			reg = <0x4ae07de4 0x4>, <0x4ae07de8 0x4>,
			      <0x4ae06010 0x4>, <0x4a003b08 0xc>,
			      <0x4ae0c154 0x4>;
			reg-names = "setup-address", "control-address",
				    "int-address", "efuse-address",
				    "ldo-address";
			ti,tranxdone-status-mask = <0x10000000>;
			/* LDOVBBGPU_FBB_MUX_CTRL */
			ti,ldovbb-override-mask = <0x400>;
			/* LDOVBBGPU_FBB_VSET_OUT */
			ti,ldovbb-vset-mask = <0x1F>;

			/*
			 * NOTE: only FBB mode used but actual vset will
			 * determine final biasing
			 */
			ti,abb_info = <
			/*uV		ABB	efuse	rbb_m fbb_m	vset_m*/
			1090000		0	0x0	0 0x02000000 0x01F00000
			1210000		0	0x4	0 0x02000000 0x01F00000
			1280000		0	0x8	0 0x02000000 0x01F00000
			>;
		};

		mcspi1: spi@48098000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x48098000 0x200>;
			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi1";
			ti,spi-num-cs = <4>;
			dmas = <&sdma_xbar 35>,
			       <&sdma_xbar 36>,
			       <&sdma_xbar 37>,
			       <&sdma_xbar 38>,
			       <&sdma_xbar 39>,
			       <&sdma_xbar 40>,
			       <&sdma_xbar 41>,
			       <&sdma_xbar 42>;
			dma-names = "tx0", "rx0", "tx1", "rx1",
				    "tx2", "rx2", "tx3", "rx3";
			status = "disabled";
		};

		mcspi2: spi@4809a000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x4809a000 0x200>;
			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi2";
			ti,spi-num-cs = <2>;
			dmas = <&sdma_xbar 43>,
			       <&sdma_xbar 44>,
			       <&sdma_xbar 45>,
			       <&sdma_xbar 46>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		mcspi3: spi@480b8000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x480b8000 0x200>;
			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi3";
			ti,spi-num-cs = <2>;
			dmas = <&sdma_xbar 15>, <&sdma_xbar 16>;
			dma-names = "tx0", "rx0";
			status = "disabled";
		};

		mcspi4: spi@480ba000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x480ba000 0x200>;
			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "mcspi4";
			ti,spi-num-cs = <1>;
			dmas = <&sdma_xbar 70>, <&sdma_xbar 71>;
			dma-names = "tx0", "rx0";
			status = "disabled";
		};

		qspi: qspi@4b300000 {
			compatible = "ti,dra7xxx-qspi";
			reg = <0x4b300000 0x100>,
			      <0x5c000000 0x4000000>;
			reg-names = "qspi_base", "qspi_mmap";
			syscon-chipselects = <&scm_conf 0x558>;
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "qspi";
			clocks = <&qspi_gfclk_div>;
			clock-names = "fck";
			num-cs = <4>;
			interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";
		};

		/* OCP2SCP3 */
		ocp2scp@4a090000 {
			compatible = "ti,omap-ocp2scp";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			reg = <0x4a090000 0x20>;
			ti,hwmods = "ocp2scp3";
			sata_phy: phy@4A096000 {
				compatible = "ti,phy-pipe3-sata";
				reg = <0x4A096000 0x80>, /* phy_rx */
				      <0x4A096400 0x64>, /* phy_tx */
				      <0x4A096800 0x40>; /* pll_ctrl */
				reg-names = "phy_rx", "phy_tx", "pll_ctrl";
				syscon-phy-power = <&scm_conf 0x374>;
				clocks = <&sys_clkin1>, <&sata_ref_clk>;
				clock-names = "sysclk", "refclk";
				syscon-pllreset = <&scm_conf 0x3fc>;
				#phy-cells = <0>;
			};

			pcie1_phy: pciephy@4a094000 {
				compatible = "ti,phy-pipe3-pcie";
				reg = <0x4a094000 0x80>, /* phy_rx */
				      <0x4a094400 0x64>; /* phy_tx */
				reg-names = "phy_rx", "phy_tx";
				syscon-phy-power = <&scm_conf_pcie 0x1c>;
				syscon-pcs = <&scm_conf_pcie 0x10>;
				clocks = <&dpll_pcie_ref_ck>,
					 <&dpll_pcie_ref_m2ldo_ck>,
					 <&optfclk_pciephy1_32khz>,
					 <&optfclk_pciephy1_clk>,
					 <&optfclk_pciephy1_div_clk>,
					 <&optfclk_pciephy_div>,
					 <&sys_clkin1>;
				clock-names = "dpll_ref", "dpll_ref_m2",
					      "wkupclk", "refclk",
					      "div-clk", "phy-div", "sysclk";
				#phy-cells = <0>;
			};

			pcie2_phy: pciephy@4a095000 {
				compatible = "ti,phy-pipe3-pcie";
				reg = <0x4a095000 0x80>, /* phy_rx */
				      <0x4a095400 0x64>; /* phy_tx */
				reg-names = "phy_rx", "phy_tx";
				syscon-phy-power = <&scm_conf_pcie 0x20>;
				syscon-pcs = <&scm_conf_pcie 0x10>;
				clocks = <&dpll_pcie_ref_ck>,
					 <&dpll_pcie_ref_m2ldo_ck>,
					 <&optfclk_pciephy2_32khz>,
					 <&optfclk_pciephy2_clk>,
					 <&optfclk_pciephy2_div_clk>,
					 <&optfclk_pciephy_div>,
					 <&sys_clkin1>;
				clock-names = "dpll_ref", "dpll_ref_m2",
					      "wkupclk", "refclk",
					      "div-clk", "phy-div", "sysclk";
				#phy-cells = <0>;
				status = "disabled";
			};
		};

		sata: sata@4a141100 {
			compatible = "snps,dwc-ahci";
			reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
			phys = <&sata_phy>;
			phy-names = "sata-phy";
			clocks = <&sata_ref_clk>;
			ti,hwmods = "sata";
			ports-implemented = <0x1>;
		};

		rtc: rtc@48838000 {
			compatible = "ti,am3352-rtc";
			reg = <0x48838000 0x100>;
			interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "rtcss";
			clocks = <&sys_32k_ck>;
		};

		/* OCP2SCP1 */
		ocp2scp@4a080000 {
			compatible = "ti,omap-ocp2scp";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			reg = <0x4a080000 0x20>;
			ti,hwmods = "ocp2scp1";

			usb2_phy1: phy@4a084000 {
				compatible = "ti,dra7x-usb2", "ti,omap-usb2";
				reg = <0x4a084000 0x400>;
				syscon-phy-power = <&scm_conf 0x300>;
				clocks = <&usb_phy1_always_on_clk32k>,
					 <&usb_otg_ss1_refclk960m>;
				clock-names =	"wkupclk",
						"refclk";
				#phy-cells = <0>;
			};

			usb2_phy2: phy@4a085000 {
				compatible = "ti,dra7x-usb2-phy2",
					     "ti,omap-usb2";
				reg = <0x4a085000 0x400>;
				syscon-phy-power = <&scm_conf 0xe74>;
				clocks = <&usb_phy2_always_on_clk32k>,
					 <&usb_otg_ss2_refclk960m>;
				clock-names =	"wkupclk",
						"refclk";
				#phy-cells = <0>;
			};

			usb3_phy1: phy@4a084400 {
				compatible = "ti,omap-usb3";
				reg = <0x4a084400 0x80>,
				      <0x4a084800 0x64>,
				      <0x4a084c00 0x40>;
				reg-names = "phy_rx", "phy_tx", "pll_ctrl";
				syscon-phy-power = <&scm_conf 0x370>;
				clocks = <&usb_phy3_always_on_clk32k>,
					 <&sys_clkin1>,
					 <&usb_otg_ss1_refclk960m>;
				clock-names =	"wkupclk",
						"sysclk",
						"refclk";
				#phy-cells = <0>;
			};
		};

		omap_dwc3_1: omap_dwc3_1@48880000 {
			compatible = "ti,dwc3";
			ti,hwmods = "usb_otg_ss1";
			reg = <0x48880000 0x10000>;
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <1>;
			utmi-mode = <2>;
			ranges;
			usb1: usb@48890000 {
				compatible = "snps,dwc3";
				reg = <0x48890000 0x17000>;
				interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "peripheral",
						  "host",
						  "otg";
				phys = <&usb2_phy1>, <&usb3_phy1>;
				phy-names = "usb2-phy", "usb3-phy";
				maximum-speed = "super-speed";
				dr_mode = "otg";
				snps,dis_u3_susphy_quirk;
				snps,dis_u2_susphy_quirk;
				snps,devctrl_halt_quirk;
			};
		};

		omap_dwc3_2: omap_dwc3_2@488c0000 {
			compatible = "ti,dwc3";
			ti,hwmods = "usb_otg_ss2";
			reg = <0x488c0000 0x10000>;
			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <1>;
			utmi-mode = <2>;
			ranges;
			usb2: usb@488d0000 {
				compatible = "snps,dwc3";
				reg = <0x488d0000 0x17000>;
				interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "peripheral",
						  "host",
						  "otg";
				phys = <&usb2_phy2>;
				phy-names = "usb2-phy";
				maximum-speed = "high-speed";
				dr_mode = "otg";
				snps,dis_u3_susphy_quirk;
				snps,dis_u2_susphy_quirk;
				snps,devctrl_halt_quirk;
			};
		};

		/* IRQ for DWC3_3 and DWC3_4 need IRQ crossbar */
		omap_dwc3_3: omap_dwc3_3@48900000 {
			compatible = "ti,dwc3";
			ti,hwmods = "usb_otg_ss3";
			reg = <0x48900000 0x10000>;
			interrupts = <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <1>;
			utmi-mode = <2>;
			ranges;
			status = "disabled";
			usb3: usb@48910000 {
				compatible = "snps,dwc3";
				reg = <0x48910000 0x17000>;
				interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
					     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "peripheral",
						  "host",
						  "otg";
				maximum-speed = "high-speed";
				dr_mode = "otg";
				snps,dis_u3_susphy_quirk;
				snps,dis_u2_susphy_quirk;
			};
		};

		elm: elm@48078000 {
			compatible = "ti,am3352-elm";
			reg = <0x48078000 0xfc0>;      /* device IO registers */
			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "elm";
			status = "disabled";
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			reg = <0x50000000 0x37c>;      /* device IO registers */
			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&edma_xbar 4 0>;
			dma-names = "rxtx";
			gpmc,num-cs = <8>;
			gpmc,num-waitpins = <2>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupt-controller;
			#interrupt-cells = <2>;
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		atl: atl@4843c000 {
			compatible = "ti,dra7-atl";
			reg = <0x4843c000 0x3ff>;
			ti,hwmods = "atl";
			ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
					     <&atl_clkin2_ck>, <&atl_clkin3_ck>;
			clocks = <&atl_gfclk_mux>;
			clock-names = "fck";
			status = "disabled";
		};

		mcasp1: mcasp@48460000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp1";
			reg = <0x48460000 0x2000>,
			      <0x45800000 0x1000>;
			reg-names = "mpu","dat";
			interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "tx", "rx";
			dmas = <&edma_xbar 129 1>, <&edma_xbar 128 1>;
			dma-names = "tx", "rx";
			clocks = <&mcasp1_aux_gfclk_mux>, <&mcasp1_ahclkx_mux>,
				 <&mcasp1_ahclkr_mux>;
			clock-names = "fck", "ahclkx", "ahclkr";
			status = "disabled";
		};

		mcasp2: mcasp@48464000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp2";
			reg = <0x48464000 0x2000>,
			      <0x45c00000 0x1000>;
			reg-names = "mpu","dat";
			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "tx", "rx";
			dmas = <&edma_xbar 131 1>, <&edma_xbar 130 1>;
			dma-names = "tx", "rx";
			clocks = <&mcasp2_aux_gfclk_mux>, <&mcasp2_ahclkx_mux>,
				 <&mcasp2_ahclkr_mux>;
			clock-names = "fck", "ahclkx", "ahclkr";
			status = "disabled";
		};

		mcasp3: mcasp@48468000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp3";
			reg = <0x48468000 0x2000>,
			      <0x46000000 0x1000>;
			reg-names = "mpu","dat";
			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "tx", "rx";
			dmas = <&edma_xbar 133 1>, <&edma_xbar 132 1>;
			dma-names = "tx", "rx";
			clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		mcasp4: mcasp@4846c000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp4";
			reg = <0x4846c000 0x2000>,
			      <0x48436000 0x1000>;
			reg-names = "mpu","dat";
			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "tx", "rx";
			dmas = <&edma_xbar 135 1>, <&edma_xbar 134 1>;
			dma-names = "tx", "rx";
			clocks = <&mcasp4_aux_gfclk_mux>, <&mcasp4_ahclkx_mux>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		mcasp5: mcasp@48470000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp5";
			reg = <0x48470000 0x2000>,
			      <0x4843a000 0x1000>;
			reg-names = "mpu","dat";
			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "tx", "rx";
			dmas = <&edma_xbar 137 1>, <&edma_xbar 136 1>;
			dma-names = "tx", "rx";
			clocks = <&mcasp5_aux_gfclk_mux>, <&mcasp5_ahclkx_mux>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		mcasp6: mcasp@48474000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp6";
			reg = <0x48474000 0x2000>,
			      <0x4844c000 0x1000>;
			reg-names = "mpu","dat";
			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "tx", "rx";
			dmas = <&edma_xbar 139 1>, <&edma_xbar 138 1>;
			dma-names = "tx", "rx";
			clocks = <&mcasp6_aux_gfclk_mux>, <&mcasp6_ahclkx_mux>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		mcasp7: mcasp@48478000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp7";
			reg = <0x48478000 0x2000>,
			      <0x48450000 0x1000>;
			reg-names = "mpu","dat";
			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "tx", "rx";
			dmas = <&edma_xbar 141 1>, <&edma_xbar 140 1>;
			dma-names = "tx", "rx";
			clocks = <&mcasp7_aux_gfclk_mux>, <&mcasp7_ahclkx_mux>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		mcasp8: mcasp@4847c000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp8";
			reg = <0x4847c000 0x2000>,
			      <0x48454000 0x1000>;
			reg-names = "mpu","dat";
			interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "tx", "rx";
			dmas = <&edma_xbar 143 1>, <&edma_xbar 142 1>;
			dma-names = "tx", "rx";
			clocks = <&mcasp8_aux_gfclk_mux>, <&mcasp8_ahclkx_mux>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		crossbar_mpu: crossbar@4a002a48 {
			compatible = "ti,irq-crossbar";
			reg = <0x4a002a48 0x130>;
			interrupt-controller;
			interrupt-parent = <&wakeupgen>;
			#interrupt-cells = <3>;
			ti,max-irqs = <160>;
			ti,max-crossbar-sources = <MAX_SOURCES>;
			ti,reg-size = <2>;
			ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
			ti,irqs-skip = <10 133 139 140>;
			ti,irqs-safe-map = <0>;
		};

		mac: ethernet@48484000 {
			compatible = "ti,cpsw","ti,dra7-cpsw";
			ti,hwmods = "gmac";
			clocks = <&gmac_main_clk>, <&gmac_rft_clk_mux>;
			clock-names = "fck", "cpts";
			cpdma_channels = <8>;
			ale_entries = <1024>;
			bd_ram_size = <0x2000>;
			mac_control = <0x20>;
			slaves = <2>;
			active_slave = <0>;
			cpts_clock_mult = <0x784CFE14>;
			cpts_clock_shift = <29>;
			reg = <0x48484000 0x1000
			       0x48485200 0x2E00>;
			#address-cells = <1>;
			#size-cells = <1>;

			/*
			 * Do not allow gating of cpsw clock as workaround
			 * for errata i877. Keeping internal clock disabled
			 * causes the device switching characteristics
			 * to degrade over time and eventually fail to meet
			 * the data manual delay time/skew specs.
			 */
			ti,no-idle;

			/*
			 * rx_thresh_pend
			 * rx_pend
			 * tx_pend
			 * misc_pend
			 */
			interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
			ranges;
			syscon = <&scm_conf>;
			status = "disabled";

			davinci_mdio: mdio@48485000 {
				compatible = "ti,cpsw-mdio","ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "davinci_mdio";
					clocks = <&dpll_gmac_h13x2_ck>;
					clock-names = "fck";
				bus_freq = <1000000>;
				reg = <0x48485000 0x100>;
			};


			cpsw_emac0: slave@48480200 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			cpsw_emac1: slave@48480300 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			phy_sel: cpsw-phy-sel@4a002554 {
				compatible = "ti,dra7xx-cpsw-phy-sel";
				//compatible = "ti,davinci_mdio";
				reg= <0x4a002554 0x4>;
				reg-names = "gmii-sel";
			};


		};

		dcan1: can@481cc000 {
			compatible = "ti,dra7-d_can";
			ti,hwmods = "dcan1";
			reg = <0x4ae3c000 0x2000>;
			syscon-raminit = <&scm_conf 0x558 0>;
			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&dcan1_sys_clk_mux>;
			status = "disabled";
		};

		dcan2: can@481d0000 {
			compatible = "ti,dra7-d_can";
			ti,hwmods = "dcan2";
			reg = <0x48480000 0x2000>;
			syscon-raminit = <&scm_conf 0x558 1>;
			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&sys_clkin1>;
			status = "disabled";
		};

		gpu: gpu@56000000 {
			compatible = "ti,dra7-sgx544", "img,sgx544";
			reg = <0x56000000 0x10000>;
			reg-names = "gpu_ocp_base";
			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "gpu";
			clocks = <&l3_iclk_div>, <&gpu_core_gclk_mux>,
				<&gpu_hyd_gclk_mux>;
			clock-names = "iclk", "fclk1", "fclk2";
		};

		bb2d: bb2d@59000000 {
			compatible = "ti,dra7-bb2d";
			reg = <0x59000000 0x0700>;
			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "bb2d";
			clocks = <&dpll_core_h24x2_ck>;
			clock-names = "fclk";
			status = "disabled";
		};

		dss: dss@58000000 {
			compatible = "ti,dra7-dss";
			/* 'reg' defined in dra72x.dtsi and dra74x.dtsi */
			/* 'clocks' defined in dra72x.dtsi and dra74x.dtsi */
			status = "disabled";
			ti,hwmods = "dss_core";
			/* CTRL_CORE_DSS_PLL_CONTROL */
			syscon-pll-ctrl = <&scm_conf 0x538>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			dispc@58001000 {
				compatible = "ti,dra7-dispc";
				reg = <0x58001000 0x1000>;
				interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
				ti,hwmods = "dss_dispc";
				clocks = <&dss_dss_clk>;
				clock-names = "fck";
				/* CTRL_CORE_SMA_SW_1 */
				syscon-pol = <&scm_conf 0x534>;
			};

			hdmi: encoder@58060000 {
				compatible = "ti,dra7-hdmi";
				reg = <0x58040000 0x200>,
				      <0x58040200 0x80>,
				      <0x58040300 0x80>,
				      <0x58060000 0x19000>;
				reg-names = "wp", "pll", "phy", "core";
				interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
				ti,hwmods = "dss_hdmi";
				clocks = <&dss_48mhz_clk>, <&dss_hdmi_clk>;
				clock-names = "fck", "sys_clk";
				dmas = <&sdma_xbar 76>;
				dma-names = "audio_tx";
			};
		};

		epwmss0: epwmss@4843e000 {
			compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
			reg = <0x4843e000 0x30>;
			ti,hwmods = "epwmss0";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges;

			ehrpwm0: pwm@4843e200 {
				compatible = "ti,dra746-ehrpwm",
					     "ti,am3352-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x4843e200 0x80>;
				clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>;
				clock-names = "tbclk", "fck";
				status = "disabled";
			};

			ecap0: ecap@4843e100 {
				compatible = "ti,dra746-ecap",
					     "ti,am3352-ecap";
				#pwm-cells = <3>;
				reg = <0x4843e100 0x80>;
				clocks = <&l4_root_clk_div>;
				clock-names = "fck";
				status = "disabled";
			};
		};

		epwmss1: epwmss@48440000 {
			compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
			reg = <0x48440000 0x30>;
			ti,hwmods = "epwmss1";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges;

			ehrpwm1: pwm@48440200 {
				compatible = "ti,dra746-ehrpwm",
					     "ti,am3352-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48440200 0x80>;
				clocks = <&ehrpwm1_tbclk>, <&l4_root_clk_div>;
				clock-names = "tbclk", "fck";
				status = "disabled";
			};

			ecap1: ecap@48440100 {
				compatible = "ti,dra746-ecap",
					     "ti,am3352-ecap";
				#pwm-cells = <3>;
				reg = <0x48440100 0x80>;
				clocks = <&l4_root_clk_div>;
				clock-names = "fck";
				status = "disabled";
			};
		};

		epwmss2: epwmss@48442000 {
			compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
			reg = <0x48442000 0x30>;
			ti,hwmods = "epwmss2";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges;

			ehrpwm2: pwm@48442200 {
				compatible = "ti,dra746-ehrpwm",
					     "ti,am3352-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48442200 0x80>;
				clocks = <&ehrpwm2_tbclk>, <&l4_root_clk_div>;
				clock-names = "tbclk", "fck";
				status = "disabled";
			};

			ecap2: ecap@48442100 {
				compatible = "ti,dra746-ecap",
					     "ti,am3352-ecap";
				#pwm-cells = <3>;
				reg = <0x48442100 0x80>;
				clocks = <&l4_root_clk_div>;
				clock-names = "fck";
				status = "disabled";
			};
		};

		aes1: aes@4b500000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes1";
			reg = <0x4b500000 0xa0>;
			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&edma_xbar 111 0>, <&edma_xbar 110 0>;
			dma-names = "tx", "rx";
			clocks = <&l3_iclk_div>;
			clock-names = "fck";
		};

		aes2: aes@4b700000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes2";
			reg = <0x4b700000 0xa0>;
			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&edma_xbar 114 0>, <&edma_xbar 113 0>;
			dma-names = "tx", "rx";
			clocks = <&l3_iclk_div>;
			clock-names = "fck";
		};

		des: des@480a5000 {
			compatible = "ti,omap4-des";
			ti,hwmods = "des";
			reg = <0x480a5000 0xa0>;
			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&sdma_xbar 117>, <&sdma_xbar 116>;
			dma-names = "tx", "rx";
			clocks = <&l3_iclk_div>;
			clock-names = "fck";
		};

		sham: sham@53100000 {
			compatible = "ti,omap5-sham";
			ti,hwmods = "sham";
			reg = <0x4b101000 0x300>;
			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
			dmas = <&edma_xbar 119 0>;
			dma-names = "rx";
			clocks = <&l3_iclk_div>;
			clock-names = "fck";
		};

		rng: rng@48090000 {
			compatible = "ti,omap4-rng";
			ti,hwmods = "rng";
			reg = <0x48090000 0x2000>;
			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&l3_iclk_div>;
			clock-names = "fck";
		};

		opp_supply_mpu: opp-supply@4a003b20 {
			compatible = "ti,omap5-opp-supply";
			reg = <0x4a003b20 0xc>;
			ti,efuse-settings = <
			/* uV   offset */
			1060000 0x0
			1160000 0x4
			1210000 0x8
			>;
			ti,absolute-max-voltage-uv = <1500000>;
		};

		vpe {
			compatible = "ti,vpe";
			ti,hwmods = "vpe";
			clocks = <&dpll_core_h23x2_ck>;
			clock-names = "fck";
			reg = <0x489d0000 0x120>,
			      <0x489d0300 0x20>,
			      <0x489d0400 0x20>,
			      <0x489d0500 0x20>,
			      <0x489d0600 0x3c>,
			      <0x489d0700 0x80>,
			      <0x489d5700 0x18>,
			      <0x489dd000 0x400>;
			reg-names = "vpe_top",
				    "vpe_chr_us0",
				    "vpe_chr_us1",
				    "vpe_chr_us2",
				    "vpe_dei",
				    "sc",
				    "csc",
				    "vpdma";
			interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		vip1: vip@0x48970000 {
			compatible = "ti,vip1";
			reg = <0x48970000 0x114>,
			      <0x48975500 0xD8>,
			      <0x48975700 0x18>,
			      <0x48975800 0x80>,
			      <0x48975a00 0xD8>,
			      <0x48975c00 0x18>,
			      <0x48975d00 0x80>,
			      <0x4897d000 0x400>;
			reg-names = "vip",
				    "parser0",
				    "csc0",
				    "sc0",
				    "parser1",
				    "csc1",
				    "sc1",
				    "vpdma";
			ti,hwmods = "vip1";
			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
			/* CTRL_CORE_SMA_SW_1 */
			syscon-pol = <&scm_conf 0x534>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
			vin1a: port@0 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0>;
				status = "disabled";
			};
			vin2a: port@1 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <1>;
				status = "disabled";
			};
			vin1b: port@2 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <2>;
				status = "disabled";
			};
			vin2b: port@3 {
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <3>;
				status = "disabled";
			};
		};
	};

	thermal_zones: thermal-zones {
		#include "omap4-cpu-thermal.dtsi"
		#include "omap5-gpu-thermal.dtsi"
		#include "omap5-core-thermal.dtsi"
		#include "dra7-dspeve-thermal.dtsi"
		#include "dra7-iva-thermal.dtsi"
	};

};

&cpu_thermal {
	polling-delay = <500>; /* milliseconds */
};

&cpu_crit {
	temperature = <120000>; /* milli Celsius */
};

&core_crit {
	temperature = <120000>; /* milli Celsius */
};

&gpu_crit {
	temperature = <120000>; /* milli Celsius */
};

&dspeve_crit {
	temperature = <120000>; /* milli Celsius */
};

&iva_crit {
	temperature = <120000>; /* milli Celsius */
};

/include/ "dra7xx-clocks.dtsi"

Tanmay，

      Thank you very much!