[FAQ] AM625 / AM623 / AM625SIP / AM625-Q1 / AM620-Q1 Custom board hardware design - Schematic Review Checklist

HI Board designers, 

Wanted to highlight that the below schematics design guide now has checklist included for each sections.

Once customer is done with the design following the guide, customer should be able to verify the same with the checklist.

Schematic Design and Review Checklist for AM62x

https://www.ti.com/lit/an/sprado3/sprado3.pdf

The excel version is currently planned for end of Q1 or Q2 2025. 

Please reach out to the TI sales/support team you have been working with to check on the availability of early in progress checklist version. 

Additional information:

1 Introduction

1.1 Application Note Usage Guidelines Schematic Design Guidelines and Review Checklist application note provides design guidelines that can be used during custom board schematic design as a guide and a schematic review checklist that can be used to review the custom board schematics.

1.1.1 Processor Family Specific Application Note This application note is for the AM62x family of processors covering AM625, AM623, AM625SIP, AM625-Q1, and AM620-Q1. The application notes describes the design guidelines and review checklist for specific family of processor. A processor family specific application note simplifies the use of the chosen family of processors.

1.1.2 Schematics Design Guidelines The application note provides guidelines for all the peripherals supported by AM62x processor family. Users can review and follow schematic design guidelines during the custom board schematic design. Along with the guidelines, links to FAQs are provided for use during custom board schematic design, thus reducing effort and minimizing error.

1.1.3 Schematic Review Checklist The section has been added to the application. All the relevant peripheral or power sections in the application note includes checklist categorized as General, Schematic Review, and Additional. User can use the checklist to do a self-review of the custom board schematics to minimize possible errors that can cause functional or performance issues resulting in increased board bring-up and testing time.

Regards,

Sreenivasa