AM62A7: C7 Default Frequency

Hi Guy,

It is our pleasure to help. We are investigating this with help from the SDK team. We will provide an answer shortly.
Meanwhile, would you please provide the SDK version you are using?

Best regards,

Qutaiba

Thank you Qutaiba, 

We are waiting for your reply on this. 

Regarding SDK, I'm not 100% sure, it was one of 10_00_00_14 / 10_00_00_20

Best Regards

Guy  

Hi Guy,

The default frequency for C7x is set to 850MHz. The C7x processor still supports 1.GHz but some AM62A EVMs (E1 and E2) do not support 0.85v power which is required when C7x is clocked at 1.0GHz.

The FFTLIB and other C7x libs do not set the C7x clock frequency. They just run on the clock frequency which is set by the initialization binary for C7x. That said, the performance results reported by the C7x libs test cases are all in number of clock cycles which are independent of the actual clock freq of C7x. 

Best regards,

Qutaiba 

Thank you Qutaiba for your efforts, 

We are using E3 EVM, and we would be happy to move to 1GHz. Could you pls show us how to do it? 

In addition, we need to translate clock cycles to microseconds, so "initialization binary frequency" is a bit vague, do you mean dividing the clock cycles by 850 will translate clock cycles to microseconds? 

Best Regards

Guy

Hi Guy,

I am following up with the SDK team to find out how to set the clock freq for C7x in E3 EVM. 

Guy Shemesh said:

In addition, we need to translate clock cycles to microseconds, so "initialization binary frequency" is a bit vague, do you mean dividing the clock cycles by 850 will translate clock cycles to microseconds? 

Yes, divide the clock cycles reported by the C7x  lib test cases by 850 to translate the results to microseconds when the C7x is clocked at 850 MHz. This number should be linearly scalable. You can also divide the number of clock cycles by 1000 to estimate the performance for when C7x is clocked at 1.0 GHz. 

Best regards,

Qutaiba