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SK-AM62P-LP: AM62P package pin delay

Part Number: SK-AM62P-LP

Tool/software:

Hi 

Continuing to on my request on this thread since thread was locked but issue is still open:

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1416164/sk-am62p-lp-am62p-package-pin-delay/5492627#5492627

Aside from DDR balls package delays listed in the DDR application note https://www.ti.com/lit/pdf/sprad66,there should be package delays for all other CPU High speed interface balls such as SD/MMC,DSI,LVDS,RGMII etc.

For high speed interfaces length matching it is crucial for us to have the package delay for all CPU balls. In AM62x for example, some CPU I/F balls had internal delay differences of even ~20ps between balls of same interface. This must be taken into account when length matching.

Typically there is a internal package delay file provided (as was the case for in the AM62x). There are no internal package delays values included for CPU balls in the EVK reference .brd layout file so they cannot be extracted from it.

1. Can you provide the CPU package delays for all other CPU balls?

2. Can you confirm with the expert these are indeed the delays used in the SK-AM62P-LP layout?

Since this has been not resolve for a long time, I will appreciate it you can expedite this inquiry

Thank you,

Jhon