AM623: Enabling all 9 uarts in u-boot, only three works

Part Number: AM623
Other Parts Discussed in Thread: AM625,

Tool/software:

Hello,

On our custom board we use all 9 uarts. UART0 is for the console, it works. The other uarts are also configured in the dts, but sending a char tx->rx is only possible for uart1 and wkup_uart0.

Test script (for uart2):

echo uart2; mw.l 0x0282000C 0x80; mw.l 0x02820000 0x1A; mw.l 0x02820004 0x00; mw.l 0x0282000C 0x03; mw.l 0x02820008 0x07; mw.l 0x02820010 0x00; mw.l 0x02820000 0x59; sleep 0.1; md.l 0x02820000 1

On success, 0x59 should be read back. When it fails, only a 0x0 is read.

The full dts (right before compile), looks like:

# 0 "arch/arm/dts/.k3-am62-lp-sk.dtb.pre.tmp"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/include/linux/kconfig.h" 1



# 1 "include/generated/autoconf.h" 1
# 5 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/include/linux/kconfig.h" 2
# 0 "<command-line>" 2
# 1 "arch/arm/dts/.k3-am62-lp-sk.dtb.pre.tmp"







/dts-v1/;

# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62x-sk-common.dtsi" 1







# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/include/dt-bindings/leds/common.h" 1
# 9 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62x-sk-common.dtsi" 2
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/include/dt-bindings/gpio/gpio.h" 1
# 10 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62x-sk-common.dtsi" 2
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am625.dtsi" 1
# 10 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am625.dtsi"
/dts-v1/;

# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62.dtsi" 1
# 9 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62.dtsi"
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/include/dt-bindings/interrupt-controller/irq.h" 1
# 10 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62.dtsi" 2
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/include/dt-bindings/interrupt-controller/arm-gic.h" 1
# 11 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62.dtsi" 2
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/include/dt-bindings/pinctrl/k3.h" 1
# 12 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62.dtsi" 2
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/include/dt-bindings/soc/ti,sci_pm_domain.h" 1
# 13 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62.dtsi" 2

/ {
 model = "Texas Instruments K3 AM625 SoC";
 compatible = "ti,am625";
 interrupt-parent = <&gic500>;
 #address-cells = <2>;
 #size-cells = <2>;

 chosen { };

 firmware {
  optee {
   compatible = "linaro,optee-tz";
   method = "smc";
  };

  psci: psci {
   compatible = "arm,psci-1.0";
   method = "smc";
  };
 };

 a53_timer0: timer-cl0-cpu0 {
  compatible = "arm,armv8-timer";
  interrupts = <1 13 8>,
        <1 14 8>,
        <1 11 8>,
        <1 10 8>;
 };

 pmu: pmu {
  compatible = "arm,cortex-a53-pmu";
  interrupts = <1 7 4>;
 };

 cbass_main: bus@f0000 {
  compatible = "simple-bus";
  #address-cells = <2>;
  #size-cells = <2>;

  ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>,
    <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>,
    <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>,
    <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>,
    <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>,
    <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>,
    <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>,
    <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>,
    <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>,
    <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>,
    <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>,
    <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>,
    <0x00 0x30101000 0x00 0x30101000 0x00 0x00010100>,
    <0x00 0x30200000 0x00 0x30200000 0x00 0x00010000>,
    <0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>,
    <0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>,
    <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>,
    <0x00 0x43600000 0x00 0x43600000 0x00 0x00010000>,
    <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>,
    <0x00 0x44860000 0x00 0x44860000 0x00 0x00040000>,
    <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>,
    <0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>,
    <0x00 0x70000000 0x00 0x70000000 0x00 0x00010000>,
    <0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>,
    <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>,
    <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>,
    <0x00 0x50000000 0x00 0x50000000 0x00 0x08000000>,


    <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>,


    <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>,
    <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;

  cbass_mcu: bus@4000000 {
   compatible = "simple-bus";
   #address-cells = <2>;
   #size-cells = <2>;
   ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>;
  };

  cbass_wakeup: bus@2b000000 {
   compatible = "simple-bus";
   #address-cells = <2>;
   #size-cells = <2>;
   ranges = <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>,
     <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
  };
 };
};


# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-main.dtsi" 1







&cbass_main {
 oc_sram: sram@70000000 {
  compatible = "mmio-sram";
  reg = <0x00 0x70000000 0x00 0x10000>;
  #address-cells = <1>;
  #size-cells = <1>;
  ranges = <0x0 0x00 0x70000000 0x10000>;
 };

 gic500: interrupt-controller@1800000 {
  compatible = "arm,gic-v3";
  #address-cells = <2>;
  #size-cells = <2>;
  ranges;
  #interrupt-cells = <3>;
  interrupt-controller;
  reg = <0x00 0x01800000 0x00 0x10000>,
        <0x00 0x01880000 0x00 0xc0000>,
        <0x00 0x01880000 0x00 0xc0000>,
        <0x01 0x00000000 0x00 0x2000>,
        <0x01 0x00010000 0x00 0x1000>,
        <0x01 0x00020000 0x00 0x2000>;




  interrupts = <1 9 4>;

  gic_its: msi-controller@1820000 {
   compatible = "arm,gic-v3-its";
   reg = <0x00 0x01820000 0x00 0x10000>;
   socionext,synquacer-pre-its = <0x1000000 0x400000>;
   msi-controller;
   #msi-cells = <1>;
  };
 };

 main_conf: syscon@100000 {
  bootph-pre-ram;
  compatible = "syscon", "simple-mfd";
  reg = <0x00 0x00100000 0x00 0x20000>;
  #address-cells = <1>;
  #size-cells = <1>;
  ranges = <0x0 0x00 0x00100000 0x20000>;

  phy_gmii_sel: phy@4044 {
   compatible = "ti,am654-phy-gmii-sel";
   reg = <0x4044 0x8>;
   #phy-cells = <1>;
  };

  epwm_tbclk: clock@4130 {
   compatible = "ti,am62-epwm-tbclk", "syscon";
   reg = <0x4130 0x4>;
   #clock-cells = <1>;
  };

  dss_oldi_io_ctrl: dss-oldi-io-ctrl@8600 {
   bootph-pre-ram;
   compatible = "syscon";
   reg = <0x8600 0x200>;
  };
 };

 dmss: bus@48000000 {
  compatible = "simple-mfd";
  #address-cells = <2>;
  #size-cells = <2>;
  dma-ranges;
  ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>;

  ti,sci-dev-id = <25>;

  secure_proxy_main: mailbox@4d000000 {
   compatible = "ti,am654-secure-proxy";
   #mbox-cells = <1>;
   reg-names = "target_data", "rt", "scfg";
   reg = <0x00 0x4d000000 0x00 0x80000>,
         <0x00 0x4a600000 0x00 0x80000>,
         <0x00 0x4a400000 0x00 0x80000>;
   interrupt-names = "rx_012";
   interrupts = <0 34 4>;
  };

  inta_main_dmss: interrupt-controller@48000000 {
   compatible = "ti,sci-inta";
   reg = <0x00 0x48000000 0x00 0x100000>;
   #interrupt-cells = <0>;
   interrupt-controller;
   interrupt-parent = <&gic500>;
   msi-controller;
   ti,sci = <&dmsc>;
   ti,sci-dev-id = <28>;
   ti,interrupt-ranges = <4 68 36>;
   ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
  };

  main_bcdma: dma-controller@485c0100 {
   compatible = "ti,am64-dmss-bcdma";
   reg = <0x00 0x485c0100 0x00 0x100>,
         <0x00 0x4c000000 0x00 0x20000>,
         <0x00 0x4a820000 0x00 0x20000>,
         <0x00 0x4aa40000 0x00 0x20000>,
         <0x00 0x4bc00000 0x00 0x100000>;
   reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
   msi-parent = <&inta_main_dmss>;
   #dma-cells = <3>;

   ti,sci = <&dmsc>;
   ti,sci-dev-id = <26>;
   ti,sci-rm-range-bchan = <0x20>;
   ti,sci-rm-range-rchan = <0x21>;
   ti,sci-rm-range-tchan = <0x22>;
  };

  main_pktdma: dma-controller@485c0000 {
   compatible = "ti,am64-dmss-pktdma";
   reg = <0x00 0x485c0000 0x00 0x100>,
         <0x00 0x4a800000 0x00 0x20000>,
         <0x00 0x4aa00000 0x00 0x40000>,
         <0x00 0x4b800000 0x00 0x400000>;
   reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
   msi-parent = <&inta_main_dmss>;
   #dma-cells = <2>;

   ti,sci = <&dmsc>;
   ti,sci-dev-id = <30>;
   ti,sci-rm-range-tchan = <0x23>,
      <0x24>,
      <0x25>,
      <0x26>;
   ti,sci-rm-range-tflow = <0x10>,
      <0x11>,
      <0x12>,
      <0x13>;
   ti,sci-rm-range-rchan = <0x29>,
      <0x2b>,
      <0x2d>,
      <0x2f>,
      <0x31>,
      <0x33>;
   ti,sci-rm-range-rflow = <0x2a>,
      <0x2c>,
      <0x2e>,
      <0x32>;
  };
 };

 dmsc: system-controller@44043000 {
  compatible = "ti,k2g-sci";
  ti,host-id = <12>;
  mbox-names = "rx", "tx";
  mboxes = <&secure_proxy_main 12>,
    <&secure_proxy_main 13>;
  reg-names = "debug_messages";
  reg = <0x00 0x44043000 0x00 0xfe0>;

  k3_pds: power-controller {
   compatible = "ti,sci-pm-domain";
   #power-domain-cells = <2>;
  };

  k3_clks: clock-controller {
   compatible = "ti,k2g-sci-clk";
   #clock-cells = <2>;
  };

  k3_reset: reset-controller {
   compatible = "ti,sci-reset";
   #reset-cells = <2>;
  };
 };

 crypto: crypto@40900000 {
  compatible = "ti,am62-sa3ul";
  reg = <0x00 0x40900000 0x00 0x1200>;
  power-domains = <&k3_pds 70 0>;
  #address-cells = <2>;
  #size-cells = <2>;
  ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;

  dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
         <&main_pktdma 0x7507 0>;
  dma-names = "tx", "rx1", "rx2";
 };

 main_pmx0: pinctrl@f4000 {
  compatible = "pinctrl-single";
  reg = <0x00 0xf4000 0x00 0x2ac>;
  #pinctrl-cells = <1>;
  pinctrl-single,register-width = <32>;
  pinctrl-single,function-mask = <0xffffffff>;
 };

 main_timer0: timer@2400000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x2400000 0x00 0x400>;
  interrupts = <0 120 4>;
  clocks = <&k3_clks 36 2>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 36 2>;
  assigned-clock-parents = <&k3_clks 36 3>;
  power-domains = <&k3_pds 36 1>;
  ti,timer-pwm;
 };

 main_timer1: timer@2410000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x2410000 0x00 0x400>;
  interrupts = <0 121 4>;
  clocks = <&k3_clks 37 2>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 37 2>;
  assigned-clock-parents = <&k3_clks 37 3>;
  power-domains = <&k3_pds 37 1>;
  ti,timer-pwm;
 };

 main_timer2: timer@2420000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x2420000 0x00 0x400>;
  interrupts = <0 122 4>;
  clocks = <&k3_clks 38 2>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 38 2>;
  assigned-clock-parents = <&k3_clks 38 3>;
  power-domains = <&k3_pds 38 1>;
  ti,timer-pwm;
 };

 main_timer3: timer@2430000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x2430000 0x00 0x400>;
  interrupts = <0 123 4>;
  clocks = <&k3_clks 39 2>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 39 2>;
  assigned-clock-parents = <&k3_clks 39 3>;
  power-domains = <&k3_pds 39 1>;
  ti,timer-pwm;
 };

 main_timer4: timer@2440000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x2440000 0x00 0x400>;
  interrupts = <0 124 4>;
  clocks = <&k3_clks 40 2>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 40 2>;
  assigned-clock-parents = <&k3_clks 40 3>;
  power-domains = <&k3_pds 40 1>;
  ti,timer-pwm;
 };

 main_timer5: timer@2450000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x2450000 0x00 0x400>;
  interrupts = <0 125 4>;
  clocks = <&k3_clks 41 2>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 41 2>;
  assigned-clock-parents = <&k3_clks 41 3>;
  power-domains = <&k3_pds 41 1>;
  ti,timer-pwm;
 };

 main_timer6: timer@2460000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x2460000 0x00 0x400>;
  interrupts = <0 126 4>;
  clocks = <&k3_clks 42 2>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 42 2>;
  assigned-clock-parents = <&k3_clks 42 3>;
  power-domains = <&k3_pds 42 1>;
  ti,timer-pwm;
 };

 main_timer7: timer@2470000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x2470000 0x00 0x400>;
  interrupts = <0 127 4>;
  clocks = <&k3_clks 43 2>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 43 2>;
  assigned-clock-parents = <&k3_clks 43 3>;
  power-domains = <&k3_pds 43 1>;
  ti,timer-pwm;
 };

 main_uart0: serial@2800000 {
  compatible = "ti,am64-uart", "ti,am654-uart";
  reg = <0x00 0x02800000 0x00 0x100>;
  interrupts = <0 178 4>;
  power-domains = <&k3_pds 146 1>;
  clocks = <&k3_clks 146 0>;
  clock-names = "fclk";
  status = "disabled";
 };

 main_uart1: serial@2810000 {
  compatible = "ti,am64-uart", "ti,am654-uart";
  reg = <0x00 0x02810000 0x00 0x100>;
  interrupts = <0 179 4>;
  power-domains = <&k3_pds 152 1>;
  clocks = <&k3_clks 152 0>;
  clock-names = "fclk";
  status = "disabled";
 };

 main_uart2: serial@2820000 {
  compatible = "ti,am64-uart", "ti,am654-uart";
  reg = <0x00 0x02820000 0x00 0x100>;
  interrupts = <0 180 4>;
  power-domains = <&k3_pds 153 1>;
  clocks = <&k3_clks 153 0>;
  clock-names = "fclk";
  status = "disabled";
 };

 main_uart3: serial@2830000 {
  compatible = "ti,am64-uart", "ti,am654-uart";
  reg = <0x00 0x02830000 0x00 0x100>;
  interrupts = <0 181 4>;
  power-domains = <&k3_pds 154 1>;
  clocks = <&k3_clks 154 0>;
  clock-names = "fclk";
  status = "disabled";
 };

 main_uart4: serial@2840000 {
  compatible = "ti,am64-uart", "ti,am654-uart";
  reg = <0x00 0x02840000 0x00 0x100>;
  interrupts = <0 182 4>;
  power-domains = <&k3_pds 155 1>;
  clocks = <&k3_clks 155 0>;
  clock-names = "fclk";
  status = "disabled";
 };

 main_uart5: serial@2850000 {
  compatible = "ti,am64-uart", "ti,am654-uart";
  reg = <0x00 0x02850000 0x00 0x100>;
  interrupts = <0 183 4>;
  power-domains = <&k3_pds 156 1>;
  clocks = <&k3_clks 156 0>;
  clock-names = "fclk";
  status = "disabled";
 };

 main_uart6: serial@2860000 {
  compatible = "ti,am64-uart", "ti,am654-uart";
  reg = <0x00 0x02860000 0x00 0x100>;
  interrupts = <0 184 4>;
  power-domains = <&k3_pds 158 1>;
  clocks = <&k3_clks 158 0>;
  clock-names = "fclk";
  status = "disabled";
 };

 main_i2c0: i2c@20000000 {
  compatible = "ti,am64-i2c", "ti,omap4-i2c";
  reg = <0x00 0x20000000 0x00 0x100>;
  interrupts = <0 161 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 102 1>;
  clocks = <&k3_clks 102 2>;
  clock-names = "fck";
  status = "disabled";
 };

 main_i2c1: i2c@20010000 {
  compatible = "ti,am64-i2c", "ti,omap4-i2c";
  reg = <0x00 0x20010000 0x00 0x100>;
  interrupts = <0 162 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 103 1>;
  clocks = <&k3_clks 103 2>;
  clock-names = "fck";
  status = "disabled";
 };

 main_i2c2: i2c@20020000 {
  compatible = "ti,am64-i2c", "ti,omap4-i2c";
  reg = <0x00 0x20020000 0x00 0x100>;
  interrupts = <0 163 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 104 1>;
  clocks = <&k3_clks 104 2>;
  clock-names = "fck";
  status = "disabled";
 };

 main_i2c3: i2c@20030000 {
  compatible = "ti,am64-i2c", "ti,omap4-i2c";
  reg = <0x00 0x20030000 0x00 0x100>;
  interrupts = <0 164 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 105 1>;
  clocks = <&k3_clks 105 2>;
  clock-names = "fck";
  status = "disabled";
 };

 main_spi0: spi@20100000 {
  compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
  reg = <0x00 0x20100000 0x00 0x400>;
  interrupts = <0 172 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 141 1>;
  clocks = <&k3_clks 141 0>;
  status = "disabled";
 };

 main_spi1: spi@20110000 {
  compatible = "ti,am654-mcspi","ti,omap4-mcspi";
  reg = <0x00 0x20110000 0x00 0x400>;
  interrupts = <0 173 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 142 1>;
  clocks = <&k3_clks 142 0>;
  status = "disabled";
 };

 main_spi2: spi@20120000 {
  compatible = "ti,am654-mcspi","ti,omap4-mcspi";
  reg = <0x00 0x20120000 0x00 0x400>;
  interrupts = <0 174 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 143 1>;
  clocks = <&k3_clks 143 0>;
  status = "disabled";
 };

 main_gpio_intr: interrupt-controller@a00000 {
  compatible = "ti,sci-intr";
  reg = <0x00 0x00a00000 0x00 0x800>;
  ti,intr-trigger-type = <1>;
  interrupt-controller;
  interrupt-parent = <&gic500>;
  #interrupt-cells = <1>;
  ti,sci = <&dmsc>;
  ti,sci-dev-id = <3>;
  ti,interrupt-ranges = <0 32 16>;
 };

 main_gpio0: gpio@600000 {
  compatible = "ti,am64-gpio", "ti,keystone-gpio";
  reg = <0x0 0x00600000 0x0 0x100>;
  gpio-controller;
  #gpio-cells = <2>;
  interrupt-parent = <&main_gpio_intr>;
  interrupts = <190>, <191>, <192>,
        <193>, <194>, <195>;
  interrupt-controller;
  #interrupt-cells = <2>;
  ti,ngpio = <92>;
  ti,davinci-gpio-unbanked = <0>;
  power-domains = <&k3_pds 77 1>;
  clocks = <&k3_clks 77 0>;
  clock-names = "gpio";
 };

 main_gpio1: gpio@601000 {
  compatible = "ti,am64-gpio", "ti,keystone-gpio";
  reg = <0x0 0x00601000 0x0 0x100>;
  gpio-controller;
  #gpio-cells = <2>;
  interrupt-parent = <&main_gpio_intr>;
  interrupts = <180>, <181>, <182>,
        <183>, <184>, <185>;
  interrupt-controller;
  #interrupt-cells = <2>;
  ti,ngpio = <52>;
  ti,davinci-gpio-unbanked = <0>;
  power-domains = <&k3_pds 78 1>;
  clocks = <&k3_clks 78 0>;
  clock-names = "gpio";
 };

 sdhci0: mmc@fa10000 {
  compatible = "ti,am62-sdhci";
  reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
  interrupts = <0 133 4>;
  power-domains = <&k3_pds 57 1>;
  clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
  clock-names = "clk_ahb", "clk_xin";
  assigned-clocks = <&k3_clks 57 6>;
  assigned-clock-parents = <&k3_clks 57 8>;
  bus-width = <8>;
  mmc-ddr-1_8v;
  mmc-hs200-1_8v;
  ti,clkbuf-sel = <0x7>;
  ti,otap-del-sel-legacy = <0x0>;
  ti,otap-del-sel-mmc-hs = <0x0>;
  ti,otap-del-sel-ddr52 = <0x5>;
  ti,otap-del-sel-hs200 = <0x5>;
  ti,itap-del-sel-legacy = <0xa>;
  ti,itap-del-sel-mmc-hs = <0x1>;
  status = "disabled";
 };

 sdhci1: mmc@fa00000 {
  compatible = "ti,am62-sdhci";
  reg = <0x00 0x0fa00000 0x00 0x1000>, <0x00 0x0fa08000 0x00 0x400>;
  interrupts = <0 83 4>;
  power-domains = <&k3_pds 58 1>;
  clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
  clock-names = "clk_ahb", "clk_xin";
  bus-width = <4>;
  ti,clkbuf-sel = <0x7>;
  ti,otap-del-sel-legacy = <0x8>;
  ti,otap-del-sel-sd-hs = <0x0>;
  ti,otap-del-sel-sdr12 = <0x0>;
  ti,otap-del-sel-sdr25 = <0x0>;
  ti,otap-del-sel-sdr50 = <0x8>;
  ti,otap-del-sel-sdr104 = <0x7>;
  ti,otap-del-sel-ddr50 = <0x4>;
  ti,itap-del-sel-legacy = <0xa>;
  ti,itap-del-sel-sd-hs = <0x1>;
  ti,itap-del-sel-sdr12 = <0xA>;
  ti,itap-del-sel-sdr25 = <0x1>;
  status = "disabled";
 };

 sdhci2: mmc@fa20000 {
  compatible = "ti,am62-sdhci";
  reg = <0x00 0x0fa20000 0x00 0x1000>, <0x00 0x0fa28000 0x00 0x400>;
  interrupts = <0 82 4>;
  power-domains = <&k3_pds 184 1>;
  clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
  clock-names = "clk_ahb", "clk_xin";
  bus-width = <4>;
  ti,clkbuf-sel = <0x7>;
  ti,otap-del-sel-legacy = <0x8>;
  ti,otap-del-sel-sd-hs = <0x0>;
  ti,otap-del-sel-sdr12 = <0x0>;
  ti,otap-del-sel-sdr25 = <0x0>;
  ti,otap-del-sel-sdr50 = <0x8>;
  ti,otap-del-sel-sdr104 = <0x7>;
  ti,otap-del-sel-ddr50 = <0x4>;
  ti,itap-del-sel-legacy = <0xa>;
  ti,itap-del-sel-sd-hs = <0x1>;
  ti,itap-del-sel-sdr12 = <0xA>;
  ti,itap-del-sel-sdr25 = <0x1>;
  status = "disabled";
 };

 usbss0: dwc3-usb@f900000 {
  compatible = "ti,am62-usb";
  reg = <0x00 0x0f900000 0x00 0x800>;
  clocks = <&k3_clks 161 3>;
  clock-names = "ref";
  ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
  #address-cells = <2>;
  #size-cells = <2>;
  power-domains = <&k3_pds 178 1>;
  ranges;
  status = "disabled";

  usb0: usb@31000000 {
   compatible = "snps,dwc3";
   reg =<0x00 0x31000000 0x00 0x50000>;
   interrupts = <0 188 4>,
         <0 188 4>;
   interrupt-names = "host", "peripheral";
   maximum-speed = "high-speed";
   dr_mode = "otg";
  };
 };

 usbss1: dwc3-usb@f910000 {
  compatible = "ti,am62-usb";
  reg = <0x00 0x0f910000 0x00 0x800>;
  clocks = <&k3_clks 162 3>;
  clock-names = "ref";
  ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
  #address-cells = <2>;
  #size-cells = <2>;
  power-domains = <&k3_pds 179 1>;
  ranges;
  status = "disabled";

  usb1: usb@31100000 {
   compatible = "snps,dwc3";
   reg =<0x00 0x31100000 0x00 0x50000>;
   interrupts = <0 226 4>,
         <0 226 4>;
   interrupt-names = "host", "peripheral";
   maximum-speed = "high-speed";
   dr_mode = "otg";
  };
 };

 fss: bus@fc00000 {
  compatible = "simple-bus";
  reg = <0x00 0x0fc00000 0x00 0x70000>;
  #address-cells = <2>;
  #size-cells = <2>;
  ranges;

  ospi0: spi@fc40000 {
   compatible = "ti,am654-ospi", "cdns,qspi-nor";
   reg = <0x00 0x0fc40000 0x00 0x100>,
         <0x05 0x00000000 0x01 0x00000000>;
   interrupts = <0 139 4>;
   cdns,fifo-depth = <256>;
   cdns,fifo-width = <4>;
   cdns,trigger-address = <0x0>;
   clocks = <&k3_clks 75 7>;
   assigned-clocks = <&k3_clks 75 7>;
   assigned-clock-parents = <&k3_clks 75 8>;
   assigned-clock-rates = <166666666>;
   power-domains = <&k3_pds 75 1>;
   #address-cells = <1>;
   #size-cells = <0>;
   status = "disabled";
  };
 };

 cpsw3g: ethernet@8000000 {
  compatible = "ti,am642-cpsw-nuss";
  #address-cells = <2>;
  #size-cells = <2>;
  reg = <0x00 0x08000000 0x00 0x200000>;
  reg-names = "cpsw_nuss";
  ranges = <0x00 0x00 0x00 0x08000000 0x00 0x200000>;
  clocks = <&k3_clks 13 0>;
  assigned-clocks = <&k3_clks 13 3>;
  assigned-clock-parents = <&k3_clks 13 11>;
  clock-names = "fck";
  power-domains = <&k3_pds 13 1>;

  dmas = <&main_pktdma 0xc600 15>,
         <&main_pktdma 0xc601 15>,
         <&main_pktdma 0xc602 15>,
         <&main_pktdma 0xc603 15>,
         <&main_pktdma 0xc604 15>,
         <&main_pktdma 0xc605 15>,
         <&main_pktdma 0xc606 15>,
         <&main_pktdma 0xc607 15>,
         <&main_pktdma 0x4600 15>;
  dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
       "tx7", "rx";

  ethernet-ports {
   #address-cells = <1>;
   #size-cells = <0>;

   cpsw_port1: port@1 {
    reg = <1>;
    ti,mac-only;
    label = "port1";
    phys = <&phy_gmii_sel 1>;
    mac-address = [00 00 00 00 00 00];
    ti,syscon-efuse = <&wkup_conf 0x200>;
   };

   cpsw_port2: port@2 {
    reg = <2>;
    ti,mac-only;
    label = "port2";
    phys = <&phy_gmii_sel 2>;
    mac-address = [00 00 00 00 00 00];
   };
  };

  cpsw3g_mdio: mdio@f00 {
   compatible = "ti,cpsw-mdio","ti,davinci_mdio";
   reg = <0x00 0xf00 0x00 0x100>;
   #address-cells = <1>;
   #size-cells = <0>;
   clocks = <&k3_clks 13 0>;
   clock-names = "fck";
   bus_freq = <1000000>;
   status = "disabled";
  };

  cpts@3d000 {
   compatible = "ti,j721e-cpts";
   reg = <0x00 0x3d000 0x00 0x400>;
   clocks = <&k3_clks 13 3>;
   clock-names = "cpts";
   interrupts-extended = <&gic500 0 102 4>;
   interrupt-names = "cpts";
   ti,cpts-ext-ts-inputs = <4>;
   ti,cpts-periodic-outputs = <2>;
  };
 };

 dss: dss@30200000 {
  bootph-pre-ram;
  compatible = "ti,am625-dss";
  status = "okay";

  reg = <0x00 0x30200000 0x00 0x1000>,
        <0x00 0x30201000 0x00 0x1000>,
        <0x00 0x30202000 0x00 0x1000>,
        <0x00 0x30206000 0x00 0x1000>,
        <0x00 0x30207000 0x00 0x1000>,
        <0x00 0x30208000 0x00 0x1000>,
        <0x00 0x3020a000 0x00 0x1000>,
        <0x00 0x3020b000 0x00 0x1000>;

  reg-names = "common", "common1",
       "vidl1", "vid",
       "ovr1", "ovr2",
       "vp1", "vp2";

  ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
  power-domains = <&k3_pds 186 1>;

  clocks = <&k3_clks 186 6>,
    <&k3_clks 186 0>,
    <&k3_clks 186 2>;

  clock-names = "fck", "vp1", "vp2";

  interrupts = <0 84 4>,
        <0 85 4>;

  dss_ports: ports {
   #address-cells = <1>;
   #size-cells = <0>;
  };
 };

 gpmc0: memory-controller@3b000000 {
  compatible = "ti,am64-gpmc";
  status = "disabled";
  power-domains = <&k3_pds 80 1>;
  clocks = <&k3_clks 80 0>;
  clock-names = "fck";
  reg = <0x00 0x03b000000 0x00 0x400>,
   <0x00 0x050000000 0x00 0x8000000>;
  reg-names = "cfg", "data";
  interrupts = <0 106 4>;
  gpmc,num-cs = <3>;
  gpmc,num-waitpins = <2>;
  #address-cells = <2>;
  #size-cells = <1>;
  interrupt-controller;
  #interrupt-cells = <2>;
  gpio-controller;
  #gpio-cells = <2>;
 };

 elm0: ecc@25010000 {
  compatible = "ti,am64-elm";
  status = "disabled";
  reg = <0x00 0x25010000 0x00 0x2000>;
  interrupts = <0 132 4>;
  power-domains = <&k3_pds 54 1>;
  clocks = <&k3_clks 54 0>;
  clock-names = "fck";
 };

 hwspinlock: spinlock@2a000000 {
  compatible = "ti,am64-hwspinlock";
  reg = <0x00 0x2a000000 0x00 0x1000>;
  #hwlock-cells = <1>;
 };

 mailbox0_cluster0: mailbox@29000000 {
  compatible = "ti,am64-mailbox";
  reg = <0x00 0x29000000 0x00 0x200>;
  interrupts = <0 76 4>,
        <0 77 4>;
  #mbox-cells = <1>;
  ti,mbox-num-users = <4>;
  ti,mbox-num-fifos = <16>;
 };

 ecap0: pwm@23100000 {
  compatible = "ti,am3352-ecap";
  #pwm-cells = <3>;
  reg = <0x00 0x23100000 0x00 0x100>;
  power-domains = <&k3_pds 51 1>;
  clocks = <&k3_clks 51 0>;
  clock-names = "fck";
  status = "disabled";
 };

 ecap1: pwm@23110000 {
  compatible = "ti,am3352-ecap";
  #pwm-cells = <3>;
  reg = <0x00 0x23110000 0x00 0x100>;
  power-domains = <&k3_pds 52 1>;
  clocks = <&k3_clks 52 0>;
  clock-names = "fck";
  status = "disabled";
 };

 ecap2: pwm@23120000 {
  compatible = "ti,am3352-ecap";
  #pwm-cells = <3>;
  reg = <0x00 0x23120000 0x00 0x100>;
  power-domains = <&k3_pds 53 1>;
  clocks = <&k3_clks 53 0>;
  clock-names = "fck";
  status = "disabled";
 };

 main_mcan0: can@20701000 {
  compatible = "bosch,m_can";
  reg = <0x00 0x20701000 0x00 0x200>,
        <0x00 0x20708000 0x00 0x8000>;
  reg-names = "m_can", "message_ram";
  power-domains = <&k3_pds 98 1>;
  clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
  clock-names = "hclk", "cclk";
  interrupts = <0 155 4>,
        <0 156 4>;
  interrupt-names = "int0", "int1";
  bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
  status = "disabled";
 };

 main_rti0: watchdog@e000000 {
  compatible = "ti,j7-rti-wdt";
  reg = <0x00 0x0e000000 0x00 0x100>;
  clocks = <&k3_clks 125 0>;
  power-domains = <&k3_pds 125 1>;
  assigned-clocks = <&k3_clks 125 0>;
  assigned-clock-parents = <&k3_clks 125 2>;
 };

 main_rti1: watchdog@e010000 {
  compatible = "ti,j7-rti-wdt";
  reg = <0x00 0x0e010000 0x00 0x100>;
  clocks = <&k3_clks 126 0>;
  power-domains = <&k3_pds 126 1>;
  assigned-clocks = <&k3_clks 126 0>;
  assigned-clock-parents = <&k3_clks 126 2>;
 };

 main_rti2: watchdog@e020000 {
  compatible = "ti,j7-rti-wdt";
  reg = <0x00 0x0e020000 0x00 0x100>;
  clocks = <&k3_clks 127 0>;
  power-domains = <&k3_pds 127 1>;
  assigned-clocks = <&k3_clks 127 0>;
  assigned-clock-parents = <&k3_clks 127 2>;
 };

 main_rti3: watchdog@e030000 {
  compatible = "ti,j7-rti-wdt";
  reg = <0x00 0x0e030000 0x00 0x100>;
  clocks = <&k3_clks 128 0>;
  power-domains = <&k3_pds 128 1>;
  assigned-clocks = <&k3_clks 128 0>;
  assigned-clock-parents = <&k3_clks 128 2>;
 };

 main_rti15: watchdog@e0f0000 {
  compatible = "ti,j7-rti-wdt";
  reg = <0x00 0x0e0f0000 0x00 0x100>;
  clocks = <&k3_clks 130 0>;
  power-domains = <&k3_pds 130 1>;
  assigned-clocks = <&k3_clks 130 0>;
  assigned-clock-parents = <&k3_clks 130 2>;
 };

 epwm0: pwm@23000000 {
  compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
  #pwm-cells = <3>;
  reg = <0x00 0x23000000 0x00 0x100>;
  power-domains = <&k3_pds 86 1>;
  clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
  clock-names = "tbclk", "fck";
  status = "disabled";
 };

 epwm1: pwm@23010000 {
  compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
  #pwm-cells = <3>;
  reg = <0x00 0x23010000 0x00 0x100>;
  power-domains = <&k3_pds 87 1>;
  clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
  clock-names = "tbclk", "fck";
  status = "disabled";
 };

 epwm2: pwm@23020000 {
  compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
  #pwm-cells = <3>;
  reg = <0x00 0x23020000 0x00 0x100>;
  power-domains = <&k3_pds 88 1>;
  clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
  clock-names = "tbclk", "fck";
  status = "disabled";
 };

 mcasp0: audio-controller@2b00000 {
  compatible = "ti,am33xx-mcasp-audio";
  reg = <0x00 0x02b00000 0x00 0x2000>,
        <0x00 0x02b08000 0x00 0x400>;
  reg-names = "mpu", "dat";
  interrupts = <0 236 4>,
        <0 235 4>;
  interrupt-names = "tx", "rx";

  dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
  dma-names = "tx", "rx";

  clocks = <&k3_clks 190 0>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 190 0>;
  assigned-clock-parents = <&k3_clks 190 2>;
  power-domains = <&k3_pds 190 1>;
  status = "disabled";
 };

 mcasp1: audio-controller@2b10000 {
  compatible = "ti,am33xx-mcasp-audio";
  reg = <0x00 0x02b10000 0x00 0x2000>,
        <0x00 0x02b18000 0x00 0x400>;
  reg-names = "mpu", "dat";
  interrupts = <0 238 4>,
        <0 237 4>;
  interrupt-names = "tx", "rx";

  dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
  dma-names = "tx", "rx";

  clocks = <&k3_clks 191 0>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 191 0>;
  assigned-clock-parents = <&k3_clks 191 2>;
  power-domains = <&k3_pds 191 1>;
  status = "disabled";
 };

 mcasp2: audio-controller@2b20000 {
  compatible = "ti,am33xx-mcasp-audio";
  reg = <0x00 0x02b20000 0x00 0x2000>,
        <0x00 0x02b28000 0x00 0x400>;
  reg-names = "mpu", "dat";
  interrupts = <0 240 4>,
        <0 239 4>;
  interrupt-names = "tx", "rx";

  dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
  dma-names = "tx", "rx";

  clocks = <&k3_clks 192 0>;
  clock-names = "fck";
  assigned-clocks = <&k3_clks 192 0>;
  assigned-clock-parents = <&k3_clks 192 2>;
  power-domains = <&k3_pds 192 1>;
  status = "disabled";
 };
};
# 107 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62.dtsi" 2
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-mcu.dtsi" 1







&cbass_mcu {
 mcu_pmx0: pinctrl@4084000 {
  compatible = "pinctrl-single";
  reg = <0x00 0x04084000 0x00 0x88>;
  #pinctrl-cells = <1>;
  pinctrl-single,register-width = <32>;
  pinctrl-single,function-mask = <0xffffffff>;
 };






 mcu_timer0: timer@4800000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x4800000 0x00 0x400>;
  clocks = <&k3_clks 35 2>;
  clock-names = "fck";
  power-domains = <&k3_pds 35 1>;
  ti,timer-pwm;
  status = "reserved";
 };

 mcu_timer1: timer@4810000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x4810000 0x00 0x400>;
  clocks = <&k3_clks 48 2>;
  clock-names = "fck";
  power-domains = <&k3_pds 48 1>;
  ti,timer-pwm;
  status = "reserved";
 };

 mcu_timer2: timer@4820000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x4820000 0x00 0x400>;
  clocks = <&k3_clks 49 2>;
  clock-names = "fck";
  power-domains = <&k3_pds 49 1>;
  ti,timer-pwm;
  status = "reserved";
 };

 mcu_timer3: timer@4830000 {
  compatible = "ti,am654-timer";
  reg = <0x00 0x4830000 0x00 0x400>;
  clocks = <&k3_clks 50 2>;
  clock-names = "fck";
  power-domains = <&k3_pds 50 1>;
  ti,timer-pwm;
  status = "reserved";
 };

 mcu_uart0: serial@4a00000 {
  compatible = "ti,am64-uart", "ti,am654-uart";
  reg = <0x00 0x04a00000 0x00 0x100>;
  interrupts = <0 185 4>;
  power-domains = <&k3_pds 149 1>;
  clocks = <&k3_clks 149 0>;
  clock-names = "fclk";
  status = "disabled";
 };

 mcu_i2c0: i2c@4900000 {
  compatible = "ti,am64-i2c", "ti,omap4-i2c";
  reg = <0x00 0x04900000 0x00 0x100>;
  interrupts = <0 107 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 106 1>;
  clocks = <&k3_clks 106 2>;
  clock-names = "fck";
  status = "disabled";
 };

 mcu_spi0: spi@4b00000 {
  compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
  reg = <0x00 0x04b00000 0x00 0x400>;
  interrupts = <0 176 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 147 1>;
  clocks = <&k3_clks 147 0>;
  status = "disabled";
 };

 mcu_spi1: spi@4b10000 {
  compatible = "ti,am654-mcspi","ti,omap4-mcspi";
  reg = <0x00 0x04b10000 0x00 0x400>;
  interrupts = <0 177 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 148 1>;
  clocks = <&k3_clks 148 0>;
  status = "disabled";
 };

 mcu_gpio_intr: interrupt-controller@4210000 {
  compatible = "ti,sci-intr";
  reg = <0x00 0x04210000 0x00 0x200>;
  ti,intr-trigger-type = <1>;
  interrupt-controller;
  interrupt-parent = <&gic500>;
  #interrupt-cells = <1>;
  ti,sci = <&dmsc>;
  ti,sci-dev-id = <5>;
  ti,interrupt-ranges = <0 104 4>;
 };

 mcu_gpio0: gpio@4201000 {
  compatible = "ti,am64-gpio", "ti,keystone-gpio";
  reg = <0x00 0x4201000 0x00 0x100>;
  gpio-controller;
  #gpio-cells = <2>;
  interrupt-parent = <&mcu_gpio_intr>;
  interrupts = <30>, <31>;
  interrupt-controller;
  #interrupt-cells = <2>;
  ti,ngpio = <24>;
  ti,davinci-gpio-unbanked = <0>;
  power-domains = <&k3_pds 79 1>;
  clocks = <&k3_clks 79 0>;
  clock-names = "gpio";
 };

 mcu_m4fss: m4fss@5000000 {
  compatible = "ti,am64-m4fss";
  reg = <0x00 0x5000000 0x00 0x30000>,
   <0x00 0x5040000 0x00 0x10000>;
  reg-names = "iram", "dram";
  ti,sci = <&dmsc>;
  ti,sci-dev-id = <9>;
  ti,sci-proc-ids = <0x18 0xff>;
  resets = <&k3_reset 9 1>;
  firmware-name = "am62-mcu-m4f0_0-fw";
 };
};
# 108 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62.dtsi" 2
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-wakeup.dtsi" 1







&cbass_wakeup {
 wkup_conf: syscon@43000000 {
  compatible = "syscon", "simple-mfd";
  reg = <0x00 0x43000000 0x00 0x20000>;
  #address-cells = <1>;
  #size-cells = <1>;
  ranges = <0x0 0x00 0x43000000 0x20000>;

  chipid: chipid@14 {
   compatible = "ti,am654-chipid";
   reg = <0x14 0x4>;
  };
 };

 wkup_uart0: serial@2b300000 {
  compatible = "ti,am64-uart", "ti,am654-uart";
  reg = <0x00 0x2b300000 0x00 0x100>;
  interrupts = <0 186 4>;
  power-domains = <&k3_pds 114 1>;
  clocks = <&k3_clks 114 0>;
  clock-names = "fclk";
  status = "disabled";
 };

 wkup_i2c0: i2c@2b200000 {
  compatible = "ti,am64-i2c", "ti,omap4-i2c";
  reg = <0x00 0x2b200000 0x00 0x100>;
  interrupts = <0 165 4>;
  #address-cells = <1>;
  #size-cells = <0>;
  power-domains = <&k3_pds 107 1>;
  clocks = <&k3_clks 107 4>;
  clock-names = "fck";
  status = "disabled";
 };
};
# 109 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62.dtsi" 2
# 13 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am625.dtsi" 2

/ {
 cpus {
  #address-cells = <1>;
  #size-cells = <0>;

  cpu-map {
   cluster0: cluster0 {
    core0 {
     cpu = <&cpu0>;
    };

    core1 {
     cpu = <&cpu1>;
    };

    core2 {
     cpu = <&cpu2>;
    };

    core3 {
     cpu = <&cpu3>;
    };
   };
  };

  cpu0: cpu@0 {
   compatible = "arm,cortex-a53";
   reg = <0x000>;
   device_type = "cpu";
   enable-method = "psci";
   i-cache-size = <0x8000>;
   i-cache-line-size = <64>;
   i-cache-sets = <256>;
   d-cache-size = <0x8000>;
   d-cache-line-size = <64>;
   d-cache-sets = <128>;
   next-level-cache = <&L2_0>;
   operating-points-v2 = <&a53_opp_table>;
   clocks = <&k3_clks 135 0>;
  };

  cpu1: cpu@1 {
   compatible = "arm,cortex-a53";
   reg = <0x001>;
   device_type = "cpu";
   enable-method = "psci";
   i-cache-size = <0x8000>;
   i-cache-line-size = <64>;
   i-cache-sets = <256>;
   d-cache-size = <0x8000>;
   d-cache-line-size = <64>;
   d-cache-sets = <128>;
   next-level-cache = <&L2_0>;
   operating-points-v2 = <&a53_opp_table>;
   clocks = <&k3_clks 136 0>;
  };

  cpu2: cpu@2 {
   compatible = "arm,cortex-a53";
   reg = <0x002>;
   device_type = "cpu";
   enable-method = "psci";
   i-cache-size = <0x8000>;
   i-cache-line-size = <64>;
   i-cache-sets = <256>;
   d-cache-size = <0x8000>;
   d-cache-line-size = <64>;
   d-cache-sets = <128>;
   next-level-cache = <&L2_0>;
   operating-points-v2 = <&a53_opp_table>;
   clocks = <&k3_clks 137 0>;
  };

  cpu3: cpu@3 {
   compatible = "arm,cortex-a53";
   reg = <0x003>;
   device_type = "cpu";
   enable-method = "psci";
   i-cache-size = <0x8000>;
   i-cache-line-size = <64>;
   i-cache-sets = <256>;
   d-cache-size = <0x8000>;
   d-cache-line-size = <64>;
   d-cache-sets = <128>;
   next-level-cache = <&L2_0>;
   operating-points-v2 = <&a53_opp_table>;
   clocks = <&k3_clks 138 0>;
  };
 };

 a53_opp_table: opp-table {
  compatible = "operating-points-v2-ti-cpu";
  opp-shared;
  syscon = <&wkup_conf>;

  opp-200000000 {
   opp-hz = /bits/ 64 <200000000>;
   opp-supported-hw = <0x01 0x0007>;
   clock-latency-ns = <6000000>;
  };

  opp-400000000 {
   opp-hz = /bits/ 64 <400000000>;
   opp-supported-hw = <0x01 0x0007>;
   clock-latency-ns = <6000000>;
  };

  opp-600000000 {
   opp-hz = /bits/ 64 <600000000>;
   opp-supported-hw = <0x01 0x0007>;
   clock-latency-ns = <6000000>;
  };

  opp-800000000 {
   opp-hz = /bits/ 64 <800000000>;
   opp-supported-hw = <0x01 0x0007>;
   clock-latency-ns = <6000000>;
  };

  opp-1000000000 {
   opp-hz = /bits/ 64 <1000000000>;
   opp-supported-hw = <0x01 0x0006>;
   clock-latency-ns = <6000000>;
  };

  opp-1250000000 {
   opp-hz = /bits/ 64 <1250000000>;
   opp-supported-hw = <0x01 0x0004>;
   clock-latency-ns = <6000000>;
   opp-suspend;
  };
 };

 L2_0: l2-cache0 {
  compatible = "cache";
  cache-unified;
  cache-level = <2>;
  cache-size = <0x40000>;
  cache-line-size = <64>;
  cache-sets = <512>;
 };
};
# 11 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62x-sk-common.dtsi" 2

/ {
 aliases {
  serial0 = &main_uart2;
  serial1 = &main_uart1;
  serial2 = &main_uart0;
  serial3 = &main_uart3;
  serial4 = &main_uart4;
  serial5 = &main_uart5;
  serial6 = &main_uart6;
  serial7 = &mcu_uart0;
  serial8 = &wkup_uart0;
  mmc0 = &sdhci0;
  mmc1 = &sdhci1;
  mmc2 = &sdhci2;
  ethernet0 = &cpsw_port1;
  ethernet1 = &cpsw_port2;
  usb0 = &usb0;
  usb1 = &usb1;
  gpio0 = &main_gpio0;
  gpio2 = &mcu_gpio0;
 };

 chosen {
  stdout-path = "serial2:115200n8";
  bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
 };

 memory@80000000 {
  device_type = "memory";

  reg = <0x00000000 0x80000000 0x00000000 0x80000000>;

 };

 reserved-memory {
  #address-cells = <2>;
  #size-cells = <2>;
  ranges;

  ramoops@9ca00000 {
   compatible = "ramoops";
   reg = <0x00 0x9ca00000 0x00 0x00100000>;
   record-size = <0x8000>;
   console-size = <0x8000>;
   ftrace-size = <0x00>;
   pmsg-size = <0x8000>;
  };

  secure_tfa_ddr: tfa@9e780000 {
   reg = <0x00 0x9e780000 0x00 0x80000>;
   alignment = <0x1000>;
   no-map;
  };

  secure_ddr: optee@9e800000 {
   reg = <0x00 0x9e800000 0x00 0x01800000>;
   alignment = <0x1000>;
   no-map;
  };

  wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
   compatible = "shared-dma-pool";
   reg = <0x00 0x9db00000 0x00 0xc00000>;
   no-map;
  };
 };

 leds {
  compatible = "gpio-leds";
  pinctrl-names = "default";
  pinctrl-0 = <&usr_led_pins_default>;

  system-led {
   label = "system-led";
   gpios = <&main_gpio0 0 0>;
   linux,default-trigger = "none";
   function = "status";
   default-state = "on";
  };
 };
};

&main_pmx0 {
 bootph-pre-ram;

 main_uart0_pins_default: main-uart0-default-pins {
  pinctrl-single,pins = <
   (((0x01c8) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x01cc) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
  >;
 };
 main_uart2_pins_default: main-uart2-default-pins {
  pinctrl-single,pins = <
   (((0x005c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (2))
   (((0x0060) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (2))
  >;
  bootph-pre-ram;
 };
 main_uart3_pins_default: main-uart3-default-pins {
  pinctrl-single,pins = <
   (((0x0064) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (2))
   (((0x0068) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (2))
  >;
  bootph-pre-ram;
 };
 main_uart4_pins_default: main-uart4-default-pins {
  pinctrl-single,pins = <
   (((0x006c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (2))
   (((0x0070) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (2))
  >;
  bootph-pre-ram;
 };
 main_uart5_pins_default: main-uart5-default-pins {
  pinctrl-single,pins = <
   (((0x0074) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (2))
   (((0x0078) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (2))
  >;
  bootph-pre-ram;
 };
 main_uart6_pins_default: main-uart6-default-pins {
  pinctrl-single,pins = <
   (((0x009c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (3))
   (((0x00a0) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (3))
  >;
  bootph-pre-ram;
 };

 main_dmb21_gpio_pins_default: main-dmb21-gpio-pins-default {
  pinctrl-single,pins = <
   (((0x0110) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0120) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0118) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0108) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0124) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0114) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0128) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x010c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0038) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x002c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
  >;
  bootph-pre-ram;
 };

 main_dmb22_gpio_pins_default: main-dmb22-gpio-pins-default {
  pinctrl-single,pins = <
   (((0x0084) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0088) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x008c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0090) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00c4) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00c0) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00cc) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00c8) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00ec) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00d4) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
  >;
  bootph-pre-ram;
 };

 main_i2c0_pins_default: main-i2c0-pins-default {
  pinctrl-single,pins = <
   (((0x1e0) & 0x1fff)) ((((1 << (18)) | (1 << (17) | (0 << (16))))) | (0))
   (((0x1e4) & 0x1fff)) ((((1 << (18)) | (1 << (17) | (0 << (16))))) | (0))
  >;
 };

 main_i2c1_pins_default: main-i2c1-pins-default {
  pinctrl-single,pins = <
   (((0x1e8) & 0x1fff)) ((((1 << (18)) | (1 << (17) | (0 << (16))))) | (0))
   (((0x1ec) & 0x1fff)) ((((1 << (18)) | (1 << (17) | (0 << (16))))) | (0))
  >;
 };

 main_i2c2_pins_default: main-i2c2-pins-default {
  pinctrl-single,pins = <
   (((0x0b0) & 0x1fff)) ((((1 << (18)) | (1 << (17) | (0 << (16))))) | (1))
   (((0x0b4) & 0x1fff)) ((((1 << (18)) | (1 << (17) | (0 << (16))))) | (1))
  >;
 };

 main_mmc0_pins_default: main-mmc0-pins-default {
  pinctrl-single,pins = <
   (((0x220) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x218) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x214) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x210) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x20c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x208) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x204) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x200) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x1fc) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x1f8) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x0044) & 0x1fff)) ((((1 << (18)) | (1 << (17) | (0 << (16))))) | (7))
  >;
 };

 main_mmc1_pins_default: main-mmc1-pins-default {
  pinctrl-single,pins = <
   (((0x23c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x234) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x230) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x22c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x228) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x224) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x240) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
  >;
 };

 usr_led_pins_default: usr-led-pins-default {
  pinctrl-single,pins = <
   (((0x0000) & 0x1fff)) ((((1 << (18)) | (0 << (17) | (0 << (16))))) | (7))
   (((0x001c) & 0x1fff)) ((((1 << (18)) | (0 << (17) | (0 << (16))))) | (7))
   (((0x0024) & 0x1fff)) ((((1 << (18)) | (0 << (17) | (0 << (16))))) | (7))
   (((0x00bc) & 0x1fff)) ((((1 << (18)) | (0 << (17) | (0 << (16))))) | (7))
   (((0x00b8) & 0x1fff)) ((((1 << (18)) | (0 << (17) | (0 << (16))))) | (7))
   (((0x00e4) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0034) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0018) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00dc) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0098) & 0x1fff)) ((((1 << (18)) | (0 << (17) | (0 << (16))))) | (7))
   (((0x00d0) & 0x1fff)) ((((1 << (18)) | (0 << (17) | (0 << (16))))) | (7))
   (((0x00d8) & 0x1fff)) ((((1 << (18)) | (1 << (17) | (0 << (16))))) | (7))
   (((0x01c4) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))


   (((0x0194) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0198) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0100) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0104) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00f8) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00fc) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00f0) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00f4) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0008) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00e8) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0028) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x00e0) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
  >;
 };

 main_mdio1_pins_default: main-mdio1-pins-default {
  pinctrl-single,pins = <
   (((0x160) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x15c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x0040) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
  >;
 };

 main_rgmii1_pins_default: main-rgmii1-pins-default {
  pinctrl-single,pins = <
   (((0x14c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x150) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x154) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x158) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x148) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x144) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x134) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x138) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x13c) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x140) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x130) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x12c) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
  >;
 };

 main_rgmii2_pins_default: main-rgmii2-pins-default {
  pinctrl-single,pins = <
   (((0x0184) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x0188) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x018c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x0190) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x0180) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x017c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x016c) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x0170) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x0174) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x0178) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x0168) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
   (((0x0164) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
  >;
 };

 main_usb1_pins_default: main-usb1-pins-default {
  pinctrl-single,pins = <
   (((0x0258) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
  >;
 };
};

&mcu_pmx0 {
 bootph-pre-ram;
 mcu_uart0_pins_default: mcu-uart0-default-pins {
  pinctrl-single,pins = <
   (((0x0014) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x0018) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
  >;
  bootph-pre-ram;
 };

 mcu_wkupsystem_pins_default: mcu-wkupsystem-default-pins {
  pinctrl-single,pins = <
   (((0x0080) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
  >;
 };

 mcu_wkup_uart0_pins_default: mcu-wkup-uart0-default-pins {
  pinctrl-single,pins = <
   (((0x0024) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x0028) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
  >;
  bootph-pre-ram;
 };
};

&mcu_uart0 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&mcu_uart0_pins_default>,
    <&main_dmb21_gpio_pins_default>;
 port-num = <21>;
 bootph-pre-ram;
};

&wkup_uart0 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&mcu_wkup_uart0_pins_default>,
    <&main_dmb22_gpio_pins_default>;
 port-num = <22>;
 bootph-pre-ram;
};

&main_uart0 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_uart0_pins_default>;
};

&main_uart1 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_uart1_pins_default>;
 port-num = <11>;
};

&main_uart2 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_uart2_pins_default>;
 port-num = <12>;
};

&main_uart3 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_uart3_pins_default>;
 port-num = <13>;
};

&main_uart4 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_uart4_pins_default>;
 port-num = <14>;
};

&main_uart5 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_uart5_pins_default>;
 port-num = <15>;
};

&main_uart6 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_uart6_pins_default>;
 port-num = <16>;
};

&main_i2c0 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_i2c0_pins_default>;
 clock-frequency = <400000>;
};

&main_i2c1 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_i2c1_pins_default>;
 clock-frequency = <400000>;

 tlv320aic3106: audio-codec@1b {
  #sound-dai-cells = <0>;
  compatible = "ti,tlv320aic3106";
  reg = <0x1b>;
  ai3x-micbias-vg = <1>;


  AVDD-supply = <&vcc_3v3_sys>;
  IOVDD-supply = <&vcc_3v3_sys>;
  DRVDD-supply = <&vcc_3v3_sys>;
 };
};

&sdhci0 {
 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_mmc0_pins_default>;
 disable-wp;
};

&sdhci1 {

 status = "okay";
 pinctrl-names = "default";
 pinctrl-0 = <&main_mmc1_pins_default>;
 disable-wp;
};

&cpsw3g {
 pinctrl-names = "default";
};

&cpsw_port1 {
 phy-mode = "rgmii-rxid";
 phy-handle = <&cpsw3g_phy0>;
};

&cpsw_port2 {
 phy-mode = "rgmii-rxid";
 phy-handle = <&cpsw3g_phy1>;
};

&cpsw3g_mdio {
 status = "okay";

 cpsw3g_phy0: ethernet-phy@0 {
  reg = <0>;
 };

 cpsw3g_phy1: ethernet-phy@1 {
  reg = <1>;
 };
};

&mailbox0_cluster0 {
 mbox_m4_0: mbox-m4-0 {
  ti,mbox-rx = <0 0 0>;
  ti,mbox-tx = <1 0 0>;
 };
};

&usbss0 {
 status = "disabled";
 ti,vbus-divider;
};

&usbss1 {
 status = "disabled";
 ti,vbus-divider;
};

&usb0 {
 status = "disabled";
 dr_mode = "peripheral";
};

&usb1 {
 status = "disabled";
 dr_mode = "host";
 pinctrl-names = "default";
 pinctrl-0 = <&main_usb1_pins_default>;
};

&cbass_mcu {
 mcu_esm: esm@4100000 {
  compatible = "ti,j721e-esm";
  reg = <0x0 0x4100000 0x0 0x1000>;
  ti,esm-pins = <0>, <1>, <2>, <85>;
  bootph-pre-ram;
 };
};

&cbass_main {
 sa3_secproxy: secproxy@44880000 {
  bootph-pre-ram;
  compatible = "ti,am654-secure-proxy";
  #mbox-cells = <1>;
  reg-names = "rt", "scfg", "target_data";
  reg = <0x00 0x44880000 0x00 0x20000>,
        <0x0 0x44860000 0x0 0x20000>,
        <0x0 0x43600000 0x0 0x10000>;
 };

 sysctrler: sysctrler {
  compatible = "ti,am654-system-controller";
  mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>;
  mbox-names = "tx", "rx", "boot_notify";
  bootph-pre-ram;
 };

 main_esm: esm@420000 {
  compatible = "ti,j721e-esm";
  reg = <0x0 0x420000 0x0 0x1000>;
  ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
  bootph-pre-ram;
 };
};

&mcu_gpio0 {
 pinctrl-names = "default";
 pinctrl-0 = <&mcu_gpio1_pins_default>;
 status = "okay";
};

&main_gpio0 {
 pinctrl-names = "default";
 pinctrl-0 = <&usr_led_pins_default>;
 status = "okay";
};

&mcu_pmx0 {
 bootph-pre-ram;

 wkup_uart0_pins_default: wkup-uart0-pins-default {
  pinctrl-single,pins = <
   (((0x024) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
   (((0x028) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (0))
  >;
  bootph-pre-ram;
 };

 mcu_gpio1_pins_default: mcu-gpio1-default-pins {
  pinctrl-single,pins = <
   (((0x002c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0030) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x001c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x0020) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
   (((0x003c) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
  >;
 };

 gbe_pmx_obsclk: gbe-pmx-clk-default {
  pinctrl-single,pins = <
   (((0x0004) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (1))
  >;
  bootph-pre-ram;
 };
};


&main_pmx0 {
 bootph-pre-ram;
 main_uart1_pins_default: main-uart1-pins-default {
  pinctrl-single,pins = <
   (((0x01e8) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (1))
   (((0x01b0) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (2))
  >;
  bootph-pre-ram;
 };
};

&mcasp0 {
 status = "disabled";
};

&mcasp1 {
 status = "disabled";
};

&mcasp2 {
 status = "disabled";
};
# 11 "arch/arm/dts/.k3-am62-lp-sk.dtb.pre.tmp" 2

/ {
 compatible = "ti,am62-lp-sk", "ti,am625";
 model = "CPB579 AM62x LP";

 vmain_pd: regulator-0 {

  compatible = "regulator-fixed";
  regulator-name = "vmain_pd";
  regulator-min-microvolt = <5000000>;
  regulator-max-microvolt = <5000000>;
  regulator-always-on;
  regulator-boot-on;
 };

 vcc_5v0: regulator-1 {

  compatible = "regulator-fixed";
  regulator-name = "vcc_5v0";
  regulator-min-microvolt = <5000000>;
  regulator-max-microvolt = <5000000>;
  vin-supply = <&vmain_pd>;
  regulator-always-on;
  regulator-boot-on;
 };

 vcc_3v3_sys: regulator-2 {

  compatible = "regulator-fixed";
  regulator-name = "vcc_3v3_sys";
  regulator-min-microvolt = <3300000>;
  regulator-max-microvolt = <3300000>;
  vin-supply = <&vmain_pd>;
  regulator-always-on;
  regulator-boot-on;
 };

 vdd_mmc1: regulator-3 {

  compatible = "regulator-fixed";
  regulator-name = "vdd_mmc1";
  regulator-min-microvolt = <3300000>;
  regulator-max-microvolt = <3300000>;
  regulator-boot-on;
  enable-active-high;
  vin-supply = <&vcc_3v3_sys>;
 };

 vddshv_sdio: regulator-4 {
  compatible = "regulator-gpio";
  regulator-name = "vddshv_sdio";
  pinctrl-names = "default";
  pinctrl-0 = <&vddshv_sdio_pins_default>;
  regulator-min-microvolt = <1800000>;
  regulator-max-microvolt = <3300000>;
  regulator-boot-on;
  vin-supply = <&ldo1_reg>;
  gpios = <&main_gpio0 31 0>;
  states = <1800000 0x0>,
    <3300000 0x1>;
 };

 panel_lvds: panel-lvds {
  bootph-pre-ram;
  compatible = "simple-panel";
  status= "okay";
  width-mm = <217>;
  height-mm = <136>;
  data-mapping = "vesa-24";
  panel-timings {
    bootph-pre-ram;
    clock-frequency = <150274>;
    hactive = <1920>;
    vactive = <1200>;
    hback-porch = <32>;
    hfront-porch = <52>;
    vback-porch = <24>;
    vfront-porch = <8>;
    hsync-len = <24>;
    vsync-len = <3>;
    de-active = <1>;
  };
  port@0 {
   dual-lvds-odd-pixels;
   lcd_in0: endpoint {
    remote-endpoint = <&oldi_out0>;
   };
  };

  port@1 {
   dual-lvds-even-pixels;
   lcd_in1: endpoint {
    remote-endpoint = <&oldi_out1>;
   };
  };
 };
};

&main_pmx0 {
 vddshv_sdio_pins_default: vddshv-sdio-pins-default {
  pinctrl-single,pins = <
   (((0x07c) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (7))
  >;
 };

 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
  pinctrl-single,pins = <
   (((0x01d4) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (7))
  >;
 };

 pmic_irq_pins_default: pmic-irq-pins-default {
  pinctrl-single,pins = <
   (((0x01f4) & 0x1fff)) ((((1 << (18)) | (1 << (16)))) | (0))
  >;
 };

 ospi0_pins_default: ospi0-pins-default {
  pinctrl-single,pins = <
  >;
 };
};

&main_i2c1 {
};

&sdhci1 {
 vmmc-supply = <&vdd_mmc1>;
 vqmmc-supply = <&vddshv_sdio>;
};

&main_i2c0 {
 tps65219: pmic@30 {
  compatible = "ti,tps65219";
  reg = <0x30>;
  buck1-supply = <&vcc_3v3_sys>;
  buck2-supply = <&vcc_3v3_sys>;
  buck3-supply = <&vcc_3v3_sys>;
  ldo1-supply = <&vcc_3v3_sys>;
  ldo2-supply = <&buck2_reg>;
  ldo3-supply = <&vcc_3v3_sys>;
  ldo4-supply = <&vcc_3v3_sys>;

  pinctrl-names = "default";
  pinctrl-0 = <&pmic_irq_pins_default>;

  interrupt-parent = <&gic500>;
  interrupts = <0 224 4>;
  ti,power-button;

  regulators {
   buck1_reg: buck1 {
    regulator-name = "VDD_CORE";
    regulator-min-microvolt = <750000>;
    regulator-max-microvolt = <750000>;
    regulator-boot-on;
    regulator-always-on;
   };

   buck2_reg: buck2 {
    regulator-name = "VCC1V8_SYS";
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    regulator-boot-on;
    regulator-always-on;
   };

   buck3_reg: buck3 {
    regulator-name = "VDD_LPDDR4";
    regulator-min-microvolt = <1100000>;
    regulator-max-microvolt = <1100000>;
    regulator-boot-on;
    regulator-always-on;
   };

   ldo1_reg: ldo1 {
    regulator-name = "VDDSHV_SDIO";
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
   };

   ldo2_reg: ldo2 {
    regulator-name = "VDDAR_CORE";
    regulator-min-microvolt = <850000>;
    regulator-max-microvolt = <850000>;
    regulator-boot-on;
    regulator-always-on;
   };

   ldo3_reg: ldo3 {
    regulator-name = "VDDA_1V8";
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    regulator-boot-on;
    regulator-always-on;
   };

   ldo4_reg: ldo4 {
    regulator-name = "VDD_1V2";
    regulator-min-microvolt = <1200000>;
    regulator-max-microvolt = <1200000>;
    regulator-boot-on;
    regulator-always-on;
   };
  };
 };
};

&tlv320aic3106 {
 DVDD-supply = <&buck2_reg>;
};

&usbss0 {
 status = "okay";
 ti,vbus-divider;
};

&usb0 {
 status = "okay";
 dr_mode = "peripheral";
};

&dss_ports {
 #address-cells = <1>;
 #size-cells = <0>;

 port@0 {
  reg = <0>;
  oldi_out0: endpoint {
   remote-endpoint = <&lcd_in0>;
  };
 };


 port@2 {
  reg = <2>;
  oldi_out1: endpoint {
   remote-endpoint = <&lcd_in1>;
  };
 };

};
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi" 1






# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-lp-sk-binman.dtsi" 1





# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am625-sk-binman.dtsi" 1





# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-binman.dtsi" 1





# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-security.h" 1
# 7 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-binman.dtsi" 2

/ {
 binman: binman {
  multiple-images;
 };
};

&binman {
 custMpk {
  filename = "custMpk.pem";
  blob-ext {
   filename = "../keys/custMpk.pem";
  };
 };

 ti-degenerate-key {
  filename = "ti-degenerate-key.pem";
  blob-ext {
   filename = "../keys/ti-degenerate-key.pem";
  };
 };
};
# 7 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am625-sk-binman.dtsi" 2
# 150 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am625-sk-binman.dtsi"
&binman {
 ti-dm {
  filename = "ti-dm.bin";
  blob-ext {
   filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f";
   optional;
  };
 };

 tifsstub-hs {
  filename = "tifsstub.bin_hs";
  ti-secure-rom {
   content = <&tifsstub_hs_cert>;
   core = "secure";
   load = <0x40000>;
   sw-rev = <1>;
   keyfile = "custMpk.pem";
   countersign;
   tifsstub;
  };
  tifsstub_hs_cert: tifsstub-hs-cert.bin {
   filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin";
   type = "blob-ext";
   optional;
  };
  tifsstub_hs_enc: tifsstub-hs-enc.bin {
   filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin";
   type = "blob-ext";
   optional;
  };
 };

 tifsstub-fs {
  filename = "tifsstub.bin_fs";
  tifsstub_fs_cert: tifsstub-fs-cert.bin {
   filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin";
   type = "blob-ext";
   optional;
  };
  tifsstub_fs_enc: tifsstub-fs-enc.bin {
   filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin";
   type = "blob-ext";
   optional;
  };

 };

 tifsstub-gp {
  filename = "tifsstub.bin_gp";
  ti-secure-rom {
   content = <&tifsstub_gp>;
   core = "secure";
   load = <0x60000>;
   sw-rev = <1>;
   keyfile = "ti-degenerate-key.pem";
   tifsstub;
  };
  tifsstub_gp: tifsstub-gp.bin {
   filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin";
   type = "blob-ext";
   optional;
  };
 };

 ti-spl {
  filename = "tispl.bin";
  pad-byte = <0xff>;

  fit {
   description = "Configuration to load ATF and SPL";
   #address-cells = <1>;

   images {

    atf {
     description = "ARM Trusted Firmware";
     type = "firmware";
     arch = "arm64";
     compression = "none";
     os = "arm-trusted-firmware";
     load = <0x9e780000>;
     entry = <0x9e780000>;
     ti-secure {
      content = <&atf>;
      keyfile = "custMpk.pem";
     };
     atf: atf-bl31 {
     };
    };

    tee {
     description = "OPTEE";
     type = "tee";
     arch = "arm64";
     compression = "none";
     os = "tee";
     load = <0x9e800000>;
     entry = <0x9e800000>;
     ti-secure {
      content = <&tee>;
      keyfile = "custMpk.pem";
     };
     tee: tee-os {
     };
    };

    tifsstub-hs {
     description = "TIFSSTUB";
     type = "firmware";
     arch = "arm32";
     compression = "none";
     os = "tifsstub-hs";
     load = <0x9dc00000>;
     entry = <0x9dc00000>;
     blob-ext {
      filename = "tifsstub.bin_hs";
     };
    };

    tifsstub-fs {
     description = "TIFSSTUB";
     type = "firmware";
     arch = "arm32";
     compression = "none";
     os = "tifsstub-fs";
     load = <0x9dc00000>;
     entry = <0x9dc00000>;
     blob-ext {
      filename = "tifsstub.bin_fs";
     };
    };

    tifsstub-gp {
     description = "TIFSSTUB";
     type = "firmware";
     arch = "arm32";
     compression = "none";
     os = "tifsstub-gp";
     load = <0x9dc00000>;
     entry = <0x9dc00000>;
     blob-ext {
      filename = "tifsstub.bin_gp";
     };
    };

    dm {
     description = "DM binary";
     type = "firmware";
     arch = "arm32";
     compression = "none";
     os = "DM";
     load = <0x89000000>;
     entry = <0x89000000>;
     ti-secure {
      content = <&dm>;
      keyfile = "custMpk.pem";
     };
     dm: ti-dm {
      filename = "ti-dm.bin";
     };
    };

    spl {
     description = "SPL (64-bit)";
     type = "standalone";
     os = "U-Boot";
     arch = "arm64";
     compression = "none";
     load = <0x80080000>;
     entry = <0x80080000>;
     ti-secure {
      content = <&u_boot_spl_nodtb>;
      keyfile = "custMpk.pem";
     };
     u_boot_spl_nodtb: blob-ext {
      filename = "spl/u-boot-spl-nodtb.bin";
     };
    };

    fdt-0 {
     description = "k3-am625-sk";
     type = "flat_dt";
     arch = "arm";
     compression = "none";
     ti-secure {
      content = <&spl_am625_sk_dtb>;
      keyfile = "custMpk.pem";
     };
     spl_am625_sk_dtb: blob-ext {
      filename = "spl/dts/k3-am625-sk.dtb";
     };

    };

   };

   configurations {
    default = "conf-0";

    conf-0 {
     description = "k3-am625-sk";
     firmware = "atf";
     loadables = "tee", "tifsstub-hs", "tifsstub-fs",
        "tifsstub-gp", "dm", "spl";
     fdt = "fdt-0";
    };
   };
  };
 };
};

&binman {
 u-boot {
  filename = "u-boot.img";
  pad-byte = <0xff>;

  fit {
   description = "FIT image with multiple configurations";

   images {
    uboot {
     description = "U-Boot for AM625 board";
     type = "firmware";
     os = "u-boot";
     arch = "arm";
     compression = "none";
     load = <0x80800000>;
     ti-secure {
      content = <&u_boot_nodtb>;
      keyfile = "custMpk.pem";
     };
     u_boot_nodtb: u-boot-nodtb {
     };
     hash {
      algo = "crc32";
     };
    };

    fdt-0 {
     description = "k3-am625-sk";
     type = "flat_dt";
     arch = "arm";
     compression = "none";
     ti-secure {
      content = <&am625_sk_dtb>;
      keyfile = "custMpk.pem";
     };
     am625_sk_dtb: blob-ext {
      filename = "u-boot.dtb";
     };
     hash {
      algo = "crc32";
     };
    };
   };

   configurations {
    default = "conf-0";

    conf-0 {
     description = "k3-am625-sk";
     firmware = "uboot";
     loadables = "uboot";
     fdt = "fdt-0";
    };

   };
  };
 };
};

&binman {
 ti-spl_unsigned {
  filename = "tispl.bin_unsigned";
  pad-byte = <0xff>;

  fit {
   description = "Configuration to load ATF and SPL";
   #address-cells = <1>;

   images {

    atf {
     description = "ARM Trusted Firmware";
     type = "firmware";
     arch = "arm64";
     compression = "none";
     os = "arm-trusted-firmware";
     load = <0x9e780000>;
     entry = <0x9e780000>;
     atf-bl31 {
      filename = "bl31.bin";
     };
    };

    tee {
     description = "OPTEE";
     type = "tee";
     arch = "arm64";
     compression = "none";
     os = "tee";
     load = <0x9e800000>;
     entry = <0x9e800000>;
     tee-os {
      filename = "tee-pager_v2.bin";
     };
    };

    tifsstub-hs {
     description = "TIFSSTUB";
     type = "firmware";
     arch = "arm32";
     compression = "none";
     os = "tifsstub-hs";
     load = <0x9dc00000>;
     entry = <0x9dc00000>;
     blob-ext {
      filename = "tifsstub.bin_hs";
     };
    };

    tifsstub-fs {
     description = "TIFSSTUB";
     type = "firmware";
     arch = "arm32";
     compression = "none";
     os = "tifsstub-fs";
     load = <0x9dc00000>;
     entry = <0x9dc00000>;
     blob-ext {
      filename = "tifsstub.bin_fs";
     };
    };

    tifsstub-gp {
     description = "TIFSSTUB";
     type = "firmware";
     arch = "arm32";
     compression = "none";
     os = "tifsstub-gp";
     load = <0x9dc00000>;
     entry = <0x9dc00000>;
     blob-ext {
      filename = "tifsstub.bin_gp";
     };
    };

    dm {
     description = "DM binary";
     type = "firmware";
     arch = "arm32";
     compression = "none";
     os = "DM";
     load = <0x89000000>;
     entry = <0x89000000>;
     ti-dm {
      filename = "ti-dm.bin";
     };
    };

    spl {
     description = "SPL (64-bit)";
     type = "standalone";
     os = "U-Boot";
     arch = "arm64";
     compression = "none";
     load = <0x80080000>;
     entry = <0x80080000>;
     blob {
      filename = "spl/u-boot-spl-nodtb.bin";
     };
    };

    fdt-0 {
     description = "k3-am625-sk";
     type = "flat_dt";
     arch = "arm";
     compression = "none";
     spl_am625_sk_dtb_unsigned: blob {
      filename = "spl/dts/k3-am625-sk.dtb";
     };
    };
   };

   configurations {
    default = "conf-0";

    conf-0 {
     description = "k3-am625-sk";
     firmware = "atf";
     loadables = "tee", "tifsstub-hs", "tifsstub-fs",
        "tifsstub-gp", "dm", "spl";
     fdt = "fdt-0";
    };
   };
  };
 };
};

&binman {
 u-boot_unsigned {
  filename = "u-boot.img_unsigned";
  pad-byte = <0xff>;

  fit {
   description = "FIT image with multiple configurations";

   images {
    uboot {
     description = "U-Boot for AM625 board";
     type = "firmware";
     os = "u-boot";
     arch = "arm";
     compression = "none";
     load = <0x80800000>;
     blob {
      filename = "u-boot-nodtb.bin";
     };
     hash {
      algo = "crc32";
     };
    };

    fdt-0 {
     description = "k3-am625-sk";
     type = "flat_dt";
     arch = "arm";
     compression = "none";
     am625_sk_dtb_unsigned: blob {
      filename = "u-boot.dtb";
     };
     hash {
      algo = "crc32";
     };
    };
   };

   configurations {
    default = "conf-0";

    conf-0 {
     description = "k3-am625-sk";
     firmware = "uboot";
     loadables = "uboot";
     fdt = "fdt-0";
    };
   };
  };
 };
};
# 7 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-lp-sk-binman.dtsi" 2





&spl_am625_sk_dtb {
 filename = "spl/dts/k3-am62-lp-sk.dtb";
};

&spl_am625_sk_dtb_unsigned {
 filename = "spl/dts/k3-am62-lp-sk.dtb";
};
# 8 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi" 2
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi" 1






/ {
 chosen {
  stdout-path = "serial2:115200n8";
  tick-timer = &timer1;
 };

 aliases {
  mmc0 = &sdhci0;
  mmc1 = &sdhci1;
 };

 memory@80000000 {
  bootph-pre-ram;
 };
};

&cbass_main{
 bootph-pre-ram;

 timer1: timer@2400000 {
  clock-frequency = <25000000>;
  bootph-pre-ram;
 };
};

&dmss {
 bootph-pre-ram;
};

&secure_proxy_main {
 bootph-pre-ram;
};

&dmsc {
 bootph-pre-ram;
 k3_sysreset: sysreset-controller {
  compatible = "ti,sci-sysreset";
  bootph-pre-ram;
 };
};

&k3_pds {
 bootph-pre-ram;
};

&k3_clks {
 bootph-pre-ram;
};

&k3_reset {
 bootph-pre-ram;
};

&wkup_conf {
 bootph-pre-ram;
};

&chipid {
 bootph-pre-ram;
};

&main_pmx0 {
 bootph-pre-ram;
};

&main_uart0 {
 bootph-pre-ram;
};

&main_uart0_pins_default {
 bootph-pre-ram;
};

&main_uart1 {
 bootph-pre-ram;
};

&main_uart2 {
 bootph-pre-ram;
};

&cbass_mcu {
 bootph-pre-ram;
};

&cbass_wakeup {
 bootph-pre-ram;
};

&mcu_pmx0 {
 bootph-pre-ram;
 gbe_pmx_obsclk: gbe-pmx-clk-default {
  pinctrl-single,pins = <
   (((0x0004) & 0x1fff)) ((((0 << (18)) | (1 << (16)))) | (1))
  >;
 };
};

&wkup_uart0 {
 bootph-pre-ram;
};

&mcu_uart0 {
 bootph-pre-ram;
};

&main_i2c0 {
 bootph-pre-ram;
};

&main_i2c0_pins_default {
 bootph-pre-ram;
};

&sdhci0 {
 bootph-pre-ram;
};

&sdhci1 {
 bootph-pre-ram;
};

&main_mmc1_pins_default {
 bootph-pre-ram;
};

&usbss0 {
 bootph-pre-ram;
};

&usb0 {
 dr_mode = "peripheral";

 /delete-property/ extcon;
 bootph-pre-ram;
};

&usbss1 {
 bootph-pre-ram;
};

&usb1 {
 bootph-pre-ram;
};

&main_usb1_pins_default {
 bootph-pre-ram;
};

&cpsw3g {
 reg = <0x0 0x8000000 0x0 0x200000>,
       <0x0 0x43000200 0x0 0x8>;
 reg-names = "cpsw_nuss", "mac_efuse";
 /delete-property/ ranges;

 pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>,
  <&gbe_pmx_obsclk>, <&main_mdio1_pins_default>;
 assigned-clocks = <&k3_clks 157 70>, <&k3_clks 157 20>;
 assigned-clock-parents = <&k3_clks 157 72>, <&k3_clks 157 22>;
 bootph-pre-ram;

 cpsw-phy-sel@04044 {
  compatible = "ti,am64-phy-gmii-sel";
  reg = <0x0 0x00104044 0x0 0x8>;
  bootph-pre-ram;
 };
};

&cpsw_port1 {
 phy-mode = "rgmii-rxid";
 phy-handle = <&cpsw3g_phy0>;
 bootph-pre-ram;
};

&cpsw_port2 {
 phy-mode = "rgmii-rxid";
 phy-handle = <&cpsw3g_phy1>;
 bootph-pre-ram;
};

&cpsw3g_mdio {
 status = "okay";
 pinctrl-names = "default";
 bootph-pre-ram;

 cpsw3g_phy0: ethernet-phy@0 {
  compatible = "marvell,88E1510";
  reg = <0>;
  device_type = "ethernet-phy";


  marvell,reg-init = <3 0x10 0 0x1011>;
  max-speed = <100>;
 };

 cpsw3g_phy1: ethernet-phy@1 {
  compatible = "marvell,88E1510";
  reg = <1>;
  device_type = "ethernet-phy";


  marvell,reg-init = <3 0x10 0 0x1011>;
  max-speed = <100>;
 };
};

&main_bcdma {
 bootph-pre-ram;
 reg = <0x00 0x485c0100 0x00 0x100>,
       <0x00 0x4c000000 0x00 0x20000>,
       <0x00 0x4a820000 0x00 0x20000>,
       <0x00 0x4aa40000 0x00 0x20000>,
       <0x00 0x4bc00000 0x00 0x100000>,
       <0x00 0x48600000 0x00 0x8000>,
       <0x00 0x484a4000 0x00 0x2000>,
       <0x00 0x484c2000 0x00 0x2000>;
 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt",
      "ringrt" , "cfg", "tchan", "rchan";
};

&main_pktdma {
 bootph-pre-ram;
 reg = <0x00 0x485c0000 0x00 0x100>,
       <0x00 0x4a800000 0x00 0x20000>,
       <0x00 0x4aa00000 0x00 0x20000>,
       <0x00 0x4b800000 0x00 0x200000>,
       <0x00 0x485e0000 0x00 0x10000>,
       <0x00 0x484a0000 0x00 0x2000>,
       <0x00 0x484c0000 0x00 0x2000>,
       <0x00 0x48430000 0x00 0x1000>;
 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
      "cfg", "tchan", "rchan", "rflow";
};

&fss {
 bootph-pre-ram;
};

&cpsw_port1 {
 bootph-pre-ram;
};

&main_rgmii1_pins_default {
 bootph-pre-ram;
};

&main_rgmii2_pins_default {
 bootph-pre-ram;
};

&main_mdio1_pins_default {
 bootph-pre-ram;
};

&usr_led_pins_default {
 bootph-pre-ram;
};

&cpsw3g_phy0 {
 bootph-pre-ram;
};

&dmsc {
 bootph-pre-ram;
 k3_sysreset: sysreset-controller {
  compatible = "ti,sci-sysreset";
  bootph-pre-ram;
 };
};

&main_gpio0 {
 bootph-pre-ram;
};

&main_i2c1 {
 bootph-pre-ram;
};

&main_i2c1_pins_default {
 bootph-pre-ram;
};

&vdd_mmc1 {
 bootph-pre-ram;
};
# 9 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi" 2
# 1 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-lp-sk-nand.dtsi" 1
# 10 "/arm/fsl-community-bsp-scarthgap/cpb579/tmp/work/cpb579-poky-linux/u-boot-ti-staging/0.01t095+git/git/arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi" 2

&vddshv_sdio {
 bootph-pre-ram;
};

&vddshv_sdio_pins_default {
 bootph-pre-ram;
};

&ospi0_pins_default {
 bootph-pre-ram;
};

&ospi0 {
 bootph-pre-ram;

 flash@0 {
  bootph-pre-ram;

  partitions {
   bootph-pre-ram;

   partition@7fc0000 {
    bootph-pre-ram;
   };
  };
 };
};
# 254 "arch/arm/dts/.k3-am62-lp-sk.dtb.pre.tmp" 2

The 'dm tree' command in u-boot indicates all serial devices are present.

NOTE: In Linux, all uarts are fully functional.

What could be missing in u-boot?

Thanks, Lars

  • Hi Lars,

    U-Boot is a boot loader which has a short life time and typically just runs to boot Linux kernel, why you would need all UART to be functional in U-Boot?

  • Hi Bin,

    Fair question - it is because we want to do all our board production hardware tests from u-boot.

    Regards, Lars

  • Hi Lars,

    First of all, we never enabled all UART in U-Boot, so this function is not validated in the SDK. But we can try something to see if we can make it work.

    What Processor SDK or U-Boot version do you use on your AM623 board?

  • Hi Bin,

    U-Boot 2023.04-ti-gf9b966c67473

    I also had a lot of issues getting gpio's to work. Found that using bootph-pre-ram; matters, and also where in the tree the pinctrl-0 gets set matters. I tried to set rx/tx as gpios, it can work. Now it strikes me, can it be missing clock setup for those uarts that does not work?

    Regards, Lars

  • Hi Lars,

    Please try to apply the following U-Boot patch to see if you can access other UART in U-Boot.

    diff --git a/arch/arm/mach-k3/am62x/dev-data.c b/arch/arm/mach-k3/am62x/dev-data.c
    index 140dca4bd1df..41f93f6f5216 100644
    --- a/arch/arm/mach-k3/am62x/dev-data.c
    +++ b/arch/arm/mach-k3/am62x/dev-data.c
    @@ -61,6 +61,12 @@ static struct ti_dev soc_dev_list[] = {
            PSC_DEV(36, &soc_lpsc_list[11]),
            PSC_DEV(102, &soc_lpsc_list[11]),
            PSC_DEV(146, &soc_lpsc_list[11]),
    +       PSC_DEV(152, &soc_lpsc_list[11]),       /* uart1 */
    +       PSC_DEV(153, &soc_lpsc_list[11]),       /* uart2 */
    +       PSC_DEV(154, &soc_lpsc_list[11]),       /* uart3 */
    +       PSC_DEV(155, &soc_lpsc_list[11]),       /* uart4 */
    +       PSC_DEV(156, &soc_lpsc_list[11]),       /* uart5 */
    +       PSC_DEV(158, &soc_lpsc_list[11]),       /* uart6 */
            PSC_DEV(13, &soc_lpsc_list[12]),
            PSC_DEV(166, &soc_lpsc_list[13]),
            PSC_DEV(135, &soc_lpsc_list[14]),
    @@ -75,5 +81,5 @@ const struct ti_k3_pd_platdata am62x_pd_platdata = {
            .num_psc = 2,
            .num_pd = 5,
            .num_lpsc = 16,
    -       .num_devs = 21,
    +       .num_devs = ARRAY_SIZE(soc_dev_list),
     };

  • Hi Bin,

    I applied the patch, but the issue remains.

    Regards, Lars

  • Hi Lars,

    I will try to play with it on my EVM and get back to you next week.

  • Hi Lars,

    Additionally, please add the following property to all the enabled UART nodes in U-Boot k3-am62x-sk-common.dtsi, and let me know if it makes all UART work.

    clock-frequency = <48000000>;
  • Hi Bin,

    Ok, my element (uart2) looks like below (disassembled .dtb), but still no output.

    serial@2820000 {
    compatible = "ti,am64-uart\0ti,am654-uart";
    reg = <0x00 0x2820000 0x00 0x100>;
    interrupts = <0x00 0xb4 0x04>;
    power-domains = <0x03 0x99 0x01>;
    clocks = <0x02 0x99 0x00>;
    clock-names = "fclk";
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <0x12>;
    port-num = <0x0c>;
    clock-frequency = <0x2dc6c00>;
    phandle = <0x71>;
    };

  • Lars,

    Initially I was able to switch U-Boot console from UART0 to UART1 using the similar patches I provided above. Today I tried the similar procedure to switch the console to UART5 but failed.

    As I mentioned earlier in this thread, the SDK never tried to enable all other UART ports, so I am not sure how long time it would take for me to enable all other UART in U-Boot, so I recommend you to test your board UART hardware in Linux instead of U-Boot since you have already got all the UART working in Linux.

  • Ok, we will manage, however, I hope this will be sorted out at some point.

  • Yes, I am taking a note on my computer that I will provide the patch once I resolved the issue at some point later.