Tool/software:
Hi,
For our business logic, we want to configure a PWM O/P at defined frequency (30Hz). Question is can we have the same PWM interface be configured to interrupt (the SoC) when there's a rising or falling edge ?
Thanks,
Deepak Kumar
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Tool/software:
Hi,
For our business logic, we want to configure a PWM O/P at defined frequency (30Hz). Question is can we have the same PWM interface be configured to interrupt (the SoC) when there's a rising or falling edge ?
Thanks,
Deepak Kumar
The PWM can generate an interrupt upon any of these events:
• Time-base counter equal to zero (EPWM_TBCNT[15-0] TBCNT = 0000h).
• Time-base counter equal to period (EPWM_TBCNT[15-0] TBCNT = EPWM_TBPRD[15-0] TBPRD).
• Time-base counter equal to the compare A register (EPWM_CMPA) when the timer is incrementing.
• Time-base counter equal to the compare A register (EPWM_CMPA) when the timer is decrementing.
• Time-base counter equal to the compare B register (EPWM_CMPB) when the timer is incrementing.
• Time-base counter equal to the compare B register (EPWM_CMPB) when the timer is decrementing.
The number of events that have occurred can be read from the interrupt event counter (EPWM_ETPS[3-2]