TMS320C6657: Random UDP packet drops from recvncfrom() with pdk 2_0_15, ndk_3_61_01_01, sdk_rtos_c665x_6_01_00_08

Part Number: TMS320C6657

Tool/software:

We are encountering random UDP packet drops using the recvncfrom() call.  We're using the following components:

pdk 2_0_15

ndk_3_61_01_01

sdk_rtos_c665x_6_01_00_08

We're using a simple Python script on a PC to send an incrementing pattern over UDP.  Wireshark shows all the packets were transmitted from the PC with the right data.  We have a short function on our target system that stores data from the incoming packets into an array.  There seem to be two types of failures: first, packets get dropped from the sequence.  We'll send say 0 to 99 and we'll see the data: 0, 1, 2, 3, ... etc. but sometimes one will drop: ..., 23, 24, 26, 27, etc.  (no 25).  The second type of failure is we'll receive old data, like: ..., 56, 57, 25, 59, 60, 61, etc. (25 was sent earlier).  Since we're using recvncfrom(), our application needs to free the pkt buffer.  As a test, right before we free the pkt buffer we fill it with a 0xAA pattern.  Now when we get the second failure, we'll get: 56, 57, 0xAA, 59, 61, etc.

Has anyone seen this type of issue?  If so, is there a newer version of the above components?

Thank you.

Mike

  • Hi Mike,

    We have not heard of this issue from anyone else. Are you running any test provided by the SDK, or is this your own?

    You can give a try a newer SDK sdk_rtos_c665x_6_03_00_106 and check.

    Thanks.

  • Hi Praveen,

    I read in another forum post if you suspect cache, move to a different memory section.  I  moved the NDK sections defined in my application's config file from external DDR3 to internal L2SRAM.  This solved my issue.

    The sections are:
    .far:NDK_OBJMEM
    .far:NDK_PACKETMEM

    I see in the sys/bios user guide there are cache interface functions.  If so, should I simply invalidate the received packet buffer before I return it?

    Thank yoiu.

  • Hi Mike,

    We are glad to hear that you were able to resolve this using another forum post.

    Ideally, cache invalidation is required if you share buffers between cores and do not need it handled by the same core.

    To comment on your query, can you share the link to the forum post you refer to?

    Thanks