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Original question:

AM6442: PCIe End-Point 120ms boot-up time requirement for link training and enumeration

AM6442: PCIe End-Point 120ms boot-up time requirement for link training and enumeration - follow-up

Stefan Glaser2
Prodigy 140 points
Part Number: AM6442


Tool/software:

Hello,

This is a follow-up question to my old question from two years ago.

According to PCIe specifications, a PCIe end-point device must be ready for link-training after a maximum of 20ms after deassertion of PCIe reset by the host. PCIe reset must be asserted by the host for a minimum of 100ms after Power-Good. This means that the AM64xx must be ready for link-training after a maximum of 120ms after power-good.

In my last question it was confirmed that the AM64xx in PCIe EP boot mode (from ROM) does meet the 120ms link training timing requirement. But this is not very helpful as the PCIe BAR configuration for the application is most probably different to the PCIe Bootloader BAR configuration. What is the proposed use-case or work-flow for the PCIe Bootmode? If the PCIe BAR configuration is changed by the application I assume the PCIe RC has to restart link-training (=Host PC has to reboot).

There was lots of progress in the PCIe support for AM64xx, for example PCIe EP is now also supported via R5F.

Is there any update or new information regarding timing requirements? Is 120ms PCIe EP configuration possible via R5F? For our application Link Training and PCIe Configuration Space Readiness according to PCIe specifications is necessary.

Thank you very much in advance!

Greetings

Stefan

  • 0
    TI__Mastermind 27420 points

    Hi Stefan,

    Thanks for your query.

    I will check on this and get back to you.

    Regards

    Ashwani

  • 0 in reply to Ashwani Goel
    TI__Mastermind 27420 points

    Hi,

    Thanks for having patience.

    Can I assume, you are working on RTOS base AM64x-PCIE-EP and AM64x-PCIE-RC ?

    Here is some results with SDK 9.2 AM64x-RC <=> AM64x-EP. 

    (+) [FAQ] MCU-PLUS-SDK-AM243X: PCIe boot on AM64x/AM24x - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    This is not for (generic usage+ optimized) and very much specific to above setup only.

    Stefan Glaser2 said:
    Is 120ms PCIe EP configuration possible via R5F?

    Do you mean, AM64x-RTOS-R5F working as RC and genrix-x86 as EP?

    We already enabled generic-EP on AM64x.

    AM64x and AM243x: MCU+ SDK-Based PCIe End Point

    We are working on generic-RC enablement on AM64x, still not approved from management.

    Regards

    Ashwani

  • 0 in reply to Ashwani Goel
    Prodigy 140 points

    Hello,

    We are working on RTOS based AM64x (and AM24x) PCIe-EP (PCIe card) and x86/64 based Intel RC. Thus we need the AM64x EP to keep the 120ms initialization time limit because we can't delay the startup of the x86 RC from PCIe card side.

    In the app note it clearly states: "...because we want to boot the AM24x BEFORE the x86 to make sure the startup and reset timing requirements are met".
    Also in one of the pictures the "SBL Total Time Taken" is approx. 230ms, so clearly the SBL is already not keeping the 120ms timing requirement limit.

    Which leads me back to my question: Is there any possible way to keep the 120ms EP initialization time limit with the AM64x/AM24x as EP? For example if the SBL is intitializing the PCIe EP as early as possible?

    To clarify, we only need the x86 RC to be able to complete link training with the AM64x EP and read the configuration space. We don't need any actual application data transfer that early, data transfer can start much later via RTOS/Linux application.

    Thank you!
    Greetings

    Stefan

  • 0 in reply to Stefan Glaser2
    TI__Mastermind 27420 points
    Stefan Glaser2 said:
    Is there any possible way to keep the 120ms EP initialization time limit with the AM64x/AM24x as EP? For example if the SBL is intitializing the PCIe EP as early as possible?

    From possibility point of view...yes... but not sure about the limit (~120 ms or not).

    Can you please reach out to some with TI-FAE to discuss this more?

    Regards

    Ashwani

  • 0 in reply to Stefan Glaser2
    TI__Mastermind 29412 points

    Hi Stefan, Ashwani, 

    I am not here to answer your question, as I have a same customer support needs although not today. I would like to learn something.

    After the PC power up, the AM64x PCIe card should also be powered up. along PC OS BIOS and OS launch up, AM64x should be booted up already. 

    There is a reset signal on PCIe connector, is it must be used to reset the entire PCIe module/AM64x? can it be just a interrupt to AM64x although named RESET.