• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 100 subscribers
  • Views 139 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM67A: Importance of DDRSS Register Configuration Tool for bring-up custom board

Alp
Prodigy 65 points
Part Number: AM67A
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi,

I design a custom board using AM67A based on BY-AI. I am trying to bring-up with a Linux image and u-boot of BY-AI that is currently working.

The difference between the two boards is that they use different DDR memories. How important is it to configure DDR in SysConfig for Linux to bring-up and running?

Can Linux still boot even if the configuration is wrong? Should I look for another problem?

I got that U-Boot log:

U-Boot SPL 2023.04-g93735daa (Aug 29 2024 - 22:05:30 +0000)
SYSFW ABI: 3.1 (firmware rev 0x000a '10.0.1--v10.00.01 (Fiery Fox)')
Trying to boot from MMC2
Authentication passed
Authentication passed


U-Boot 2023.04-g93735daa (Aug 29 2024 - 22:05:30 +0000)

SoC: J722S SR1.0 HS-FS
Model: BeagleBoard.org BeagleY-AI
DRAM: 2 GiB (effective 4 GiB)
Core: 104 devices, 28 uclasses, devicetree: separate
MMC: mmc@fa00000: 1, mmc@fa20000: 2
Loading Environment from nowhere... OK
In: serial@2800000
Out: serial@2800000
Err: serial@2800000
Net: Could not get PHY for ethernet@8000000port@1: addr 0
am65_cpsw_nuss_port ethernet@8000000port@1: phy_connect() failed
No ethernet found.

Press SPACE to abort autoboot in 2 seconds
MMC Device 0 not found
no mmc device at slot 0
MMC Device 0 not found
no mmc device at slot 0
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1...
Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
BeagleY-AI microSD (extlinux.conf) (swap enabled)
1: microSD (production test)
2: transfer microSD rootfs to NVMe (advanced)
3: microSD (debug)
4: microSD (default)
Enter choice: 4: microSD (default)
Retrieving file: /Image
append: console=ttyS2,115200n8 root=/dev/mmcblk1p3 ro rootfstype=ext4 resume=/dev/mmcblk1p2 rootwait net.ifnames=0 quiet
Retrieving file: /ti/k3-am67a-beagley-ai.dtb
## Flattened Device Tree blob at 88000000
Booting using the fdt blob at 0x88000000
Working FDT set to 88000000
Loading Device Tree to 000000008ffe4000, end 000000008ffff1e4 ... OK
Working FDT set to 8ffe4000

Starting kernel ...

I/TC: Secondary CPU 1 initializing
I/TC: Secondary CPU 1 switching to normal world boot
I/TC: Secondary CPU 2 initializing
I/TC: Secondary CPU 2 switching to normal world boot
I/TC: Secondary CPU 3 initializing
I/TC: Secondary CPU 3 switching to normal world boot

And, booting stuck at this point and waiting forever. I can't see sysmted or anything.

Thank you.

  • 0
    TI__Mastermind 35380 points
    Alp said:
    The difference between the two boards is that they use different DDR memories. How important is it to configure DDR in SysConfig for Linux to bring-up and running?

    It depends on what is different between the memories. If the memories have the same architecture (ranks, channel density, etc.), then it is possible the same configuration may work (though maybe tweaks to IO settings might be required). However, it would be very important if the memories do not have the same architecture.

    Alp said:
    Can Linux still boot even if the configuration is wrong?

    If you have a non-working DDR interface or unstable DDR interface, likely Linux (or any other software executing out of DDR) would not boot.

    Alp said:
    Should I look for another problem?

    Possibly, though someone else from TI will need to help with that. Let's better understand the DDR angle first, and then I can re-assign the ticket.

    Can you please let us know the two memory part numbers being used on the two boards?

    Thanks,
    Kevin

  • 0 in reply to Kevin S
    Prodigy 65 points

    Thank you for your comprehensive reply. 

    The board we reference is B3221PM3BDGUI-U. Our board has FLXC2002G-W6 memory and we are trying to figure out its DDR configuration from its datasheet. We couldn't find most of the parameters required for DDRSS Register Configuration Tool in the datasheet of the memory.

    Is there a common and practical way for obtain these parameters for DDR configuration? 

    When I look at the datasheets of other DDR memories, I see that they don't contain enough information either. 

  • 0 in reply to Alp
    TI__Mastermind 35380 points
    Alp said:
    The board we reference is B3221PM3BDGUI-U

    A search online seems to indicate this part has total 32Gb memory, across 2x channels (32x DQ) of a single rank. (i.e, 16Gb density per channel per rank).

    Alp said:
    Our board has FLXC2002G-W6 memory

    I am struggling to find any information about this part (including a datasheet).

    Alp said:
    We couldn't find most of the parameters required for DDRSS Register Configuration Tool in the datasheet of the memory.

    The architecture (DQ width, number of ranks, density) should be stated in the datasheet.

    Timing information should typically be published (and also doesn't typically change across different memory vendors, though some parameters like tRFC can change with density). Latency timing parameters vary with frequency. 

    Some other settings like IO settings would be up to the customer.

    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

    As a side note, have you tried using the same memory as the BY-AI board on your custom board? 

    Also how many boards have you built, and how many are showing issues?

    Regards,

    Kevin 

  • 0 in reply to Kevin S
    Prodigy 65 points
    Kevin S said:
    A search online seems to indicate this part has total 32Gb memory, across 2x channels (32x DQ) of a single rank. (i.e, 16Gb density per channel per rank).

    You are right, for this memory, BY-AI developers created and published a dtsi using the DDRSS Reg. Config. Tool. 

    Kevin S said:
    I am struggling to find any information about this part (including a datasheet).

    It was published by a user on another manufacturer's forum. The link is safe, you can check it out. I understand the memory's architecture as 16Gb, single rank, 2x channels from this datasheet.

    Kevin S said:

    Timing information should typically be published (and also doesn't typically change across different memory vendors, though some parameters like tRFC can change with density). Latency timing parameters vary with frequency. 

    Some other settings like IO settings would be up to the customer.

    Along with the DQ width, number of ranks, density parameters, we obtained the following parameters requested in the DDRSS tool from the datasheet:


    LPDDR4 Boot Frequency (MHz)                                 
    LPDDR4 Operating Frequency (MHz)                        
    DDR Data Bus Width (Bits)                                     
    DDR Density (per x16-bit channel, per rank) (Gbit)    
    Chip Selects / Ranks                                              
    Max Operating Temperature                                  
    Read Preamble, MR1[3]                                        
    Read Postamble, MR1[7]                                         
    Write Postamble, MR3[1]                                         
    Data Bus Inversion (Read), MR3[6]                         
    Data Bus Inversion (Write), MR3[7]                         
    Read Latency, MR2[2:0]                                          
    Write Latency Set, MR2[6]                                     
    Write Latency, MR2[5:3]                                         
    Write Recovery, MR1[6:4]                                       
    ODTLon                                                                  
    ODTLoff                                                                 


    2133
    16
    8
    1
    <=85
    Static
    0x5 x cTK
    0x5 x cTK
    Disable
    Enable
    36
    WL set A
    18
    20
    6
    26
    50

    We are working on the remaining Timing Parameters and IO settings. For now, we are using these parameters with the default values ​​in the DDRSS tool.

    Kevin S said:
    As a side note, have you tried using the same memory as the BY-AI board on your custom board? 

    Unfortunately, we don't have a board produced with BY-AI memories. And we were not successful in trying demount the DDR from the BY-AI and mount it to our board.

    Kevin S said:
    Also how many boards have you built, and how many are showing issues?

    We are experiencing this problem in all five cards built.