[FAQ] AM62Lx Design Recommendations / Custom board hardware design - Processor Reset inputs, Reset Status Output and Connection recommendations

HI Board designers, 

Please refer below.

Supported Reset input and output signals

Connection recommendations 

Recommendations when RTC mode is used

Sequencing of VDDS_RTC and VDD_RTC
VDDS_RTC and VDD_RTC needs to be powered before RTC_PORz is released

There is no sequencing requirement between VDDS_RTC and VDD_RTC.

The only firm sequencing requirement for the AM62Lx processor is VDD_RTC up before and down after VDD_CORE.

RTC_PORz delay when RTC mode is configured
The RTC_PORz provides an asynchronous reset to the RTC domain and puts the logic is a known locked state until the VDD_CORE ramps. The LF oscillator is turned off by default. Once VDD_CORE ramps the RTC domain will partially unlock and start receiving its clock from the RC oscillator until software completes the unlock process by configuring the RTC domain. There is a glitch-free clock multiplexer that can be reconfigured from its default RC oscillator to select the LF oscillators after software has turned on the LF oscillator and waited 100ms for it to start. The max startup time for the LF oscillator with a crystal circuit is 98ms.

Based on the above operation the customer only needs to ensure the VDD_RTC and VDDS_RTC power rails are valid before they release RTC_PORz.

RC is used for RTC_PORz
We do not recommend an RC generated reset because the signal rising slew rate is too slow to get a glitch free reset inside the device.

SK RTC Only mode power supply architecture - a diode added to the VDD_RTC supply. Not sure on the use case
VDD_RTC needs to ramp up before VDD_CORE and down after VDD_CORE. Without the diode the VDD_RTC power rail could decay at the same time or before VDD_CORE when there is a uncontrolled power down, where the system power supply is turned off or disconnected from the board. The VDD_RTC power domain doesn’t draw much power, so the input capacitors on the VDD_RTC LDO will hold the VDD_RTC rail valid for a long time when it is isolated from the input power supply with the diode.
If there is a short interruption, the VDD_RTC supply may not decay to less than 0.3V before next power-up and I suspect this is not a concern.
We do not expect a problem for this use case because the VDD_RTC power rail is expected to be one of the first power rails to turn on and the last to turn off. Plus the VDDS_RTC LDO will assert RTC_PORz as its output begins to decay and will also assert it again as its input begins to ramp after the short interruption.

32K LFOSC0 clock when RTC mode is not used
Can you please confirm if the 32K crystal can be a DNI and customer can follow the data sheet recommendation to connect Xi to ground when low power modes are not used?
The low-frequency oscillator is not required to be connected when none of the RTC low power modes are being used. Follow the processor connection recommendation when LFOSC0 is not used.

Recommendations when RTC or low power modes are not used
Customer does not use low power modes. Is there a recommended connection for VDD_RTC, VDDS_RTC and RTC_PORz

In the case where no low power mode is used:
VDD_RTC is connected to the same 0.75V power supply that is powering VDD_CORE.
VDDS_RTC is connected to the same 1.8V power supply that is powering VDDS_OSC0.
RTC_PORz is connected to the same reset source that is sourcing PORz

On the AM62L, PORz is 3.3V tolerant.
Wanted to check id the RTC_PORz is also 3.3V tolerant. Based on the data sheet I do not see the RTC_PORz being 3.3V tolerant.
The use case for the query is when RTC only or RTC + IO + DDR mode is not used, we are recommending connecting the input connected to PORz to be connected to RTC_PORz.

PORz is the only 3.3V tolerant pin. The RTC_PORz pin is not 3.3V tolerant.

In this case, the signal sourcing these two pins will need to be sourced from the same IO power supply that is sourcing VDDS_RTC because the voltage applied to the RTC_PORz pin needs to track VDDS_RTC since it is limited to the range of -0.3V to (VDDS_RTC IO supply voltage + 0.3V).

The PORZ pin is powered from VDDS_OSC0, but it is okay for it to be sourced from VDDS_RTC since it is fail-safe. In the case you describe, I would expect VDDS_RTC and VDDS_OSC0 to be sourced from the same 1.8V power supply. However, I’m not aware of any problem if there is a system requirement to source VDDS_OSC0 from a different 1.8V supply than the one used to source VDDS_RTC.

Regards,

Sreenivasa