AM625-Q1: Regarding PCB Pattern, should customer consider the pin delay in SoC for eMMC / QSPI / USB for pattern layout of PCB?

Hello ito,

Thank you for the query.

For the propagation delay, the delay here is only for the peripheral traces on the board. There is no need to include any package level propagation delay.

regards,

Sreenivasa

Hello ito,

The below E2E could help in case you have similar query for DDRSS.

(+) AM623: AM62x package internal DDR4 pin delay - Processors forum - Processors - TI E2E support forums

Regards,

Sreenivasa